Missile Command Arcade synthesized on an Altera DE2-35 Dev Board.

Files for OpenRISC Tutorial

Must-have verilog systemverilog modules

SCH, PIN assignment and example programs for EP4CE6E22C8 with 5 LED, 5 Keys, EPCS4 and W25Q64

The Verilog version of the image processing library includes dozens of validated FPGA image processing modules

MAX II CPLD applications with example code and project

Cyclone V SoC ALSA

NES For FPGA Terasic Altera DE2-70 Cyclone 2 EP2C70F896C6

Digital Locker implemented in Verilog HDL using a Finite State Machine (FSM). Unlocks with sequence 1010, includes simulation, RTL schematic, and documentation.

The repository contains the source files regarding an ALU design and FPGA implimentation Project.

Forked from BrahimOeh's riscv-classic-to-optimized-to-pipelined repository.

An implementation of the Advanced Encryption Standard (AES) encryption algorithm using Verilog supporting AES-128, AES-192, and AES-256 encryption/decryption

Missile Command Arcade synthesized on an Altera DE2-35 Dev Board.

Built-In-Self-Test blocks using LFSRs and MISRs for a circuit under test made in Verilog

Basic scan chain block implemented in Verilog

Implementing Hands-on Project of Verilog-HDL

Trying to get a new skill

Many peripherals in Verilog ready to use

This space ship game project, where the spaceship is positioned at the center and objects coming from different directions can be hit using FPGA buttons, has been implemented with Verilog coding in quartus environment for Altera System-on-Chip (SoC) FPGA and VGA for display.

Apple1 synthesized on a EP4CE6 Cyclone IV Dev Board.