Skip to content
View wsnyder's full-sized avatar

Organizations

@veripool @chipsalliance @verilator

Block or report wsnyder

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don't include any personal information such as legal names or email addresses. Markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
Showing results

Extended and external tests for Verilator testing

Python 17 9 Updated Dec 9, 2025

RTLMeter benchmark suite

Verilog 28 10 Updated Dec 16, 2025

RTLMeter results and dashboard for Verilator

JavaScript 5 1 Updated Dec 19, 2025

mbake is a Makefile formatter and linter. It only took 50 years!

Python 698 11 Updated Oct 20, 2025
C++ 33 3 Updated Dec 17, 2025

Multi-platform nightly builds of open source digital design and verification tools

Shell 1,279 109 Updated Dec 19, 2025

Verilator open-source SystemVerilog simulator and lint system

SystemVerilog 3,243 730 Updated Dec 19, 2025

GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard Verilog VCD/EVCD files and allows their viewing.

C 878 148 Updated Dec 18, 2025

Hierarchical Delta Debugging Framework

Python 59 6 Updated Nov 23, 2025

Announcements related to Verilator

43 2 Updated Nov 2, 2025

A massively parallelized gcov wrapper

Python 116 37 Updated May 7, 2025

Verilog-Mode for Emacs with Indentation, Hightlighting and AUTOs. Master repository for pushing to GNU, verilog.com and veripool.org.

SystemVerilog 279 98 Updated Nov 8, 2025