23A640/23K640

64K SPI Bus Low-Power Serial SRAM

Device Selection Table
Part Number VCC Range Page Size Temp. Ranges Packages
23K640 2.7-3.6V 32 Byte I, E P, SN, ST
23A640 1.5-1.95V 32 Byte I P, SN, ST

Features: Description:
• Max. Clock 20 MHz The Microchip Technology Inc. 23X640 are 64 Kbit
• Low-Power CMOS Technology: Serial SRAM devices. The memory is accessed via a
- Read Current: 3 mA at 1 MHz simple Serial Peripheral Interface (SPI) compatible
serial bus. The bus signals required are a clock input
- Standby Current: 4 A Max. at +85°C
(SCK) plus separate data in (SI) and data out (SO)
• 8192 x 8-bit Organization lines. Access to the device is controlled through a Chip
• 32-Byte Page Select (CS) input.
• HOLD pin Communication to the device can be paused via the
• Flexible Operating modes: hold pin (HOLD). While the device is paused,
- Byte read and write transitions on its inputs will be ignored, with the
- Page mode (32 Byte Page) exception of Chip Select, allowing the host to service
higher priority interrupts.
- Sequential mode
• Sequential Read/Write The 23X640 is available in standard packages
including 8-lead PDIP and SOIC, and advanced
• High Reliability
packaging including 8-lead TSSOP.
• Temperature Ranges Supported:
- Industrial (I): -40C to +85C
-40C to +125C
Package Types (not to scale)
- Automotive (E):
• Pb-Free and RoHS Compliant, Halogen Free
Pin Function Table
Name Function
PDIP/SOIC/TSSOP
CS Chip Select Input
(P, SN, ST)
SO Serial Data Output
VSS Ground CS 1 8 VCC
SI Serial Data Input
SO 2 7 HOLD
SCK Serial Clock Input
NC 3 6 SCK
HOLD Hold Input
VCC Supply Voltage VSS 4 5 SI

 2008-2011 Microchip Technology Inc. DS22126E-page 1

23A640/23K640
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings (†)
VCC .............................................................................................................................................................................4.5V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.3V to VCC +0.3V
Storage temperature .................................................................................................................................-65°C to 150°C
Ambient temperature under bias ...............................................................................................................-40°C to 125°C
ESD protection on all pins ...........................................................................................................................................2kV

† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for an
extended period of time may affect device reliability.

TABLE 1-1: DC CHARACTERISTICS

Industrial (I): TA = -40°C to +85°C
DC CHARACTERISTICS
Automotive (E): TA = -40°C to +125°C
Param.
Sym. Characteristic Min. Typ(1) Max. Units Test Conditions
No.
D001 VCC Supply voltage 1.5 — 1.95 V 23A640 (I-Temp)
D001 VCC Supply voltage 2.7 — 3.6 V 23K640 (I, E-Temp)
D002 VIH High-level input .7 VCC — VCC +0.3 V
voltage
D003 VIL Low-level input -0.3 — 0.2xVCC V
voltage 0.15xVCC V 23K640 (E-Temp)
D004 VOL Low-level output — — 0.2 V IOL = 1 mA
voltage
D005 VOH High-level output VCC -0.5 — — V IOH = -400 A
voltage
D006 ILI Input leakage — — ±0.5 A CS = VCC, VIN = VSS OR VCC
current
D007 ILO Output leakage — — ±0.5 A CS = VCC, VOUT = VSS OR VCC
current
D008 ICC Read — — 3 mA FCLK = 1 MHz; SO = O
— — 6 mA FCLK = 10 MHz; SO = O
Operating current — — 10 mA FCLK = 20 MHz; SO = O
D009 ICCS — 0.2 1 A CS = VCC = 1.8V, Inputs tied to
Standby current VCC or VSS
— 1 4 A CS = VCC = 3.6V, Inputs tied to
VCC or VSS
— 5 10 A CS = VCC = 3.6V, Inputs tied to
VCC or VSS @ 125°C
D010 CINT Input capacitance 7 pF VCC = 0V, f = 1 MHz, Ta = 25°C
(Note 1)
D011 VDR RAM data retention — 1.2 — V
voltage (2)
Note 1: This parameter is periodically sampled and not 100% tested. Typical measurements taken at room
temperature (25°C).
2: This is the limit to which VDD can be lowered without losing RAM data. This parameter is periodically
sampled and not 100% tested.

DS22126E-page 2  2008-2011 Microchip Technology Inc.

 23A640/23K640

TABLE 1-2: AC CHARACTERISTICS

Industrial (I): TA = -40°C to +85°C

AC CHARACTERISTICS
Automotive (E): TA = -40°C to +125°C
Param.
Sym. Characteristic Min. Max. Units Test Conditions
No.
1 FCLK Clock frequency — 10 MHz VCC 1.5V (I-Temp)
— 16 MHz VCC 1.8V (I-Temp)
— 16 MHz VCC 3V (E-Temp)
— 20 MHz VCC 3.0V (I-Temp)
2 TCSS CS setup time 50 — ns VCC 1.5V (I-Temp)
32 — ns VCC 1.8V (I-Temp)
32 — ns VCC 3.0V (E-Temp)
25 — ns VCC 3.0V (I-Temp)
3 TCSH CS hold time 50 — ns VCC 1.5V (I-Temp)
50 — ns VCC 1.8V (I-Temp)
50 — ns VCC 3.0V (E-Temp)
50 — ns VCC 3.0V (I-Temp)
4 TCSD CS disable time 50 — ns VCC 1.5V (I-Temp)
32 — ns VCC 1.8V (I-Temp)
32 — ns VCC 3.0V (E-Temp)
25 — ns VCC 3.0V (I-Temp)
5 Tsu Data setup time 10 — ns VCC 1.5V (I-Temp)
10 — ns VCC 1.8V (I-Temp)
10 — ns VCC 3.0V (E-Temp)
10 — ns VCC 3.0V (I-Temp)
6 THD Data hold time 10 — ns VCC 1.5V (I-Temp)
10 — ns VCC 1.8V (I-Temp)
10 — ns VCC 3.0V (E-Temp)
10 — ns VCC 3.0V (I-Temp)
7 TR CLK rise time — 2 us Note 1
8 TF CLK fall time — 2 us Note 1
9 THI Clock high time 50 — ns VCC 1.5V (I-Temp)
32 — ns VCC 1.8V (I-Temp)
32 — ns VCC 3.0V (E-Temp)
25 — ns VCC 3.0V (I-Temp)
10 TLO Clock low time 50 — ns VCC 1.5V (I-Temp)
32 — ns VCC 1.8V (I-Temp)
32 — ns VCC 3.0V (E-Temp)
25 — ns VCC 3.0V (I-Temp)
11 TCLD Clock delay time 50 — ns VCC 1.5V (I-Temp)
32 — ns VCC 1.8V (I-Temp)
32 — ns VCC 3.0V (E-Temp)
25 — ns VCC 3.0V (I-Temp)
12 TV Output valid from clock low — 50 ns VCC 1.5V (I-Temp)
— 32 ns VCC 1.8V (I-Temp)
— 32 ns VCC 3.0V (E-Temp)
— 25 ns VCC 3.0V (I-Temp)
13 THO Output hold time 0 — ns Note 1
Note 1: This parameter is periodically sampled and not 100% tested.

 2008-2011 Microchip Technology Inc. DS22126E-page 3

23A640/23K640
TABLE 1-2: AC CHARACTERISTICS (CONTINUED)

Industrial (I): TA = -40°C to +85°C

AC CHARACTERISTICS
Automotive (E): TA = -40°C to +125°C
Param.
Sym. Characteristic Min. Max. Units Test Conditions
No.
14 TDIS Output disable time — 20 ns VCC 1.5V (I-Temp)
— 20 ns VCC 1.8V (I-Temp)
— 20 ns VCC 3.0V (E-Temp)
— 20 ns VCC 3.0V (I-Temp)
15 THS HOLD setup time 10 — ns —
16 THH HOLD hold time 10 — ns —
17 THZ HOLD low to output High-Z 10 — ns —
18 THV HOLD high to output valid — 50 ns —
Note 1: This parameter is periodically sampled and not 100% tested.

TABLE 1-3: AC TEST CONDITIONS

AC Waveform:
Input pulse level 0.1 VCC to 0.9 VCC
Input rise/fall time 5 ns
Operating temperature -40°C to +125°C
CL = 100 pF —
Timing Measurement Reference Level:
Input 0.5 VCC
Output 0.5 VCC

DS22126E-page 4  2008-2011 Microchip Technology Inc.

 23A640/23K640
FIGURE 1-1: HOLD TIMING

CS
16 16
15 15

SCK
17 18
High-Impedance
SO n+2 n+1 n n n-1

Don’t Care 5
SI n+2 n+1 n n n-1

HOLD

FIGURE 1-2: SERIAL INPUT TIMING

CS
2 11
7
8 3

SCK
5 6

SI MSB in LSB in

High-Impedance
SO

FIGURE 1-3: SERIAL OUTPUT TIMING

CS

9 10 3

SCK
12
13 14

SO MSB out LSB out

Don’t Care
SI

 2008-2011 Microchip Technology Inc. DS22126E-page 5

23A640/23K640
2.0 FUNCTIONAL DESCRIPTION 2.3 Read Sequence
The device is selected by pulling CS low. The 8-bit
2.1 Principles of Operation READ instruction is transmitted to the 23X640 followed
The 23X640 is a 8192-byte Serial SRAM designed to by the 16-bit address, with the first MSB of the address
interface directly with the Serial Peripheral Interface being a “don’t care” bit. After the correct READ
(SPI) port of many of today’s popular microcontroller instruction and address are sent, the data stored in the
families, including Microchip’s PIC® microcontrollers. It memory at the selected address is shifted out on the
may also interface with microcontrollers that do not SO pin.
have a built-in SPI port by using discrete I/O lines If operating in Page mode, after the first byte of data is
programmed properly in firmware to match the SPI shifted out, the next memory location on the page can
protocol. be read out by continuing to provide clock pulses. This
The 23X640 contains an 8-bit instruction register. The allows for 32 consecutive address reads. After the
device is accessed via the SI pin, with data being 32nd address read the internal address counter wraps
clocked in on the rising edge of SCK. The CS pin must back to the byte 0 address in that page.
be low and the HOLD pin must be high for the entire If operating in Sequential mode, the data stored in the
operation. memory at the next address can be read sequentially
Table 2-1 contains a list of the possible instruction by continuing to provide clock pulses. The internal
bytes and format for device operation. All instructions, Address Pointer is automatically incremented to the
addresses and data are transferred MSB first, LSB last. next higher address after each byte of data is shifted
out. When the highest address is reached (1FFFh),
Data (SI) is sampled on the first rising edge of SCK the address counter rolls over to address 0000h,
after CS goes low. If the clock line is shared with other allowing the read cycle to be continued indefinitely.
peripheral devices on the SPI bus, the user can assert The read operation is terminated by raising the CS pin
the HOLD input and place the 23X640 in ‘HOLD’ mode. (Figure 2-1).
After releasing the HOLD pin, operation will resume
from the point when the HOLD was asserted.
2.4 Write Sequence
2.2 Modes of Operation Prior to any attempt to write data to the 23X640, the
device must be selected by bringing CS low.
The 23A256/23K256 has three modes of operation that
are selected by setting bits 7 and 6 in the STATUS Once the device is selected, the Write command can
register. The modes of operation are Byte, Page and be started by issuing a WRITE instruction, followed by
Burst. the 16-bit address, with the first three MSBs of the
address being a “don’t care” bit, and then the data to be
Byte Operation – is selected when bits 7 and 6 in the written. A write is terminated by the CS being brought
STATUS register are set to 00. In this mode, the read/ high.
write operations are limited to only one byte. The
Command followed by the 16-bit address is clocked into If operating in Page mode, after the initial data byte is
the device and the data to/from the device is transferred shifted in, additional bytes can be shifted into the
on the next 8 clocks (Figure 2-1, Figure 2-2). device. The Address Pointer is automatically
incremented. This operation can continue for the entire
Page Operation – is selected when bits 7 and 6 in the page (32 Bytes) before data will start to be overwritten.
STATUS register are set to 10. The 23A640/23K640 has
1024 pages of 32 Bytes. In this mode, the read and write If operating in Sequential mode, after the initial data
operations are limited to within the addressed page (the byte is shifted in, additional bytes can be clocked into
address is automatically incremented internally). If the the device. The internal Address Pointer is automati-
data being read or written reaches the page boundary, cally incremented. When the Address Pointer reaches
then the internal address counter will increment to the the highest address (1FFFh), the address counter rolls
start of the page (Figure 2-3, Figure 2-4). over to (0000h). This allows the operation to continue
indefinitely, however, previous data will be overwritten.
Sequential Operation – is selected when bits 7 and 6
in the STATUS register are set to 01. Sequential opera-
tion allows the entire array to be written to and read
from. The internal address counter is automatically
incremented and page boundaries are ignored. When
the internal address counter reaches the end of the
array, the address counter will roll over to 0x0000
(Figure 2-5, Figure 2-6).

DS22126E-page 6  2008-2011 Microchip Technology Inc.

 23A640/23K640

TABLE 2-1: INSTRUCTION SET

Instruction Name Instruction Format Description
READ 0000 0011 Read data from memory array beginning at selected address
WRITE 0000 0010 Write data to memory array beginning at selected address
RDSR 0000 0101 Read STATUS register
WRSR 0000 0001 Write STATUS register

FIGURE 2-1: BYTE READ SEQUENCE

CS

0 1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31
SCK

Instruction 16-bit Address

SI 0 0 0 0 0 0 1 1 15 14 13 12 2 1 0

Data Out
High-Impedance
SO 7 6 5 4 3 2 1 0

FIGURE 2-2: BYTE WRITE SEQUENCE

CS

0 1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31
SCK
Instruction 16-bit Address Data Byte
SI 0 0 0 0 0 0 1 0 15 14 13 12 2 1 0 7 6 5 4 3 2 1 0

High-Impedance
SO

 2008-2011 Microchip Technology Inc. DS22126E-page 7

23A640/23K640
FIGURE 2-3: PAGE READ SEQUENCE

CS

0 1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31
SCK

Instruction 16-bit Address

SI 0 0 0 0 0 0 1 1 15 14 13 12 2 1 0
Page X, Word Y
Page X, Word Y
High Impedance
SO 7 6 5 4 3 2 1 0

CS

32 33 34 35 36 37 38 39
SCK

SI

Page X, Word Y+1 Page X, Word 31 Page X, Word 0

SO 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0

FIGURE 2-4: PAGE WRITE SEQUENCE

CS

0 1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31
SCK
Instruction 16-bit Address Page X, Word Y
SI 0 0 0 0 0 0 1 0 15 14 13 12 2 1 0 7 6 5 4 3 2 1 0
Page X, Word Y

CS

32 33 34 35 36 37 38 39
SCK

Page X, Word Y+1 Page X, Word 31 Page X, Word 0

SI 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0

DS22126E-page 8  2008-2011 Microchip Technology Inc.

 23A640/23K640
FIGURE 2-5: SEQUENTIAL READ SEQUENCE

CS

0 1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31
SCK
Instruction 16-bit Address
SI 0 0 0 0 0 0 1 1 15 14 13 12 2 1 0

Page X, Word Y
SO 7 6 5 4 3 2 1 0

CS

SCK

SI

Page X, Word 31 Page X+1, Word 0 Page X+1, Word 1

SO 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0

CS

SCK

SI

Page X+1, Word 31 Page X+n, Word 1 Page X+n, Word 31

SO 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0

 2008-2011 Microchip Technology Inc. DS22126E-page 9

23A640/23K640
FIGURE 2-6: SEQUENTIAL WRITE SEQUENCE

CS

0 1 2 3 4 5 6 7 8 9 10 11 21 22 23 24 25 26 27 28 29 30 31
SCK
Instruction 16-bit Address Data Byte 1
SI 0 0 0 0 0 0 1 0 15 14 13 12 2 1 0 7 6 5 4 3 2 1 0

CS

32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
SCK
Data Byte 2 Data Byte 3 Data Byte n
SI 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0

DS22126E-page 10  2008-2011 Microchip Technology Inc.

 23A640/23K640
2.5 Read Status Register Instruction The mode bits indicate the operating mode of the
(RDSR) SRAM. The possible modes of operation are:
0 0 = Byte mode (default operation)
The Read Status Register instruction (RDSR) provides
access to the STATUS register. The STATUS register 1 0 = Page mode
may be read at any time. The STATUS register is 0 1 = Sequential mode
formatted as follows:
1 1 = Reserved
TABLE 2-2: STATUS REGISTER Write and read commands are shown in Figure 2-7 and
Figure 2-8.
7 6 5 4 3 2 1 0
The HOLD bit enables the Hold pin functionality. It must
W/R W/R – – – – – W/R be set to a ‘0’ before HOLD pin is brought low for HOLD
MODE MODE 0 0 0 0 1 HOLD function to work properly. Setting HOLD to ‘1’ disables
W/R = writable/readable. feature.
Bits 2 through 5 are reserved and should always be set
to ‘0’. Bit 1 will read back as ‘1’ but should always be
written as ‘0’.
See Figure 2-7 for the RDSR timing sequence.

FIGURE 2-7: READ STATUS REGISTER TIMING SEQUENCE (RDSR)

CS

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

SCK

Instruction

SI 0 0 0 0 0 1 0 1

Data from STATUS Register

High-Impedance
SO 7 6 5 4 3 2 1 0

 2008-2011 Microchip Technology Inc. DS22126E-page 11

23A640/23K640
2.6 Write Status Register Instruction
(WRSR)
The Write Status Register instruction (WRSR) allows the
user to write to the bits in the STATUS register as
shown in Table 2-2. This allows for setting of the Device
operating mode. Several of the bits in the STATUS
register must be cleared to ‘0’. See Figure 2-8 for the
WRSR timing sequence.

FIGURE 2-8: WRITE STATUS REGISTER TIMING SEQUENCE (WRSR)

CS

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

SCK

Instruction Data to STATUS Register

SI 0 0 0 0 0 0 0 1 7 6 5 4 3 2 1 0

High-Impedance
SO

2.7 Power-On State

The 23X640 powers on in the following state:
• The device is in low-power Standby mode
(CS = 1)
• A high-to-low-level transition on CS is required to
enter active state

DS22126E-page 12  2008-2011 Microchip Technology Inc.

 23A640/23K640
3.0 PIN DESCRIPTIONS 3.5 Hold (HOLD)
The descriptions of the pins are listed in Table 3-1. The HOLD pin is used to suspend transmission to the
23X640 while in the middle of a serial sequence without
TABLE 3-1: PIN FUNCTION TABLE having to retransmit the entire sequence again. It must
be held high any time this function is not being used.
PDIP/SOIC Once the device is selected and a serial sequence is
Name Function underway, the HOLD pin may be pulled low to pause
TSSOP
further serial communication without resetting the
CS 1 Chip Select Input serial sequence. The HOLD pin must be brought low
SO 2 Serial Data Output while SCK is low, otherwise the HOLD function will not
VSS 4 Ground be invoked until the next SCK high-to-low transition.
The 23X640 must remain selected during this
SI 5 Serial Data Input sequence. The SI, SCK and SO pins are in a high-
SCK 6 Serial Clock Input impedance state during the time the device is paused
HOLD 7 Hold Input and transitions on these pins will be ignored. To resume
serial communication, HOLD must be brought high
VCC 8 Supply Voltage
while the SCK pin is low, otherwise serial
communication will not resume. Lowering the HOLD
3.1 Chip Select (CS) line at any time will tri-state the SO line.
A low level on this pin selects the device. A high level Hold functionality is disabled by the STATUS register
deselects the device and forces it into Standby mode. bit.
When the device is deselected, SO goes to the high-
impedance state, allowing multiple parts to share the
same SPI bus. After power-up, a low level on CS is
required, prior to any sequence being initiated.

3.2 Serial Output (SO)

The SO pin is used to transfer data out of the 23X640.
During a read cycle, data is shifted out on this pin after
the falling edge of the serial clock.

3.3 Serial Input (SI)

The SI pin is used to transfer data into the device. It
receives instructions, addresses and data. Data is
latched on the rising edge of the serial clock.

3.4 Serial Clock (SCK)

The SCK is used to synchronize the communication
between a master and the 23X640. Instructions,
addresses or data present on the SI pin are latched on
the rising edge of the clock input, while data on the SO
pin is updated after the falling edge of the clock input.

 2008-2011 Microchip Technology Inc. DS22126E-page 13

23A640/23K640
4.0 PACKAGING INFORMATION

4.1 Package Marking Information

8-Lead PDIP Example:

XXXXXXXX 23K640
T/XXXNNN I/P e3 1L7
YYWW 0528

8-Lead SOIC (3.90 mm) Example:

XXXXXXXT 23K640I
XXXXYYWW SN e3 0528
NNN 1L7

8-Lead TSSOP Example:

XXXX K640
TYWW I837
NNN 1L7

Legend: XX...X Part number or part number code

T Temperature (I, E)
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code (2 characters for small packages)
e3 Pb-free JEDEC designator for Matte Tin (Sn)

Note: For very small packages with no room for the Pb-free JEDEC designator
e3 , the marking will only appear on the outer carton or reel label.

Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.

DS22126E-page 14  2008-2011 Microchip Technology Inc.

 23A640/23K640


 
  
  
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 2008-2011 Microchip Technology Inc. DS22126E-page 15

23A640/23K640

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

DS22126E-page 16  2008-2011 Microchip Technology Inc.

 23A640/23K640

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

 2008-2011 Microchip Technology Inc. DS22126E-page 17

23A640/23K640


  

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DS22126E-page 18  2008-2011 Microchip Technology Inc.

 23A640/23K640


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 2008-2011 Microchip Technology Inc. DS22126E-page 19

23A640/23K640

Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging

DS22126E-page 20  2008-2011 Microchip Technology Inc.

 23A640/23K640
APPENDIX A: REVISION HISTORY

Revision A (12/2008)
Original Release.

Revision B (01/2009)
Revised Section 2.5: Added a paragraph.

Revision C (04/2009)
Removed Preliminary status; Revised Standby
Current; Revised Table 1-1, Param. No. D009; Revised
TSSOP Package marking information; Revised
Product ID.

Revision D (08/2010)
Revised Table 1-1, Param. No. D009; Revised
Package Drawings.

Revision E (10/2010)
Revised Parameter D003 in Table 1-1: DC Character-
istics.

 2008-2011 Microchip Technology Inc. DS22126E-page 21

23A640/23K640
NOTES:

DS22126E-page 22  2008-2011 Microchip Technology Inc.

 23A640/23K640
THE MICROCHIP WEB SITE CUSTOMER SUPPORT
Microchip provides online support via our WWW site at Users of Microchip products can receive assistance
www.microchip.com. This web site is used as a means through several channels:
to make files and information easily available to • Distributor or Representative
customers. Accessible by using your favorite Internet
• Local Sales Office
browser, the web site contains the following
information: • Field Application Engineer (FAE)
• Technical Support
• Product Support – Data sheets and errata,
application notes and sample programs, design • Development Systems Information Line
resources, user’s guides and hardware support Customers should contact their distributor,
documents, latest software releases and archived representative or field application engineer (FAE) for
software support. Local sales offices are also available to help
• General Technical Support – Frequently Asked customers. A listing of sales offices and locations is
Questions (FAQ), technical support requests, included in the back of this document.
online discussion groups, Microchip consultant Technical support is available through the web site
program member listing at: http://microchip.com/support
• Business of Microchip – Product selector and
ordering guides, latest Microchip press releases,
listing of seminars and events, listings of
Microchip sales offices, distributors and factory
representatives

CUSTOMER CHANGE NOTIFICATION

SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a
specified product family or development tool of interest.
To register, access the Microchip web site at
www.microchip.com. Under “Support”, click on
“Customer Change Notification” and follow the
registration instructions.

 2008-2011 Microchip Technology Inc. DS22126E-page 23

23A640/23K640
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip
product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our
documentation can better serve you, please FAX your comments to the Technical Publications Manager at
(480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.

TO: Technical Publications Manager Total Pages Sent ________

RE: Reader Response

From: Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________ FAX: (______) _________ - _________
Application (optional):
Would you like a reply? Y N

Device: 23A640/23K640 Literature Number: DS22126E

Questions:

1. What are the best features of this document?

2. How does this document meet your hardware and software development needs?

3. Do you find the organization of this document easy to follow? If not, why?

4. What additions to the document do you think would enhance the structure and subject?

5. What deletions from the document could be made without affecting the overall usefulness?

6. Is there any incorrect or misleading information (what and where)?

7. How would you improve this document?

DS22126E-page 24  2008-2011 Microchip Technology Inc.

 23A640/23K640
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO. X – X /XX
Examples:
Device Tape & Reel Temp Range Package a) 23K640-I/ST = 64 Kbit, 3.6V Serial SRAM,
Industrial temp., TSSOP package
b) 23A640T-I/SN = 64 Kbit, 1.8V Serial SRAM,
Industrial temp., Tape & Reel, SOIC package
Device: 23A640 = 64 Kbit, 1.8V, SPI Serial SRAM c) 23K640-E/ST = 64 Kbit, 3.6V Serial SRAM,
23K640 = 64 Kbit, 3.6V, SPI Serial SRAM Automotive temp., TSSOP package

Tape & Reel: Blank = Standard packaging (tube)

T = Tape & Reel
Temperature I = -40C to+85C
Range: E = -40°C to +125°C

Package: P = Plastic PDIP (300 mil body), 8-lead

SN = Plastic SOIC (3.90 mm body), 8-lead
ST = TSSOP, 8-lead

 2008-2011 Microchip Technology Inc. DS22126E-page 25

23A640/23K640
NOTES:

DS22126E-page 26  2008-2011 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device Trademarks

applications and the like is provided only for your convenience
The Microchip name and logo, the Microchip logo, dsPIC,
and may be superseded by updates. It is your responsibility to
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
ensure that your application meets with your specifications.
PIC32 logo, rfPIC and UNI/O are registered trademarks of
MICROCHIP MAKES NO REPRESENTATIONS OR
Microchip Technology Incorporated in the U.S.A. and other
WARRANTIES OF ANY KIND WHETHER EXPRESS OR countries.
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION, FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
INCLUDING BUT NOT LIMITED TO ITS CONDITION, MXDEV, MXLAB, SEEVAL and The Embedded Control
QUALITY, PERFORMANCE, MERCHANTABILITY OR Solutions Company are registered trademarks of Microchip
FITNESS FOR PURPOSE. Microchip disclaims all liability Technology Incorporated in the U.S.A.
arising from this information and its use. Use of Microchip Analog-for-the-Digital Age, Application Maestro, chipKIT,
devices in life support and/or safety applications is entirely at chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net,
the buyer’s risk, and the buyer agrees to defend, indemnify and dsPICworks, dsSPEAK, ECAN, ECONOMONITOR,
hold harmless Microchip from any and all damages, claims, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP,
suits, or expenses resulting from such use. No licenses are Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB,
conveyed, implicitly or otherwise, under any Microchip MPLINK, mTouch, Omniscient Code Generation, PICC,
intellectual property rights. PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE,
rfLAB, Select Mode, Total Endurance, TSHARC,
UniWinDriver, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2008-2011, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.

ISBN: 978-1-61341-674-7

Microchip received ISO/TS-16949:2009 certification for its worldwide

headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.

 2008-2011 Microchip Technology Inc. DS22126E-page 27

 Worldwide Sales and Service
AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE
Corporate Office Asia Pacific Office India - Bangalore Austria - Wels
2355 West Chandler Blvd. Suites 3707-14, 37th Floor Tel: 91-80-3090-4444 Tel: 43-7242-2244-39
Chandler, AZ 85224-6199 Tower 6, The Gateway Fax: 91-80-3090-4123 Fax: 43-7242-2244-393
Tel: 480-792-7200 Harbour City, Kowloon Denmark - Copenhagen
India - New Delhi
Fax: 480-792-7277 Hong Kong Tel: 45-4450-2828
Tel: 91-11-4160-8631
Technical Support: Tel: 852-2401-1200 Fax: 45-4485-2829
Fax: 91-11-4160-8632
http://www.microchip.com/ Fax: 852-2401-3431
India - Pune France - Paris
support
Australia - Sydney Tel: 91-20-2566-1512 Tel: 33-1-69-53-63-20
Web Address:
Tel: 61-2-9868-6733 Fax: 91-20-2566-1513 Fax: 33-1-69-30-90-79
www.microchip.com
Fax: 61-2-9868-6755 Germany - Munich
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Chicago
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Cleveland Fax: 86-571-2819-3189 Fax: 60-3-6201-9859 UK - Wokingham
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Malaysia - Penang
Tel: 216-447-0464 Tel: 852-2401-1200 Fax: 44-118-921-5820
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Tel: 949-462-9523 Tel: 86-755-8203-2660 Tel: 886-2-2500-6610
Fax: 949-462-9608 Fax: 86-755-8203-1760 Fax: 886-2-2508-0102

Santa Clara China - Wuhan Thailand - Bangkok

Santa Clara, CA Tel: 86-27-5980-5300 Tel: 66-2-694-1351
Tel: 408-961-6444 Fax: 86-27-5980-5118 Fax: 66-2-694-1350
Fax: 408-961-6445 China - Xian
Toronto Tel: 86-29-8833-7252
Mississauga, Ontario, Fax: 86-29-8833-7256
Canada China - Xiamen
Tel: 905-673-0699 Tel: 86-592-2388138
Fax: 905-673-6509 Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
08/02/11
Fax: 86-756-3210049

DS22126E-page 28  2008-2011 Microchip Technology Inc.