MTFC128GAJAECE- MTFC16GAKAEEF- MTFC16GAKAEEF- MTFC16GAKAEJP- MTFC32GAKAEDQ-

AAT AAT AIT AIT AAT

 Micron Confidential and Proprietary

8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

Features

e.MMC Memory
MTFC8GAC, MTFC16GAK, MTFC32GAK, MTFC64GAJ, MTFC128GAJ

Features Options Marking

• Density
MultiMediaCard (MMC) controller and NAND Flash – 8GB 8G
• JEDEC/MMC standard version 5.0-compliant – 16GB 16G
(JEDEC Standard No. JESD84-B50)1 – 32GB 32G
• VCC: 2.7–3.6V – 64GB 64G
• VCCQ (dual voltage): 1.65–1.95V; 2.7–3.6V – 128GB 128G
– Advanced 12-signal interface • NAND component
– ×1, ×4, and ×8 I/Os, selectable by host – 32Gb AC
– SDR/DDR modes up to 52 MHz clock speed – 64Gb AK
– HS200/HS400 mode – 128Gb AJ
– Command classes: class 0 (basic); class 2 (block • Controller AE
read); class 4 (block write); class 5 (erase); • Packages – JEDEC-standard,
class 6 (write protection); class 7 (lock card) RoHS-compliant
– Temporary write protection – 100-ball LBGA DQ
– Boot operation (high-speed boot) – 153-ball TFBGA NS
– Sleep mode – 153-ball VFBGA CN
– Replay-protected memory block (RPMB) – 153-ball VFBGA JP
– Hardware reset signal – 169-ball TFBGA EF
– Multiple partitions with enhanced attribute – 169-ball LFBGA DN
– Permanent and power-on write protection – 169-ball LFBGA CE
– High-priority interrupt (HPI) • Operating temperature range
– Data strobe pin – From –40°C to +85°C AIT
– Field firmware update (FFU) – From –40°C to +105°C AAT
– Device health report • Special character K1
– Sleep notification
– Background operation Note: 1. The JEDEC specification is available at
– Reliable write www.jedec.org/sites/default/files/docs/
– Discard and sanitize JESD84-B50.pdf.
– Power-off notification feature
– Backward compatible with previous MMC
– ECC and block management implemented

CCMTD-1725822587-3071
emmc_8-128GB_5_0_Automotive.pdf - Rev. N 06/18 EN 1 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2015 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.
 Micron Confidential and Proprietary

8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

Features

Part Numbering Information

Micron® e.MMC memory devices are available in different configurations and densities.
Note: The diesis symbol (‡) on the part numbers indicate "Preliminary" with the following legal disclaimer:
‡Products and specifications discussed herein are for evaluation and reference purposes only and are subject to
change by Micron without notice. Products are only warranted by Micron to meet Micron’s production data sheet
specifications.

Figure 1: e.MMC Part Numbering

MT FC xx xx xx xx - xx xxx xx

Micron Technology Production Status

Blank = Production
Product Family ES = Engineering sample
FC = NAND Flash + controller QS = Qualification sample

NAND Density Operating Temperature Range

NAND Component Special Options

Controller ID Package Codes

All packages are Pb free

Table 1: Ordering Information

Base Part Number Density Package Shipping

MTFC8GACAEDQ-K1 AIT 8GB 100-ball LBGA Tray
MTFC8GACAEDQ-AAT 14mm × 18mm × 1.4mm Tape and reel
MTFC8GACAENS-K1 AIT 8GB 153-ball TFBGA Tray
MTFC8GACAENS-AAT 11.5mm × 13mm × 1.2mm Tape and reel
MTFC16GAKAEDQ-AIT 16GB 100-ball LBGA Tray
MTFC16GAKAEDQ-AAT 14mm × 18mm × 1.4mm Tape and reel
MTFC16GAKAECN-AIT 16GB 153-ball VFBGA Tray
MTFC16GAKAEJP-AIT 11.5mm × 13mm × 1.0mm Tape and reel
MTFC16GAKAEEF-AIT 16GB 169-ball TFBGA Tray
MTFC16GAKAEEF-AAT 14mm × 18mm × 1.2mm Tape and reel
MTFC32GAKAEDQ-AIT 32GB 100-ball LBGA Tray
MTFC32GAKAEDQ-AAT 14mm × 18mm × 1.4mm Tape and reel
MTFC32GAKAECN-AIT 32GB 153-ball VFBGA Tray
MTFC32GAKAEJP-AIT 11.5mm × 13mm × 1.0mm Tape and reel
MTFC32GAKAEEF-AIT 32GB 169-ball TFBGA Tray
MTFC32GAKAEEF-AAT 14mm × 18mm × 1.2mm Tape and reel

CCMTD-1725822587-3071
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© 2015 Micron Technology, Inc. All rights reserved.
 Micron Confidential and Proprietary

8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

Features

Table 1: Ordering Information (Continued)

Base Part Number Density Package Shipping

MTFC64GAJAEDN-AIT Tray
169-ball LFBGA
MTFC64GAJAECE-AIT 64GB
14mm × 18mm × 1.4mm Tape and reel
MTFC64GAJAECE-AAT
MTFC64GAJAEDQ-AIT 64GB 100-ball LBGA Tray
MTFC64GAJAEDQ-AAT 14mm × 18mm × 1.4mm Tape and reel
MTFC128GAJAEDN-AIT 128GB 169-ball LFBGA Tray
MTFC128GAJAECE-AIT 14mm × 18mm × 1.4mm Tape and reel
MTFC128GAJAECE-AAT

Device Marking
Due to the size of the package, the Micron-standard part number is not printed on the top of the device. Instead,
an abbreviated device mark consisting of a 5-digit alphanumeric code is used. The abbreviated device marks are
cross-referenced to the Micron part numbers at the FBGA Part Marking Decoder site: www.micron.com/decoder.

CCMTD-1725822587-3071
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8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

Features

e.MMC Performance
Performance in the following tables are retrieved with these conditions: Bus in ×8 I/O. Temperature 25°C. Sequen-
tial access of 2MB chunk, cache on (write). Additional performance data, such as system performance on a specif-
ic application board, will be provided in a separate document upon customer request. Typical values are measured
on AIT device. In AAT device, beyond 85˚C, a derating is possible.

Table 2: HS400 Performance

Typical Values
Condition 8GB 16GB 32GB 64/128GB Unit
Sequential write 25 45 90 90 MB/s
Sequential read 230 270 270 270 MB/s

Table 3: HS200 Performance

Typical Values
Condition 8GB 16GB 32GB 64/128GB Unit
Sequential write 25 45 80 80 MB/s
Sequential read 180 180 180 180 MB/s

Table 4: DDR52 Performance

Typical Values
Condition 8GB 16GB 32GB 64/128GB Unit
Sequential write 25 45 75 75 MB/s
Sequential read 85 85 85 85 MB/s

e.MMC Current Consumption

Current consumption in the following tables are retrieved with these conditions: Bus in ×8 I/O. V CC = 3.6V and
VCCQ = 1.95V. Temperature 25°C. Measurements done as average RMS current consumption. I CCQ in READ opera-
tion measurements with tester load disconnected.

Table 5: HS400 Current Consumption

Typical Values (ICC/ICCQ)

Condition 8GB 16GB 32GB 64/128GB Unit
Write 110/30 120/30 160/30 200/30 mA
Read 140/60 150/60 150/60 170/60 mA
Sleep 0/110 0/110 0/110 0/170 µA
Auto-standby 40/110 50/120 60/110 70/170 µA

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8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

Features

Table 6: HS200 Current Consumption

Typical Values (ICC/ICCQ)

Condition 8GB 16GB 32GB 64/128GB Unit
Write 110/30 120/30 160/30 200/30 mA
Read 120/50 130/60 130/60 130/60 mA
Sleep 0/110 0/110 0/110 0/170 µA
Auto-standby 40/110 50/110 60/110 70/170 µA

Table 7: DDR52 Current Consumption

Typical Values (ICC/ICCQ)

Condition 8GB 16GB 32GB 64/128GB Unit
Write 80/30 120/30 130/30 160/30 mA
Read 75/40 80/40 80/40 80/40 mA
Sleep 0/110 0/110 0/110 0/170 µA
Auto-standby 40/110 50/110 60/110 70/170 µA

CCMTD-1725822587-3071
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8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

Important Notes and Warnings

Important Notes and Warnings

Micron Technology, Inc. ("Micron") reserves the right to make changes to information published in this document,
including without limitation specifications and product descriptions. This document supersedes and replaces all
information supplied prior to the publication hereof. You may not rely on any information set forth in this docu-
ment if you obtain the product described herein from any unauthorized distributor or other source not authorized
by Micron.
Automotive Applications. Products are not designed or intended for use in automotive applications unless specifi-
cally designated by Micron as automotive-grade by their respective data sheets. Distributor and customer/distrib-
utor shall assume the sole risk and liability for and shall indemnify and hold Micron harmless against all claims,
costs, damages, and expenses and reasonable attorneys' fees arising out of, directly or indirectly, any claim of
product liability, personal injury, death, or property damage resulting directly or indirectly from any use of non-
automotive-grade products in automotive applications. Customer/distributor shall ensure that the terms and con-
ditions of sale between customer/distributor and any customer of distributor/customer (1) state that Micron
products are not designed or intended for use in automotive applications unless specifically designated by Micron
as automotive-grade by their respective data sheets and (2) require such customer of distributor/customer to in-
demnify and hold Micron harmless against all claims, costs, damages, and expenses and reasonable attorneys'
fees arising out of, directly or indirectly, any claim of product liability, personal injury, death, or property damage
resulting from any use of non-automotive-grade products in automotive applications.
Critical Applications. Products are not authorized for use in applications in which failure of the Micron compo-
nent could result, directly or indirectly in death, personal injury, or severe property or environmental damage
("Critical Applications"). Customer must protect against death, personal injury, and severe property and environ-
mental damage by incorporating safety design measures into customer's applications to ensure that failure of the
Micron component will not result in such harms. Should customer or distributor purchase, use, or sell any Micron
component for any critical application, customer and distributor shall indemnify and hold harmless Micron and
its subsidiaries, subcontractors, and affiliates and the directors, officers, and employees of each against all claims,
costs, damages, and expenses and reasonable attorneys' fees arising out of, directly or indirectly, any claim of
product liability, personal injury, or death arising in any way out of such critical application, whether or not Mi-
cron or its subsidiaries, subcontractors, or affiliates were negligent in the design, manufacture, or warning of the
Micron product.
Customer Responsibility. Customers are responsible for the design, manufacture, and operation of their systems,
applications, and products using Micron products. ALL SEMICONDUCTOR PRODUCTS HAVE INHERENT FAIL-
URE RATES AND LIMITED USEFUL LIVES. IT IS THE CUSTOMER'S SOLE RESPONSIBILITY TO DETERMINE
WHETHER THE MICRON PRODUCT IS SUITABLE AND FIT FOR THE CUSTOMER'S SYSTEM, APPLICATION, OR
PRODUCT. Customers must ensure that adequate design, manufacturing, and operating safeguards are included
in customer's applications and products to eliminate the risk that personal injury, death, or severe property or en-
vironmental damages will result from failure of any semiconductor component.
Limited Warranty. In no event shall Micron be liable for any indirect, incidental, punitive, special or consequential
damages (including without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such damages are based on tort, warranty,
breach of contract or other legal theory, unless explicitly stated in a written agreement executed by Micron's duly
authorized representative.

CCMTD-1725822587-3071
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8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

General Description

General Description
Micron e.MMC is a communication and mass data storage device that includes a Multi-
MediaCard (MMC) interface, a NAND Flash component, and a controller on an ad-
vanced 12-signal bus, which is compliant with the MMC system specification. Its cost
per bit, small package sizes, and high reliability make it an ideal choice for automotive
applications, including information and entertainment, navigation tools, advanced
driving assistance systems, and a variety of other industrial and portable products.
The nonvolatile e.MMC draws no power to maintain stored data, delivers high perform-
ance across a wide range of operating temperatures, and resists shock and vibration dis-
ruption.

CCMTD-1725822587-3071
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8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

Signal Descriptions

Signal Descriptions

Table 8: Signal Descriptions

Symbol Type Description

CLK Input Clock: Each cycle of the clock directs a transfer on the command line and on the data line(s). The
frequency can vary between the minimum and the maximum clock frequency.
RST_n Input Reset: The RST_n signal is used by the host for resetting the device, moving the device to the pre-
idle state. By default, the RST_n signal is temporarily disabled in the device. The host must set ECSD
register byte 162, bits[1:0] to 0x1 to enable this functionality before the host can use it.
CMD I/O Command: This signal is a bidirectional command channel used for command and response trans-
fers. The CMD signal has two bus modes: open-drain mode and push-pull mode. Commands are
sent from the MMC host to the device, and responses are sent from the device to the host.
DAT[7:0] I/O Data I/O: These are bidirectional data signals. The DAT signals operate in push-pull mode. By de-
fault, after power-on or assertion of the RST_n signal, only DAT0 is used for data transfer. The
MMC controller can configure a wider data bus for data transfer either using DAT[3:0] (4-bit mode)
or DAT[7:0] (8-bit mode). e.MMC includes internal pull-up resistors for data lines DAT[7:1]. Immedi-
ately after entering the 4-bit mode, the device disconnects the internal pull-up resistors on the
DAT[3:1] lines. Upon entering the 8-bit mode, the device disconnects the internal pull-ups on the
DAT[7:1] lines.
DS Output Data strobe: Generated by the device and used for data output and CRC status response output in
HS400 mode. The frequency of this signal follows the frequency of CLK. For data output, each cycle
of this signal directs two bits transfer (2x) on the data, one bit for the positive edge and the other
bit for the negative edge. For CRC status response output, the CRC status is latched on the positive
edge only, and is "Don't Care" on the negative edge.
VCC Supply VCC: NAND interface (I/F) I/O and NAND Flash power supply.
VCCQ Supply VCCQ: e.MMC controller core and e.MMC I/F I/O power supply.
VSS1 Supply VSS: NAND I/F I/O and NAND Flash ground connection.
VSSQ1 Supply VSSQ: e.MMC controller core and e.MMC I/F ground connection.
VDDIM – Internal voltage node.
NC – No connect: No internal connection is present.
RFU – Reserved for future use: No internal connection is present. Leave it floating externally.

Note: 1. VSS and VSSQ are connected internally.

CCMTD-1725822587-3071
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 Micron Confidential and Proprietary

8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

100-Ball Signal Assignments

100-Ball Signal Assignments

Figure 2: 100 Ball (Top View, Ball Down)

1 2 3 4 5 6 7 8 9 10

A NC NC NC NC A

B NC NC B

D RFU RFU RFU RFU RFU RFU RFU RFU D

E RFU RFU VDDIM RFU RFU RFU RFU RFU E

F VCC VCC VCC VCC VCC VCC VCC VCC F

G VSS VSS VSS VSS VSS VSS VSS VSS G

H VSSQ VCCQ RFU RFU RFU RFU VCCQ VSSQ H

J RFU RFU RFU VSS RFU RFU RFU RFU J

K DAT0 DAT2 RFU DS RFU RFU DAT5 DAT7 K

L VCCQ VSSQ VCCQ RFU RFU VCCQ VSSQ VCCQ L

M RFU RFU VSSQ RST_n RFU VSSQ RFU RFU M

N DAT1 DAT3 RFU RFU RFU RFU DAT4 DAT6 N

P VSSQ VCCQ RFU CMD CLK RFU VCCQ VSSQ P

T NC NC T

U NC NC NC NC U

Notes: 1. Connect a 1μF decoupling capacitor from VDDIM to ground.

2. Some previous versions of the JEDEC product or mechanical specification had defined
reserved for future use (RFU) balls as no connect (NC) balls. NC balls assigned in the pre-
vious specifications could have been connected to ground on the system board. To ena-
ble new feature introduction, some of these balls are assigned as RFU in the v4.4 me-
chanical specification. Any new PCB footprint implementations should use the new ball
assignments and leave the RFU balls floating on the system board.
3. VCC, VCCQ, VSS, and VSSQ balls must all be connected on the system board.

CCMTD-1725822587-3071
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© 2015 Micron Technology, Inc. All rights reserved.
 Micron Confidential and Proprietary

8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

153-Ball Signal Assignments

153-Ball Signal Assignments

Figure 3: 153 Ball (Top View, Ball Down)

1 2 3 4 5 6 7 8 9 10 11 12 13 14

A NC NC DAT0 DAT1 DAT2 VSS RFU NC NC NC NC NC NC NC A

B NC DAT3 DAT4 DAT5 DAT6 DAT7 NC NC NC NC NC NC NC NC B

C NC VDDIM NC VSSQ NC VCCQ NC NC NC NC NC NC NC NC C

D NC NC NC NC NC NC NC D

E NC NC NC RFU VCC VSS RFU RFU RFU NC NC NC E

F NC NC NC VCC RFU NC NC NC F

G NC NC NC VSS RFU NC NC NC G

H NC NC NC DS VSS NC NC NC H

J NC NC NC VSS VCC NC NC NC J

K NC NC NC RST_n RFU RFU VSS VCC RFU NC NC NC K

L NC NC NC NC NC NC L

M NC NC NC VCCQ CMD CLK NC NC NC NC NC NC NC NC M

N NC VSSQ NC VCCQ VSSQ NC NC NC NC NC NC NC NC NC N

P NC NC VCCQ VSSQ VCCQ VSSQ NC NC NC RFU NC NC NC NC P

1 2 3 4 5 6 7 8 9 10 11 12 13 14

Top View

Notes: 1. Some previous versions of the JEDEC product or mechanical specification had defined
reserved for future use (RFU) balls as no connect (NC) balls. NC balls assigned in the pre-
vious specifications could have been connected to ground on the system board. To ena-
ble new feature introduction, some of these balls are assigned as RFU in the v4.4 me-
chanical specification. Any new PCB footprint implementations should use the new ball
assignments and leave the RFU balls floating on the system board.
2. VCC, VCCQ, VSS, and VSSQ balls must all be connected on the system board.

CCMTD-1725822587-3071
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© 2015 Micron Technology, Inc. All rights reserved.
 Micron Confidential and Proprietary

8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

169-Ball Signal Assignments

169-Ball Signal Assignments

Figure 4: 169 Ball (Top View, Ball Down)

1 2 3 4 5 6 7 8 9 10 11 12 13 14

A NC NC NC NC

B NC NC

D NC NC

H NC NC DAT0 DAT1 DAT2 VSS RFU NC NC NC NC NC NC NC

J NC DAT3 DAT4 DAT5 DAT6 DAT7 NC NC NC NC NC NC NC NC

K NC VDDIM NC VSSQ NC VCCQ NC NC NC NC NC NC NC NC

L NC NC NC NC NC NC NC

M NC NC NC RFU VCC VSS RFU RFU RFU NC NC NC

N NC NC NC VCC RFU NC NC NC

P NC NC RFU VSS RFU NC NC NC

R NC NC NC DS VSS NC NC NC

T NC NC NC VSS VCC NC NC NC

U NC NC NC RST_n RFU RFU VSS VCC RFU NC NC NC

V NC NC NC NC NC NC

W NC NC NC VCCQ CMD CLK NC NC NC NC NC NC NC NC

Y NC VSSQ NC VCCQ VSSQ NC NC NC NC NC NC NC NC NC

AA NC NC VCCQ VSSQ VCCQ VSSQ NC NC NC RFU NC NC NC NC

AB

AC

AD

AE NC NC

AF

AG NC NC

AH NC NC NC NC

Notes: 1. Empty balls do not denote actual solder balls; they are position indicators only.

CCMTD-1725822587-3071
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© 2015 Micron Technology, Inc. All rights reserved.
 Micron Confidential and Proprietary

8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

169-Ball Signal Assignments

2. Some previous versions of the JEDEC product or mechanical specification had defined
reserved for future use (RFU) balls as no connect (NC) balls. NC balls assigned in the pre-
vious specifications could have been connected to ground on the system board. To ena-
ble new feature introduction, some of these balls are assigned as RFU in the JEDEC spec-
ification. Any new PCB footprint implementations should use the new ball assignments
and leave the RFU balls floating on the system board.
3. VCC, VCCQ, VSS, and VSSQ balls must all be connected on the system board.

CCMTD-1725822587-3071
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© 2015 Micron Technology, Inc. All rights reserved.
 Micron Confidential and Proprietary

8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

Package Dimensions

Package Dimensions

Figure 5: 100-Ball LBGA – 14mm × 18mm × 1.4mm (Package Code: DQ)

Seating plane

A 0.12 A

100X Ø0.537
Dimensions apply
to solder balls
post-reflow on
Ball A1 ID Ball A1 ID
Ø0.50 SMD ball pads.

10 9 8 7 6 5 4 3 2 1

A
B

D
E
F
11.5 CTR
G
18 ±0.1
H
10.0 CTR
J

16.0 CTR K
L
M
N
P

T
1.0 TYP
U

1.0 TYP 1.3 ±0.1

9.0 CTR — 0.12

12 CTR 0.316 MIN

14 ±0.1
56X Ø0.27 on 0.5 pitch.
Ni/Au plated test pads.
No solder balls.

Note: 1. Dimensions are in millimeters.

CCMTD-1725822587-3071
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 Micron Confidential and Proprietary

8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

Package Dimensions

Figure 6: 153-Ball TFBGA – 11.5mm × 13.0mm × 1.2mm (Package Code: NS)

Seating plane

A 0.08 A

153X Ø0.319
Dimensions
apply to solder
balls post-reflow
Ball A1 ID
on Ø0.30 SMD
(covered by SR) Ball A1 ID
ball pads.
14 12 10 8 6 4 2
13 11 9 7 5 3 1

A
B
C
D
E
6.5 CTR F
G
H
13 ±0.1 J
K
L
M
N
P

0.5 TYP

0.5 TYP 1.1 ±0.1

— 0.08
6.5 CTR
11.5 ±0.1 0.164 MIN
56X Ø0.27 on 0.5 pitch.
Ni/Au plated test pads.
No solder balls.

Note: 1. Dimensions are in millimeters.

CCMTD-1725822587-3071
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 Micron Confidential and Proprietary

8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

Package Dimensions

Figure 7: 153-Ball VFBGA – 11.5mm × 13.0mm × 1.0mm (Package Code: CN, JP)

Seating plane

A 0.08 A

153X Ø0.319
Dimensions apply Ball A1 ID
to solder balls post- (covered by SR) Ball A1 ID
reflow on Ø0.30 SMD
ball pads. 14 12 10 8 6 4 2
13 11 9 7 5 3 1

A
B
C
D
E
6.5 CTR F
G
H
13 ±0.1 J
K
L
M
N
P

0.5 TYP

0.5 TYP 0.164 MIN

6.5 CTR 0.9 ±0.1
— 0.08
11.5 ±0.1
56X Ø0.27 test pads.
Ni/Au plated on pitch.
No solder balls.

Note: 1. Dimensions are in millimeters.

CCMTD-1725822587-3071
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 Micron Confidential and Proprietary

8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

Package Dimensions

Figure 8: 169-Ball TFBGA – 14mm × 18mm × 1.2mm (Package Code: EF)

Seating plane

A 0.08 A

169X Ø0.319 Ball A1 ID

Dimensions apply (covered by SR)
to solder balls post-
reflow on Ø0.30 SMD Ball A1 ID
ball pads. 14 12 10 8 6 4 2
13 11 9 7 5 3 1

A
B
C
D
E
F
G
H
J
K
L
18 ±0.1 M
6.5 CTR N
P
R
T
13.5 CTR U
V
W
Y
AA
AB
AC
AD
AE
AF
AG
AH

0.5 TYP 0.5 TYP 1.1 ±0.1

— 0.08
6.5 CTR
14 ±0.1 0.164 MIN

56X Ø0.27 test pads.

Ni/Au plated on pitch.
No solder balls.

Note: 1. Dimensions are in millimeters.

CCMTD-1725822587-3071
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 Micron Confidential and Proprietary

8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

Package Dimensions

Figure 9: 169-Ball LFBGA – 14mm × 18mm × 1.4mm (Package Code: DN, CE)

Seating plane

A 0.08 A

169X Ø0.319
Dimensions apply
to solder balls post- Ball A1 ID Ball A1 ID
reflow on Ø0.30 SMD
14 12 10 8 6 4 2
ball pads. 13 11 9 7 5 3 1

A
B
C
D
E
F
G
H
J
K
L
18 ±0.1 M
6.5 CTR N
P
R
T
13.5 CTR U
V
W
Y
AA
AB
AC
AD
AE
AF
AG
AH

0.5 TYP 0.5 TYP 1.3 ±0.1

6.5 CTR — 0.08

14 ±0.1 0.214 ±0.05

56X Ø0.27 on pitch.

Ni/Au plated test pads.
No solder balls.

Note: 1. Dimensions are in millimeters.

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Architecture

Architecture
Figure 10: e.MMC Functional Block Diagram

e.MMC

MMC VCC
DS
controller VCCQ
RST_n
CMD Registers
DAT[7:0]
CLK
OCR CSD RCA
VDDIM
VSS1
CID ECSD DSR
VSSQ1

NAND Flash

Note: 1. VSS and VSSQ are internally connected.

MMC Protocol Independent of NAND Flash Technology

The MMC specification defines the communication protocol between a host and a de-
vice. The protocol is independent of the NAND Flash features included in the device.
The device has an intelligent on-board controller that manages the MMC communica-
tion protocol.
The controller also handles block management functions such as logical block alloca-
tion and wear leveling. These management functions require complex algorithms and
depend entirely on NAND Flash technology (generation or memory cell type).
The device handles these management functions internally, making them invisible to
the host processor.

Defect and Error Management

Micron e.MMC incorporates advanced technology for defect and error management. If
a defective block is identified, the device completely replaces the defective block with
one of the spare blocks. This process is invisible to the host and does not affect data
space allocated for the user.
The device also includes a built-in error correction code (ECC) algorithm to ensure that
data integrity is maintained.
To make the best use of these advanced technologies and ensure proper data loading
and storage over the life of the device, the host must exercise the following precautions:
• Check the status after WRITE, READ, and ERASE operations.
• Avoid power-down during WRITE and ERASE operations.

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OCR Register

OCR Register
The 32-bit operation conditions register (OCR) stores the voltage profile of the card and
the access mode indication. In addition, this register includes a status information bit.

Table 9: OCR Parameters

OCR Bits OCR Value Description

[31] 1b (ready)/0b (busy)1 Device power-on status bit
[30:29] 10b Sector mode
[28:24] 0 0000b Reserved
[23:15] 1 1111 1111b 2.7–3.6V voltage range
[14:8] 000 0000b 2.0–2.7V voltage range
[7] 1b 1.70–1.95V voltage range
[6:0] 000 0000b Reserved

Note: 1. OCR = C0FF8080h after the device has completed power-up.

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8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

CID Register

CID Register
The card identification (CID) register is 128 bits wide. It contains the device identifica-
tion information used during the card identification phase as required by e.MMC proto-
col. Each device is created with a unique identification number.

Table 10: CID Register Field Parameters

Name Field Width CID Bits CID Value

Manufacturer ID MID 8 [127:120] 13h
Reserved – 6 [119:114] –
Card/BGA CBX 2 [113:112] 01h
OEM/application ID OID 8 [111:104] –
Product name PNM 48 [103:56] 8GB:
0x52314A353541
(R1J55A)
16GB:
0x52314A35364C
(R1J56L)
32GB:
0x52314A35374C
(R1J57L)
64GB:
0x52314A353845
(R1J58E)
128GB:
0x52314A353945
(R1J59E)
Product revision PRV 8 [55:48] –
Product serial number PSN 32 [47:16] –
Manufacturing date MDT 8 [15:8] –
CRC7 checksum CRC 7 [7:1] –
Not used; always 1 – 1 0 –

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8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

CSD Register

CSD Register
The card-specific data (CSD) register provides information about accessing the device
contents. The CSD register defines the data format, error correction type, maximum da-
ta access time, and data transfer speed, as well as whether the DS register can be used.
The programmable part of the register (entries marked with W or E in the following ta-
ble) can be changed by the PROGRAM_CSD (CMD27) command.

Table 11: CSD Register Field Parameters

Size Cell CSD

Name Field Density (Bits) Type1 Bits CSD Value
CSD structure CSD_STRUCTURE – 2 R [127:126] 3h
System specification version SPEC_VERS – 4 R [125:122] 4h
Reserved2 – – 2 – [121:120] –
Data read access time 13 TAAC – 8 R [119:112] 7Fh
Data read access time 2 in CLK NSAC – 8 R [111:104] 01h
cycles (NSAC × 100)
Maximum bus clock frequency TRAN_SPEED – 8 R [103:96] 32h
Card command classes CCC – 12 R [95:84] 0F5h
Maximum read data block READ_BL_LEN – 4 R [83:80] 09h
length
Partial blocks for reads suppor- READ_BL_PARTIAL – 1 R [79] 0h
ted
Write block misalignment WRITE_BLK_MISALIGN – 1 R [78] 0h
Read block misalignment READ_BLK_MISALIGN – 1 R [77] 0h
DSR implemented DSR_IMP – 1 R [76] 0h
Reserved – – 2 – [75:74] –
Device size C_SIZE – 12 R [73:62] FFFh
Maximum read current at VDD_R_CURR_MIN – 3 R [61:59] 07h
VDD,min
Maximum read current at VDD_R_CURR_MAX – 3 R [58:56] 07h
VDD,max
Maximum write current at VDD_W_CURR_MIN – 3 R [55:53] 07h
VDD,min
Maximum write current at VDD_W_CURR_MAX – 3 R [52:50] 07h
VDD,max
Device size multiplier C_SIZE_MULT – 3 R [49:47] 07h
Erase group size ERASE_GRP_SIZE – 5 R [46:42] 1Fh
Erase group size multiplier ERASE_GRP_MULT – 5 R [41:37] 1Fh
Write protect group size WP_GRP_SIZE – 5 R [36:32] 0Fh
Write protect group enable WP_GRP_ENABLE – 1 R [31] 01h
Manufacturer default ECC DEFAULT_ECC – 2 R [30:29] 0h
Write-speed factor3 R2W_FACTOR – 3 R [28:26] 01h

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8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

CSD Register

Table 11: CSD Register Field Parameters (Continued)

Size Cell CSD

Name Field Density (Bits) Type1 Bits CSD Value
Maximum write data block WRITE_BL_LEN – 4 R [25:22] 09h
length
Partial blocks for writes suppor- WRITE_BL_PARTIAL – 1 R [21] 0h
ted
Reserved – – 4 – [20:17] –
Content protection application CONTENT_PROT_APP – 1 R [16] 0h
File-format group FILE_FORMAT_GRP – 1 R/W [15] 0h
Copy flag (OTP) COPY – 1 R/W [14] 0h
Permanent write protection PERM_WRITE_PROTECT – 1 R/W [13] 0h
Temporary write protection TMP_WRITE_PROTECT – 1 R/W/E [12] 0h
File format FILE_FORMAT – 2 R/W [11:10] 0h
ECC ECC – 2 R/W/E [9:8] 0h
CRC CRC – 7 R/W/E [7:1] –
Reserved – – 1 – [0] –

Notes: 1. R = Read-only;
R/W = One-time programmable and readable;
R/W/E = Multiple writable with value kept after a power cycle, assertion of the RST_n
signal, and any CMD0 reset, and readable
2. Reserved bits should be read as 0.
3. The reported values of TAAC and R2W_FACTOR include reliability routines and automo-
tive refresh features. Typical values are much lower. Refer to local Micron support for in-
formation.

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8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

ECSD Register

ECSD Register
The 512-byte extended card-specific data (ECSD) register defines device properties and
selected modes. The most significant 320 bytes are the properties segment. This seg-
ment defines device capabilities and cannot be modified by the host. The lower 192
bytes are the modes segment. The modes segment defines the configuration in which
the device is working. The host can change the properties of modes segments using the
SWITCH command.

Table 12: ECSD Register Field Parameters

Size Cell ECSD ECSD

Name Field Density (Bytes) Type1 Bytes Value
Properties Segment
Reserved2 – – 6 TBD [511:506] –
Extended security error EXT_SECURITY_ERR – 1 R [505] 00h
support
Supported command sets S_CMD_SET – 1 R [504] 01h
HPI features HPI_FEATURES – 1 R [503] 01h
Background operations BKOPS_SUPPORT – 1 R [502] 01h
support
Max-packed read com- MAX_PACKED_READS – 1 R [501] 3Fh
mands
Max-packed write com- MAX_PACKED_WRITES – 1 R [500] 3Fh
mands
Data tag support DATA_TAG_SUPPORT – 1 R [499] 01h
Tag unit size TAG_UNIT_SIZE – 1 R [498] 03h
Tag resources size TAG_RES_SIZE – 1 R [497] 00h
Context management ca- CONTEXT_CAPABILITIES – 1 R [496] 05h
pabilities
Large unit size LARGE_UNIT_SIZE_M1 – 1 R [495] 03h
Extended partitions attrib- EXT_SUPPORT – 1 R [494] 03h
ute support
Supported modes SUPPORTED_MODES – 1 R [493] 01h
Field firmware update fea- FFU_FEATURES – 1 R [492] 00h
tures
Operation code timeout OPERATION_CODE_TIMEOUT – 1 R [491] 00h
Field firmware update ar- FFU_ARG – 4 R [490:487] 0000FFFFh
guments
Reserved – – 181 TBD [486:306] –
Number of firmware sec- NUMBER_OF_FW_SECTORS_COR- – 4 R [305:302] 00h
tors correctly programmed RECTLY_PROGRAMMED
Vendor proprietary health VENDOR_PROPRIET- – 32 R [301:270] 00h
report ARY_HEALTH_REPORT
Device life time estimate DEVICE_LIFE_TIME_EST_TYP_B – 1 R [269] 01h
type B

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8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

ECSD Register

Table 12: ECSD Register Field Parameters (Continued)

Size Cell ECSD ECSD

Name Field Density (Bytes) Type1 Bytes Value
Device life time estimate DEVICE_LIFE_TIME_EST_TYP_A – 1 R [268] 01h
type A
Pre-end of life information PRE_EOL_INFO – 1 R [267] 01h
Optimal read size OPTIMAL_READ_SIZE – 1 R [266] 0h
Optimal write size OPTIMAL_WRITE_SIZE – 1 R [265] 40h
Optimal trim unit size OPTIMAL_TRIM_UNIT_SIZE – 1 R [264] 07h
Device version DEVICE_VERSION – 2 R [263:262] 0000h
Firmware version FIRMWARE_VERSION – 8 R [261:254] –
Power class for 200 MHz PWR_CL_DDR_200_360 – 1 R [253] –
DDR at VCC = 3.6V
Cache size CACHE_SIZE 8GB 4 R [252:249] 00000800h
16GB 00001000h
32GB 00002000h
64GB
128GB
Generic CMD6 timeout GENERIC_CMD6_TIME – 1 R [248] 0Ah
Power-off notification POWER_OFF_LONG_TIME – 1 R [247] 32h
(long) timeout
Background operations BKOPS_STATUS – 1 R [246] 00h
status
Number of correctly pro- CORRECTLY_PROG_SECTORS_NUM – 4 R [245:242] 00000000h
grammed sectors
First initialization time af- INI_TIMEOUT_AP – 1 R [241] 1Eh
ter partitioning (first
CMD1 to device ready)
Reserved – – 1 TBD [240] –
Power class for 52 MHz, PWR_CL_DDR_52_360 – 1 R [239] –
DDR at 3.6V
Power class for 52 MHz, PWR_CL_DDR_52_195 – 1 R [238] –
DDR at 1.95V
Power class for 200 MHz at PWR_CL_200_195 – 1 R [237] –
1.95V
Power class for 200 MHz, PWR_CL_200_130 – 1 R [236] –
at 1.3V
Minimum write perform- MIN_PERF_DDR_W_8_52 – 1 R [235] –
ance for 8-bit at 52 MHz in
DDR mode
Minimum read perform- MIN_PERF_DDR_R_8_52 – 1 R [234] –
ance for 8-bit at 52 MHz in
DDR mode

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8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

ECSD Register

Table 12: ECSD Register Field Parameters (Continued)

Size Cell ECSD ECSD

Name Field Density (Bytes) Type1 Bytes Value
Reserved – – 1 TBD [233] –
TRIM multiplier TRIM_MULT – 1 R [232] 02h
Secure feature support SEC_FEATURE_SUPPORT – 1 R [231] 55h
Secure erase multiplier SEC_ERASE_MULT – 1 R [230] 1Bh
Secure trim multiplier SEC_TRIM_MULT – 1 R [229] 11h
Boot information BOOT_INFO – 1 R [228] 07h
Reserved – – 1 TBD [227] –
Boot partition size3 BOOT_SIZE_MULT – 1 R [226] 40h
Access size ACC_SIZE 8GB 1 R [225] 07h
16GB 08h
32GB
64GB
128GB
High-capacity erase unit HC_ERASE_GRP_SIZE – 1 R [224] 01h
size
High-capacity erase time- ERASE_TIMEOUT_MULT – 1 R [223] 01h
out
Reliable write-sector count REL_WR_SEC_C – 1 R [222] 01h
High-capacity write pro- HC_WP_GRP_SIZE 8GB 1 R [221] 10h
tect group size 16GB
32GB
64GB 20h
128GB 40h
Sleep current (VCC) S_C_VCC – 1 R [220] 08h
Sleep current (VCCQ) S_C_VCCQ – 1 R [219] 09h
Production state aware- PRODUCTION_STATE_AWARE- – 1 TBD [218] 00h
ness timeout NESS_TIMEOUT
Sleep/awake timeout S_A_TIMEOUT – 1 R [217] 14h
Sleep notification timeout SLEEP_NOTIFICATION_TIME – 1 TBD [216] 0Dh
Sector count SEC_COUNT 8GB 4 R [215:212] 00E90000h
16GB 01D5C000h
32GB 03A40000h
64GB 07690000h
128GB 0E8F8000h
Reserved – – 1 TBD [211] –
Minimum write perform- MIN_PERF_W_8_52 – 1 R [210] –
ance for 8-bit at 52 MHz

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ECSD Register

Table 12: ECSD Register Field Parameters (Continued)

Size Cell ECSD ECSD

Name Field Density (Bytes) Type1 Bytes Value
Minimum read perform- MIN_PERF_R_8_52 – 1 R [209] –
ance for 8-bit at 52 MHz
Minimum write perform- MIN_PERF_W_8_26_4_52 – 1 R [208] –
ance for 8-bit at 26 MHz
and 4-bit at 52 MHz
Minimum read perform- MIN_PERF_R_8_26_4_52 – 1 R [207] –
ance for 8-bit at 26 MHz
and 4-bit at 52 MHz
Minimum write perform- MIN_PERF_W_4_26 – 1 R [206] –
ance for 4-bit at 26 MHz
Minimum read perform- MIN_PERF_R_4_26 – 1 R [205] –
ance for 4-bit at 26 MHz
Reserved – – 1 TBD [204] –
Power class for 26 MHz at PWR_CL_26_360 – 1 R [203] –
3.6V
Power class for 52 MHz at PWR_CL_52_360 – 1 R [202] –
3.6V
Power class for 26 MHz at PWR_CL_26_195 – 1 R [201] –
1.95V
Power class for 52 MHz at PWR_CL_52_195 – 1 R [200] –
1.95V
Partition switching timing PARTITION_SWITCH_TIME – 1 R [199] 01h
Out-of-interrupt busy tim- OUT_OF_INTERRUPT_TIME – 1 R [198] 0Fh
ing
I/O driver strength DRIVER_STRENGTH – 1 R [197] 1Fh
Device type DEVICE_TYPE – 1 R [196] 57h
Reserved – – 1 TBD [195] –
CSD structure version CSD_STRUCTURE – 1 R [194] 02h
Reserved – – 1 TBD [193] –
Extended CSD revision EXT_CSD_REV – 1 R [192] 07h
Modes Segment
Command set CMD_SET – 1 R/W/E_P [191] 00h
Reserved – – 1 TBD [190] –
Command set revision CMD_SET_REV – 1 R [189] 00h
Reserved – – 1 TBD [188] –
Power class POWER_CLASS – 1 R/W/E_P [187] 00h
Reserved – – 1 TBD [186] –
High-speed interface tim- HS_TIMING – 1 R/W/E_P [185] 00h
ing
Reserved – – 1 TBD [184] –

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ECSD Register

Table 12: ECSD Register Field Parameters (Continued)

Size Cell ECSD ECSD

Name Field Density (Bytes) Type1 Bytes Value
Bus width mode BUS_WIDTH – 1 W/E_P [183] 00h
Reserved – – 1 TBD [182] –
Erased memory content ERASED_MEM_CONT – 1 R [181] 00h
Reserved – – 1 TBD [180] –
Partition configuration PARTITION_CONFIG – 1 R/W/E, [179] 00h
R/W/E_P
Boot configuration protec- BOOT_CONFIG_PROT – 1 R/W, [178] 00h
tion R/W/C_P
Boot bus conditions BOOT_BUS_CONDITIONS – 1 R/W/E [177] 00h
Reserved – – 1 TBD [176] –
High-density erase group ERASE_GROUP_DEF – 1 R/W/E_P [175] 00h
definition
Boot write protection sta- BOOT_WP_STATUS – 1 R [174] 00h
tus registers
Boot area write protection BOOT_WP – 1 R/W, [173] 00h
register R/W/C_P
Reserved – – 1 TBD [172] –
User write protection reg- USER_WP – 1 R/W, [171] 00h
ister R/W/C_P,
R/W/E_P
Reserved – – 1 TBD [170] –
Firmware configuration FW_CONFIG – 1 R/W [169] 00h
RPMB size RPMB_SIZE_MULT – 1 R [168] 20h
Write reliability setting WR_REL_SET – 1 R/W [167] 1Fh
register4
Write reliability parameter WR_REL_PARAM – 1 R [166] 15h
register
SANITIZE START operation SANITIZE_START – 1 W/E_P [165] 00h
Manually start background BKOPS_START – 1 W/E_P [164] 00h
operations
Enable background opera- BKOPS_EN – 1 R/W [163] 00h
tions handshake
Hardware reset function RST_n_FUNCTION – 1 R/W [162] 00h
HPI management HPI_MGMT – 1 R/W/E_P [161] 00h
Partitioning support PARTITIONING_SUPPORT – 1 R [160] 07h
Maximum enhanced area MAX_ENH_SIZE_MULT 8GB 3 R [159:157] 0001CFh
size 16GB 0003A8h
32GB 000744h
64GB 000767h
128GB 000746h

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ECSD Register

Table 12: ECSD Register Field Parameters (Continued)

Size Cell ECSD ECSD

Name Field Density (Bytes) Type1 Bytes Value
Partitions attribute PARTITIONS_ATTRIBUTE – 1 R/W [156] 00h
Partitioning setting PARTITION_SETTING_COMPLETED – 1 R/W [155] 00h
General-purpose partition GP_SIZE_MULT – 12 R/W [154:143] 00h
size
Enhanced user data area ENH_SIZE_MULT – 3 R/W [142:140] 000000h
size
Enhanced user data start ENH_START_ADDR – 4 R/W [139:136] 00000000h
address
Reserved – – 1 TBD [135] –
Bad block management SEC_BAD_BLK_MGMNT – 1 R/W [134] 00h
mode
Production state aware- PRODUCTION_STATE_AWARENESS – 1 TBD [133] 00h
ness
Package case temperature TCASE_SUPPORT – 1 W/E_P [132] 00h
is controlled
Periodic wake-up PERIODIC_WAKEUP – 1 R/W/E [131] 00h
Program CID/CSD in DDR PROGRAM_CID_CSD_DDR_SUP- – 1 R [130] 01h
mode support PORT
Reserved – – 2 TBD [129:128] –
Vendor specific fields VENDOR_SPECIFIC_FIELD – 64 <vendor [127:64] –
specific>
Native sector size NATIVE_SECTOR_SIZE – 1 R [63] 00h
Sector size emulation USE_NATIVE_SECTOR – 1 R/W [62] 00h
Sector size DATA_SECTOR_SIZE – 1 R [61] 00h
1st initialization after disa- INI_TIMEOUT_EMU – 1 R [60] 00h
bling sector size emulation
Class 6 commands control CLASS_6_CTRL – 1 R/W/E_P [59] 00h
Number of addressed DYNCAP_NEEDED – 1 R [58] 00h
group to be released
Exception events control EXCEPTION_EVENTS_CTRL – 2 R/W/E_P [57:56] 0000h
Exception events status EXCEPTION_EVENTS_STATUS – 2 R [55:54] 0000h
Extended partitions attrib- EXT_PARTITIONS_ATTRIBUTE – 2 R/W [53:52] 0000h
ute
Context configuration CONTEXT_CONF – 15 R/W/E_P [51:37] 00h
Packed command status PACKED_COMMAND_STATUS – 1 R [36] 00h
Packed command failure PACKED_FAILURE_INDEX – 1 R [35] 00h
index
Power-off notification POWER_OFF_NOTIFICATION – 1 R/W/E_P [34] 00h
Control to turn the cache CACHE_CTRL – 1 R/W/E_P [33] 00h
ON/OFF

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ECSD Register

Table 12: ECSD Register Field Parameters (Continued)

Size Cell ECSD ECSD

Name Field Density (Bytes) Type1 Bytes Value
Flushing of the cache FLUSH_CACHE – 1 W/E_P [32] 00h
Reserved – – 1 TBD [31] –
Mode configuration MODE_CONFIG – 1 R/W/E_P [30] 00h
Mode operation codes MODE_OPERATION_CODES – 1 W/E_P [29] 00h
Reserved – – 2 TBD [28:27] –
Field firmware update sta- FFU_STATUS – 1 R [26] 00h
tus
Pre-loading data size PRE LOADING DATA SIZE – 4 R/W/E_P [25:22] 00h
Maximum pre-loading da- MAX_PRE_LOADING_DATA_SIZE – 4 R [21:18] TBD
ta size
Product state awareness PRODUCT_STATE_AWARENESS_EN- – 1 R/W/E&R [17] 00h
enablement ABLEMENT
Secure removal type SECURE_REMOVAL_TYPE – 1 R/W/E&R [16] 01h
Reserved – – 16 TBD [15:0] –

Notes: 1. R = Read-only;
R/W = One-time programmable and readable;
R/W/E = Multiple writable with the value kept after a power cycle, assertion of the
RST_n signal, and any CMD0 reset, and readable;
R/W/C_P = Writable after the value is cleared by a power cycle and assertion of the
RST_n signal (the value not cleared by CMD0 reset) and readable;
R/W/E_P = Multiple writable with the value reset after a power cycle, assertion of the
RST_n signal, and any CMD0 reset, and readable;
W/E_P = Multiple writable with the value reset after power cycle, assertion of the RST_n
signal, and any CMD0 reset, and not readable
2. Reserved bits should be read as 0.
3. Boot partition size is configurable by host. Refer to local Micron support for informa-
tion.
4. Micron has tested power failure under best-application knowledge conditions with posi-
tive results. Customers may request a dedicated test for their specific application condi-
tion. Micron set this register during factory test and used the one-time programming
option.

CCMTD-1725822587-3071
emmc_8-128GB_5_0_Automotive.pdf - Rev. N 06/18 EN 29 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2015 Micron Technology, Inc. All rights reserved.
 Micron Confidential and Proprietary

8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

DC Electrical Specifications – Device Power

DC Electrical Specifications – Device Power

The device current consumption for various device configurations is defined in the
power class fields of the ECSD register.
VCC is used for the NAND Flash device and its interface voltage; V CCQ is used for the
controller and the e·MMC interface voltage.

Figure 11: Device Power Diagram

VCC
C3 C4

VCCQ
C1 C2

RST_n
DS

Core regulator
NAND NAND Flash
VDDIM control signals
C5 C6 I/O block
I/O block

NAND
MMC

CLK Core NAND

CMD logic block
data bus

VCCQ
DAT[7:0]
MMC controller
VCCQ

Table 13: Absolute Maximum Ratings

Parameters Symbol Min Max Unit

Voltage input VIN –0.6 4.6 V
VCC supply VCC –0.6 4.6 V
VCCQ supply VCCQ –0.6 4.6 V

Note: 1. Voltage on any pin relative to VSS.

Table 14: Temperature Grade

Temperature Grade Condition Ambient Temperature - Ta Unit

AIT Operating –40 to 85 °C
Storage
AAT1 Operating –40 to 105 °C
Storage

Note: 1. Tcase for 16GB and 32GB can go up to 115°C.

CCMTD-1725822587-3071
emmc_8-128GB_5_0_Automotive.pdf - Rev. N 06/18 EN 30 Micron Technology, Inc. reserves the right to change products or specifications without notice.
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 Micron Confidential and Proprietary

8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

DC Electrical Specifications – Device Power

Table 15: Capacitor and Resistance Specifications

Parameter Symbol Min Max Typ Units Notes

Pull-up resistance: CMD R_CMD 4.7 50 10 kΩ 1
Pull-up resistance: DAT[7:0] R_DAT 10 50 50 kΩ 1
Pull-up resistance: RST_n R_RST_n 4.7 50 50 kΩ 2
CLK/CMD/DS/DAT[7:0] impedance 45 55 50 Ω 3
Serial resistance on CLK SR_CLK 0 47 22 Ω
Serial resistance on DS SR_DS 0 47 22 Ω 4
Pull-down resistance: DS R_DS 10 100 - kΩ
VCCQ capacitor C1 2.2 4.7 2.2 µF 5
C2 0.1 0.22 0.1
VCC capacitor C3 2.2 4.7 2.2 µF 6
C4 0.1 0.22 0.1
VDDIM capacitor (Creg) C5 1 4.7 1 µF 7
C6 0.1 0.1 0.1

Notes: 1. Used to prevent bus floating.

2. If host does not use H/W RESET (RST_n), pull-up resistance is not needed on RST_n line
(Extended_CSD[162] = 00h).
3. Impedance match.
4. Recommended in order to compensate eventual impedance mismatch on the PCB.
5. The coupling capacitor should be connected with VCCQ and VSSQ as closely as possible.
6. The coupling capacitor should be connected with VCC and VSS as closely as possible.
7. The coupling capacitor should be connected with VDDIM and VSS as closely as possible.

CCMTD-1725822587-3071
emmc_8-128GB_5_0_Automotive.pdf - Rev. N 06/18 EN 31 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2015 Micron Technology, Inc. All rights reserved.
 Micron Confidential and Proprietary

8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

Revision History

Revision History
Rev. N – 06/18
• Added T case information for 16GB and 32GB

Rev. M – 12/17
• Added Important Notes and Warnings section for further clarification aligning to in-
dustry standards
• Updated legal status to Production: 16GB, 32GB, 64GB, and 128GB with AIT and AAT
temperature range

Rev. L – 11/17
• Added 128GB in AAT temperature range as preliminary status
• Removed 64GB in AAT temperature range in DN package

Rev. K – 07/17
• Added part numbers as the legal status of Preliminary: MTFC16GAKAEJP-AIT,
MTFC32GAKAEJP-AIT, MTFC64GAJAECE-AIT, MTFC64GAJAECE-AAT, and
MTFC128GAJAECE-AIT
• Added package codes: CE and JP

Rev. J – 04/17
• Updated legal status of 8GB AAT to Production status
• Updated 169-Ball Signal Assignment: Ball K5 set as NC

Rev. H – 12/16
• Updated front page style
• Updated part numbers to Production: MTFC8GACAEDQ-K1 AIT, MTFC64GAJAEDQ-
AIT and MTFC8GACAENS-K1 AIT
• Removed part number: MTFC32GAKAECN-AAT ES
• Fixed Figure 2: eMMC Part Numbering
• Updated 8GB AAT to Preliminary status
• Added new part numbers: MTFC16GAKAEEF-AAT ‡, MTFC32GAKAEDQ-AAT ‡,
MTFC32GAKAEEF-AAT ‡, MTFC64GAJAEDN-AAT ‡ and MTFC64GAJAEDQ-AAT ‡
• Combined the note for the Performance tables and Current Consumption tables

Rev. G – 07/16
• Updated legal status to Production: MTFC64GAJAEDN-AIT and MTFC128GAJAEDN-
AIT

Rev. F – 05/16
• Added new part number: MTFC8GACAEDQ-AAT ES

CCMTD-1725822587-3071
emmc_8-128GB_5_0_Automotive.pdf - Rev. N 06/18 EN 32 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2015 Micron Technology, Inc. All rights reserved.
 Micron Confidential and Proprietary

8GB, 16GB, 32GB, 64GB, 128GB: e.MMC

Revision History

Rev. E – 04/16
• Added AAT temperature range
• Updated figure of Device Power Diagram in DC Electrical Specifications – Device
Power section (Addition of serial resistance on Data Strobe line)

Rev. D – 01/16
• Added Part Number 64GB-100ball

Rev. C – 01/16
• Removed "random access" from notes in performance
• Part Numbering updated to include digit "K1"
• Changed PWR_CL_DDR_200_360 value from FFh to "-"
• Updated performance and current values for 8-64-128GB

Rev. B – 12/15
• Changed TAAC value from 27h to 7Fh
• Changed R2W_FACTOR value from 2h to 1h

Rev. A – 11/15
• Initial release

8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-4000

www.micron.com/products/support Sales inquiries: 800-932-4992
Micron and the Micron logo are trademarks of Micron Technology, Inc.
All other trademarks are the property of their respective owners.
This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein.
Although considered final, these specifications are subject to change, as further product development and data characterization some-
times occur.

CCMTD-1725822587-3071
emmc_8-128GB_5_0_Automotive.pdf - Rev. N 06/18 EN 33 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2015 Micron Technology, Inc. All rights reserved.
MTFC32GAKAEEF- MTFC32GAKAEEF- MTFC32GAKAEJP-5 MTFC32GAKAEJP- MTFC64GAJAECE-
AAT AIT M AIT AIT AIT

MTFC16GAKAEDQ- MTFC32GAKAEDQ- MTFC64GAJAEDQ- MTFC8GACAEDQ- MTFC8GACAENS-

AIT AIT AAT K1 AIT AAT
 MTFC128GAJAECE- MTFC16GAKAEEF- MTFC16GAKAEEF- MTFC16GAKAEJP- MTFC32GAKAEDQ-
AAT AAT AIT AIT AAT

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