COA/ CS 2006/B. Tech (CSE/IT), DD (M.
Tech/ MBA)/4th/2017
Repeat Mid-Semester Examination
School of Computer Engineering
KIIT University, Bhubaneswar-24
Time: 2hrs Full Mark:25
(Answer any five questions including question No.1 which is compulsory.
The figures in the margin indicate full marks.)
1) Short Questions [1×5]
a) Explain the significant of carry and overflow flag.
b) Differentiate between micro program counter and program counter.
c) What is A two-word instruction is stored in a location A. The operand part of instruction holds B. If
the addressing mode is relative, the operand is available in location.
d) The content of register R1is 11010101. What will be the decimal value after execution of
AShiftR #2, R1. [Assume the number is represented in 2's complement format]
e) Match each of the high level language statements given on the left hand side with the most natural
addressing mode from those listed on the right hand side.
1. A[1] = B[J]; a) Indirect addressing
2. while [*A++]; b) Indexed, addressing
3. int temp = *x; c) Autoincrement
2) [2+3]
a) A cache consists of a total of 128 blocks. The main memory contains 2K blocks, each consisting of
32 words.
( i )How many bits are there in each of the TAG, BLOCK and WORD field in case of direct
mapping?
( ii )How many bits are there in each of the TAG, SET, and WORD field in case of 4-way set-
associative mapping?
b) Write the assembly code to evaluate the following arithmetic expression:
Z = ( A - B + C ) * (D / E * F)
i) Using an accumulator type computer with one address instructions.
ii) Using a stack organized computer with zero-address operation instructions.
iii) Using RISC computer instruction format.
3) [ 2.5+2.5]
a) Divide 11 ÷ 3 using restoring and non-restoring division algorithm. Give the flow table of division.
b) Write the sequence of control steps for the following instructions for single bus CPU organization.
Assume second operand is the destination operand.
a) MUL R1, (R2)
4) [2+3]
a) Write the function of control unit. Explain the following terms related to micro-programmed control
unit design:
COA/ CS 2006/B. Tech (CSE/IT), DD (M. Tech/ MBA)/4th/2017
(i) Micro program counter (ii) Micro Routine
(iii) Micro Instruction (iv) Control Store
b) Explain the working principle of Hardwired control unit design along with neat diagram. Explain its
advantages and disadvantages.
5) [2.5+2.5]
a) Write the IEEE 754 format for representing floating point numbers in single precision and double
precision format. Represent the decimal number 10.25 using IEEE 754 single precision floating
point format.
b) Write the sequence of control steps for the following instruction for multi bus CPU organization
ADD (R1), R2 // R2←[R1]+R2
6) [2.5+2.5]
a) Draw the schematic diagram of the architecture of a single bus CPU, clearly showing the general
purpose, Special purpose registers and the data path. Explain the function of each component.
b) An instruction is stored at location 600 with its address field at location 601. The address field has
the value 200. A processor register R1 contains the number 300. Evaluate the effective address if
the addressing mode of the instruction is direct, immediate, relative, register indirect, and index
with R1 as the index register.
7) Write short Notes (Answer any two) [2.5+2.5]
a) RISC vs CISC
b) Memory mapped I/O VS I/O mapped I/O
c) Von-Neumann Architecture VS Harvard Architecture
