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IEEE Transactions on Circuits and Systems - Part I: Regular Papers, Volume 61-I
Volume 61-I, Number 1, January 2014
- Shanthi Pavan:
Incoming Editorial. 1 - Xu Zhang, Ming Liu, Bo Wang, Hong Chen, Zhihua Wang:
A Wide Measurement Range and Fast Update Rate Integrated Interface for Capacitive Sensors Array. 2-11 - Masoud Ensafdaran, Won Namgoong:
Switched Current Integrating Sampler for Time Interleaved ADCs. 12-25 - Giovanni Marucci, Salvatore Levantino
, Paolo Maffezzoni, Carlo Samori
Analysis and Design of Low-Jitter Digital Bang-Bang Phase-Locked Loops. 26-36 - Shinichi Hori, Noriaki Matsuno, Tadashi Maeda, Hikaru Hida:
Low-Power Widely Tunable Gm-C Filter Employing an Adaptive DC-blocking, Triode-Biased MOSFET Transconductor. 37-47 - Zhe Gao, John C. Liobe, Mark F. Bocko
Indirect-Feedback Sigma-Delta Image Sensors: Theory, Modeling and Design. 48-60 - Paul P. Sotiriadis
Single-Bit Digital Frequency Synthesis via Dithered Nyquist-Rate Sinewave Quantization. 61-73 - Kwanyeob Chae, Saibal Mukhopadhyay:
A Dynamic Timing Error Prevention Technique in Pipelines With Time Borrowing and Clock Stretching. 74-83 - Skyler Weaver, Benjamin P. Hershberg, Un-Ku Moon:
Digitally Synthesized Stochastic Flash ADC Using Only Standard Digital Cells. 84-91 - Bing Li, Kong-Pang Pun:
A High Image-Rejection SC Quadrature Bandpass DSM for Low-IF Receivers. 92-105 - Ikbal Ali, B. N. Biswas, Sudhabindu Ray:
Improved Closed Form Large Injection Perturbation Analytical Model on the Output Spectrum of Unlocked Driven Oscillator - Part I: Phase Perturbation. 106-119 - Basant K. Mohanty
Memory Footprint Reduction for Power-Efficient Realization of 2-D Finite Impulse Response Filters. 120-133 - Piotr Zbigniew Wieczorek
Dual-Metastability Time-Competitive True Random Number Generator. 134-145 - Youngsoo Shin, Insup Shin, Donkyu Baek, Duckhwan Kim, Seungwhun Paik:
HAPL: Heterogeneous Array of Programmable Logic Using Selective Mask Patterning. 146-159 - Pierce I-Jen Chuang, Manoj Sachdev, Vincent C. Gaudet
A 167-ps 2.34-mW Single-Cycle 64-Bit Binary Tree Comparator With Constant-Delay Logic in 65-nm CMOS. 160-171 - Keshab K. Parhi
Low-Complexity Welch Power Spectral Density Computation. 172-182 - Mehmet Tamer Ozgun, Murat Torlak:
Effects of Random Delay Errors in Continuous-Time Semi-Digital Transversal Filters. 183-190 - Juuso Alhava, Markku Renfors
Recursive Algorithms for Modulated and Extended Lapped Transforms. 191-201 - Chia-Yu Yao, Wei-Chun Hsia, Yung-Hsiang Ho:
Designing Hardware-Efficient Fixed-Point FIR Filters in an Expanding Subexpression Space. 202-212 - Seok Kim, Youngkyun Jeong, Mira Lee, Kee-Won Kwon, Jung-Hoon Chun:
A 5.2-Gb/s Low-Swing Voltage-Mode Transmitter With an AC-/DC-Coupled Equalizer and a Voltage Offset Generator. 213-225 - Johan Löfgren, Liang Liu
Improved Matching-Pursuit Implementation for LTE Channel Estimation. 226-237 - Pieter A. J. Nuyts, Patrick Reynaert
Frequency-Domain Analysis of Digital PWM-Based RF Modulators for Flexible Wireless Transmitters. 238-246 - Raul Onet
Compact Variable Gain Amplifier for a Multistandard WLAN/WiMAX/LTE Receiver. 247-257 - Pere Palà-Schönwälder
A Superregenerative QPSK Receiver. 258-265 - David Murphy, Ahmad Mirzaei, Hooman Darabi, Mau-Chung Frank Chang
An LTV Analysis of the Frequency Translational Noise-Cancelling Receiver. 266-279 - Long Chen, Yixiao Wang, Chuan Wang, Jiayi Wang, Congyin Shi
A 4.2 mm2 72 mW Multistandard Direct-Conversion DTV Tuner in 65 nm CMOS. 280-292 - Xin Fu, Dylan T. Bespalko, Slim Boumaiza:
Novel Dual-Band Matching Network for Effective Design of Concurrent Dual-Band Power Amplifiers. 293-301 - Robert W. Santucci, Mahesh K. Banavar, Cihan Tepedelenlioglu, Andreas Spanias:
Energy-Efficient Distributed Estimation by Utilizing a Nonlinear Amplifier. 302-311 - Arash Nejadpak, Farzad Tahami
Stabilizing Controller Design for Quasi-Resonant Converters Described by a Class of Piecewise Linear Models. 312-323
Volume 61-I, Number 2, February 2014
- Kwang-Jin Koh, Seyed Yahya Mortazavi:
Finite Delay Response Harmonic Filters. 325-336 - Bo Wang
A Passive RFID Tag Embedded Temperature Sensor With Improved Process Spreads Immunity for a -30°C to 60°C Sensing Range. 337-346 - Marcio Bender Machado, Márcio Cherem Schneider, Carlos Galup-Montoro
On the Minimum Supply Voltage for MOSFET Oscillators. 347-357 - Ali Fazli Yeknami, Fahad Qazi, Atila Alvandpour:
Low-Power DT ΔΣ Modulators Using SC Passive Filters in 65 nm CMOS. 358-370 - Amr Suleiman, Ranko Sredojevic, Vladimir Stojanovic:
Model Predictive Control Equalization for High-Speed I/O Links. 371-381 - Chao Sun, Kousuke Miyaji, Koh Johguchi, Ken Takeuchi:
A High Performance and Energy-Efficient Cold Data Eviction Algorithm for 3D-TSV Hybrid ReRAM/MLC NAND SSD. 382-392 - Vehbi Calayir, Dmitri E. Nikonov
Static and Clocked Spintronic Circuit Design and Simulation With Performance Analysis Relative to CMOS. 393-406 - Muhammed S. Khairy, Amin Khajeh, Ahmed M. Eltawil
Equi-Noise: A Statistical Model That Combines Embedded Memory Failures and Channel Noise. 407-419 - Yanan Sun, Volkan Kursun
Carbon Nanotubes Blowing New Life Into NP Dynamic CMOS Circuits. 420-428 - Massimo Alioto, Simone Bongiovanni, Milena Djukanovic, Giuseppe Scotti
Effectiveness of Leakage Power Analysis Attacks on DPA-Resistant Logic Styles Under Process Variations. 429-442 - Weisheng Zhao, Mathieu Moreau
Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories. 443-454 - Yu Pan, Pramod Kumar Meher:
Bit-Level Optimization of Adder-Trees for Multiple Constant Multiplications for Efficient FIR Filter Implementation. 455-462 - Yu-Jui Chen, Cheng-Wen Wei, Yi FanChiang, Yi-Le Meng, Yi-Cheng Huang, Shyh-Jye Jou:
Neuromorphic Pitch Based Noise Reduction for Monosyllable Hearing Aid System Application. 463-475 - Junyoung Park, Injoon Hong, Gyeonghoon Kim, Byeong-Gyu Nam
Intelligent Network-on-Chip With Online Reinforcement Learning for Portable HD Object Recognition Processor. 476-484 - Nuray At, Jean-Luc Beuchat
Compact Hardware Implementations of ChaCha, BLAKE, Threefish, and Skein on FPGA. 485-498 - Guanghui Wen
Consensus Tracking of Multi-Agent Systems With Lipschitz-Type Node Dynamics and Switching Topologies. 499-511 - Sergio Sancho
Frequency-Domain Analysis of the Periodically-Forced Josephson-Junction Circuit. 512-521 - Aleksandra Bogojeska, Miroslav Mirchev, Igor Mishkovski, Ljupco Kocarev:
Synchronization and Consensus in State-Dependent Networks. 522-529 - Francisco J. Escribano
Chaos-Based Turbo Systems in Fading Channels. 530-541 - Xuyang Lou, Johan A. K. Suykens
Hybrid Coupled Local Minimizers. 542-551 - Wenhua Chen
A Concurrent Dual-Band Uneven Doherty Power Amplifier with Frequency-Dependent Input Power Division. 552-561 - Donggu Im, Ilku Nam:
A Wideband Digital TV Receiver Front-End With Noise and Distortion Cancellation. 562-572 - Kwang-Jin Koh, Seyed Yahya Mortazavi, Sadia Afroz:
Time Interleaved RF Carrier Modulations and Demodulations. 573-586 - Eric Rebeiz, Fang-Li Yuan, Paulo Urriza, Dejan Markovic, Danijela Cabric
Energy-Efficient Processor for Blind Signal Classification in Cognitive Radio Networks. 587-599 - Abdullah Eroglu:
Non-Invasive Quadrature Modulator Balancing Method to Optimize Image Band Rejection. 600-612 - Meng-Yuan Huang, Pei-Yun Tsai:
Toward Multi-Gigabit Wireless: Design of High-Throughput MIMO Detectors With Hardware-Efficient Architecture. 613-624 - Chenchang Zhan, Wing-Hung Ki
Analysis and Design of Output-Capacitor-Free Low-Dropout Regulators With Low Quiescent Current and High Power Supply Rejection. 625-636 - Zhenyu Shan, Chi K. Tse
Pre-Energized Auxiliary Circuits for Very Fast Transient Loads: Coping With Load-Informed Power Management for Computer Loads. 637-648
Volume 61-I, Number 3, March 2014
- Mauricio Pardo
A Band-Reject Nested-PLL Clock Cleaner Using a Tunable MEMS Oscillator. 653-662 - Alfio Dario Grasso
Self-Biased Dual-Path Push-Pull Output Buffer Amplifier for LCD Column Drivers. 663-670 - Stepan Sutula, Jofre Pallares Cuxart
A 25-µW All-MOS Potentiostatic Delta-Sigma ADC for Smart Electrochemical Sensors. 671-679 - Yutao Liu, Yizhi Han, Woogeun Rhee
A PSRR Enhancing Method for GRO TDC Based Clock Generation Systems. 680-688 - Joel Gak, Matías R. Miguez
Nanopower OTAs With Improved Linearity and Low Input Offset Using Bulk Degeneration. 689-698 - Wei Fei, Hao Yu
Design and Analysis of Wide Frequency-Tuning-Range CMOS 60 GHz VCO by Switching Inductor Loaded Transformer. 699-711 - Ülkühan Güler, Günhan Dündar
Modeling CMOS Ring Oscillator Performance as a Randomness Source. 712-724 - Manuel Medeiros Silva, Luís B. Oliveira
Regulated Common-Gate Transimpedance Amplifier Designed to Operate With a Silicon Photo-Multiplier at the Input. 725-735 - Milton Ernesto Romero Romero, Evandro Mazina Martins, Ricardo Ribeiro dos Santos, Mario Enrique Duarte Gonzalez
Universal Set of CMOS Gates for the Synthesis of Multiple Valued Logic Digital Circuits. 736-749 - Marco Crepaldi
A 0.07 mm2 Asynchronous Logic CMOS Pulsed Receiver Based on Radio Events Self-Synchronization. 750-763 - Wei Jing Xu, Ya Jun Yu, Håkan Johansson:
Improved Filter Bank Approach for the Design of Variable Bandedge and Fractional Delay Filters. 764-777 - Pramod Kumar Meher, Sang Yoon Park:
Critical-Path Analysis and Low-Complexity Implementation of the LMS Adaptive Algorithm. 778-788 - Shi Yan, Li Xu, Qinglin Zhao, Yafei Tian:
Elementary Operation Approach to Order Reduction for Roesser State-Space Model of Multidimensional Systems. 789-802 - Youneng Ma, Jinhua Yu, Yuanyuan Wang:
An Easy Pure Algebraic Method for Partial Fraction Expansion of Rational Functions With Multiple High-Order Poles. 803-810 - Miroslav Mirchev, Lasko Basnarkov, Fernando Corinto
Cooperative Phenomena in Networks of Oscillators With Non-Identical Interactions and Dynamics. 811-819 - Paul Merolla, John V. Arthur, Rodrigo Alvarez-Icaza, Jean-Marie Bussat, Kwabena Boahen:
A Multicast Tree Router for Multichip Neuromorphic Systems. 820-833 - Brian B. Johnson, Sairaj V. Dhople, Abdullah O. Hamadeh, Philip T. Krein:
Synchronization of Nonlinear Oscillators in an LTI Electrical Power Network. 834-844 - Hongyan Jia, Zengqiang Chen, Guoyuan Qi
Chaotic Characteristics Analysis and Circuit Implementation for a Fractional-Order System. 845-853 - Chaowen Shen, Simin Yu
A Systematic Methodology for Constructing Hyperchaotic Systems With Multiple Positive Lyapunov Exponents and Circuit Implementation. 854-864 - Naoya Onizawa, Shoun Matsunaga, Vincent C. Gaudet
High-Throughput Low-Energy Self-Timed CAM Based on Reordered Overlapped Search Mechanism. 865-876 - Peyman Nazari, Byung-Kwan Chun, Fred Tzeng, Payam Heydari:
Polar Quantizer for Wireless Receivers: Theory, Analysis, and CMOS Implementation. 877-887 - Xiaole Fang, Benjamin Wetzel
Noise and Chaos Contributions in Fast Random Bit Sequence Generated From Broadband Optoelectronic Entropy Sources. 888-901 - Umar Azad, Yuanxun Ethan Wang:
Direct Antenna Modulation (DAM) for Enhanced Capacity Performance of Near-Field Communication (NFC) Link. 902-910 - Wei-Chung Chen, Da-Long Ming, Yi-Ping Su, Yu-Huei Lee, Ke-Horng Chen
A Wide Load Range and High Efficiency Switched-Capacitor DC-DC Converter With Pseudo-Clock Controlled Load-dependent Frequency. 911-921 - Chung-Chieh Fang
Asymmetric Instability Conditions for Peak and Valley Current Programmed Converters at Light Loading. 922-929 - Zhenyu Shan, Chi K. Tse
Classification of Auxiliary Circuit Schemes for Feeding Fast Load Transients in Switching Power Supplies. 930-942 - Xiaozhe Wang, Hsiao-Dong Chiang:
Analytical Studies of Quasi Steady-State Model in Power System Long-Term Stability Analysis. 943-956 - Hsin-Liang Chen, Po-Sheng Chen, Jen-Shiun Chiang:
Correction to "A Low-Offset Low-Noise Sigma-Delta Modulator With Pseudorandom Chopper-Stabilization Technique". 957
Volume 61-I, Number 4, April 2014
- Ajay Kapoor, Cas Groot, Gerard Villar Pique, Hamed Fatemi, Juan Diego Echeverri, Leo Sevat, Maarten Vertregt, Maurice Meijer, Vibhu Sharma, Yu Pu, José Pineda de Gyvez:
Digital Systems Power Management for High Performance Mixed Signal Platforms. 961-975 - Xiuqin Wei, Tomoharu Nagashima, Marian K. Kazimierczuk, Hiroo Sekiya
Analysis and Design of Class-𝔼𝕄 Power Amplifier. 976-986 - Mohsen Hayati, Ali Lotfi, Marian K. Kazimierczuk, Hiroo Sekiya
Modeling and Analysis of Class-E Amplifier With a Shunt Inductor at Sub-Nominal Operation for Any Duty Ratio. 987-1000 - Haiqi Liu, Yanbo Wang, Changxi Xu, Xinqing Chen, Lei Lin, Yue Yu, Wei Wang, Amit Majumder, Gene Chui, Dave Brown, Al Fang:
A 5-Gb/s Serial-Link Redriver With Adaptive Equalizer and Transmitter Swing Enhancement. 1001-1011 - Diego E. Crivelli, Mario Rafael Hueda, Hugo S. Carrer, Martin Del Barco, Ramiro R. Lopez, Pablo Gianni, Jorge M. Finochietto, Norman Swenson, Paul Voois, Oscar E. Agazzi:
Architecture of a Single-Chip 50 Gb/s DP-QPSK/BPSK Transceiver With Electronic Dispersion Compensation for Coherent Optical Channels. 1012-1025 - Bill Ma, Fengqi Yu:
A Novel 1.2-V 4.5-ppm/°C Curvature-Compensated CMOS Bandgap Reference. 1026-1035 - Giorgio Maiellaro, Egidio Ragonese
Ambient Light Organic Sensor in a Printed Complementary Organic TFT Technology on Flexible Plastic Foil. 1036-1043 - Paolo Maffezzoni, Zheng Zhang
A Study of Deterministic Jitter in Crystal Oscillators. 1044-1054 - Binboga Siddik Yarman
High Precision Synthesis of a Richards Immittance Via Parametric Approach. 1055-1067 - Wei Wang, James F. Buckwalter:
A 10-Gb/s, 107-mW Double-Edge Pulsewidth Modulation Transceiver. 1068-1080 - Zhiyi Yu, Ruijin Xiao, Kaidi You, Heng Quan, Peng Ou, Zheng Yu, Maofei He, Jiajie Zhang, Yan Ying, Haofan Yang, Jun Han, Xu Cheng, Zhang Zhang, Ming-e Jing, Xiaoyang Zeng:
A 16-Core Processor With Shared-Memory and Message-Passing Communications. 1081-1094 - Shlomo Greenberg, Joseph Rabinowicz, Ron Tsechanski, Eugene Paperno:
Selective State Retention Power Gating Based on Gate-Level Analysis. 1095-1104 - Mohammed Shoaib, Kyong-Ho Lee, Niraj K. Jha, Naveen Verma:
A 0.6-107 µW Energy-Scalable Processor for Directly Analyzing Compressively-Sensed EEG. 1105-1118 - Shuhei Tanakamaru, Masafumi Doi, Ken Takeuchi:
NAND Flash Memory/ReRAM Hybrid Unified Solid-State-Storage Architecture. 1119-1132 - Kostas Tsoumanis, Sotirios Xydis, Constantinos Efstathiou, Nikolaos Moschopoulos, Kiamal Z. Pekmestzi:
An Optimized Modified Booth Recoder for Efficient Design of the Add-Multiply Operator. 1133-1143 - Reza Azarderakhsh, Kimmo U. Järvinen, Mehran Mozaffari Kermani
Efficient Algorithm and Architecture for Elliptic Curve Cryptography for Extremely Constrained Secure Applications. 1144-1155 - Dimitrios Schinianakis, Thanos Stouraitis
Multifunction Residue Architectures for Cryptography. 1156-1169 - Yin-Tsung Hwang, Wei-Da Chen, Cheng-Ru Hong:
A Low Complexity Geometric Mean Decomposition Computing Scheme and Its High Throughput VLSI Implementation. 1170-1182 - Wenjun Xiong, Wenwu Yu, Jinhu Lu
Fuzzy Modelling and Consensus of Nonlinear Multiagent Systems With Variable Structure. 1183-1191 - Mark Bradley, Eduard Alarcón, Orla Feely
Design-Oriented Analysis of Quantization-Induced Limit Cycles in a Multiple-Sampled Digitally Controlled Buck Converter. 1192-1205 - Shaghayegh Gomar, Arash Ahmadi
Digital Multiplierless Implementation of Biological Adaptive-Exponential Neuron Model. 1206-1219 - Wenbing Zhang, Yang Tang, Xiaotai Wu, Jian-An Fang:
Synchronization of Nonlinear Dynamical Networks With Heterogeneous Impulses. 1220-1228 - Ahmed Mohamed Mahmoud Mohamed, Slim Boumaiza, Raafat R. Mansour:
Electronically Tunable Doherty Power Amplifier for Multi-Mode Multi-Band Base Stations. 1229-1240 - Bo Yuan, Keshab K. Parhi
Low-Latency Successive-Cancellation Polar Decoder Architectures Using 2-Bit Decoding. 1241-1254 - Behrooz Nakhkoob, Mona Mostafa Hella:
A 5-Gb/s Noise Optimized Receiver Using a Switched TIA for Wireless Optical Communications. 1255-1268 - Chia-Yu Yao, Wei-Chun Hsia
A -21.2-dBm Dual-Channel UHF Passive CMOS RFID Tag Design. 1269-1279 - Amirhossein Alimohammad, Saeed Fouladi Fard:
A Compact Architecture for Simulation of Spatio-Temporally Correlated MIMO Fading Channels. 1280-1288 - Simon Effler, Mark Halton
Scalable Digital Power Controller With Phase Alignment and Frequency Synchronization. 1289-1297
Volume 61-I, Number 5, May 2014
- Yong Lian
Guest Editorial Special Section on the 2013 IEEE International Symposium on Circuits and Systems (ISCAS 2013). 1301-1303 - Xiao Liang Tan, Kuan Chuang Koay
A FVF LDO Regulator With Dual-Summed Miller Frequency Compensation for Wide Load Capacitance Range Applications. 1304-1312 - Ankesh Jain
Characterization Techniques for High Speed Oversampled Data Converters. 1313-1320 - Hua Wang
A Highly-Efficient Multi-Band Multi-Mode All-Digital Quadrature Transmitter. 1321-1330 - Chamith Wijenayake
All-Pass Filter-Based 2-D IIR Filter-Enhanced Beamformers for AESA Receivers. 1331-1342 - Salma Elabd, S. Balasubramanian, Q. Wu, Tony Quach, Aji Mattamana, Waleed Khalil:
Analytical and Experimental Study of Wide Tuning Range mm-Wave CMOS LC-VCOs. 1343-1354 - Håkan Johansson, Amir Eghbali:
Two Polynomial FIR Filter Structures With Variable Fractional Delay and Phase Shift. 1355-1365 - Fang Cai, Xinmiao Zhang, David Declercq, Shiva Kumar Planjery, Bane Vasic:
Finite Alphabet Iterative Decoders for LDPC Codes: Optimization, Architecture and Analysis. 1366-1375 - Guohui Wang, Hao Shen, Yang Sun, Joseph R. Cavallaro
Parallel Interleaver Design for a High Throughput HSPA+/LTE Multi-Standard Turbo Decoder. 1376-1389 - Le Zheng, Sangho Shin, Sung-Mo Steve Kang:
Modular Structure of Compact Model for Memristive Devices. 1390-1399 - Raj K. Jana
Energy-Efficient Clocking Based on Resonant Switching for Low-Power Computation. 1400-1408 - Suman Prasad Sah, Pawan Agarwal, Deuk Hyoun Heo:
On the Effects of Mismatch on Quadrature Accuracy in Tapped-Capacitor Load Independent Quadrature LC-Oscillators. 1409-1415 - Reza Sadeghpour, Abdolreza Nabavi:
Design Procedure of Quasi-Class-E Power Amplifier for Low-Breakdown-Voltage Devices. 1416-1428 - Timon Brückner, Christoph Zorn, Jens Anders
A GPU-Accelerated Web-Based Synthesis Tool for CT Sigma-Delta Modulators. 1429-1441 - Gerardo Molina Salgado, Alonso Morgado, Gordana Jovanovic-Dolecek
LC-Based Bandpass Continuous-Time Sigma-Delta Modulators With Widely Tunable Notch Frequency. 1442-1455 - Pasquale Corsonello
Over/Undershooting Effects in Accurate Buffer Delay Model for Sub-Threshold Domain. 1456-1464 - Shmuel Wimer, Arye Albahari:
A Look-Ahead Clock Gating Based on Auto-Gated Flip-Flops. 1465-1472 - Hong Zhu, Volkan Kursun
A Comprehensive Comparison of Data Stability Enhancement Techniques With Novel Nanoscale SRAM Cells Under Parameter Fluctuations. 1473-1484 - Wen-an Zhang, Steven Liu
Fusion Estimation for Sensor Networks With Nonuniform Estimation Rates. 1485-1498 - Bijit Kumar Das, Mrityunjoy Chakraborty:
Sparse Adaptive Filtering by an Adaptive Convex Combination of the LMS and the ZA-LMS Algorithms. 1499-1507 - Yang Tang, Huijun Gao, Jürgen Kurths:
Distributed Robust Synchronization of Dynamical Networks With Stochastic Coupling. 1508-1519 - Hui Liu, Ming Cao
Coupling Strength Allocation for Synchronization in Complex Networks Using Spectral Graph Theory. 1520-1530 - Jianxiang Xi, Yao Yu, Guangbin Liu, Yisheng Zhong:
Guaranteed-Cost Consensus for Singular Multi-Agent Systems With Switching Topologies. 1531-1542 - Kruno Milicevic
Experimental Investigation of Symmetry-Breaking in Ferroresonant Circuit. 1543-1552 - Mohammad Reza Khanzadi, Dan Kuylenstierna, Ashkan Panahi
Calculation of the Performance of Communication Systems From Measured Oscillator Phase Noise. 1553-1565 - Johan H. C. van den Heuvel, Yan Wu, Peter G. M. Baltus, Jean-Paul M. G. Linnartz
Front End Power Dissipation Minimization and Optimal Transmission Rate for Wireless Receivers. 1566-1577 - Luke T. Harwood, Paul A. Warr, Mark A. Beach
Chaotic Oscillator-Based Binary Phase-Shift Keying. 1578-1587 - Jae-Won Yang, Hyun-Lark Do:
Soft-Switching Bidirectional DC-DC Converter Using a Lossless Active Snubber. 1588-1596 - Julien De Vos, Denis Flandre
A Sizing Methodology for On-Chip Switched-Capacitor DC/DC Converters. 1597-1606
Volume 61-I, Number 6, June 2014
- Luis Henrique de Carvalho Ferreira
A 60-dB Gain OTA Operating at 0.25-V Power Supply in 130-nm Digital CMOS Process. 1609-1617 - Huan Peng, Nghia Tang, Youngoo Yang, Deukhyoun Heo:
CMOS Startup Charge Pump With Body Bias and Backward Control for Energy Harvesting Step-Up Converters. 1618-1628 - Shanthi Pavan:
Continuous-Time Delta-Sigma Modulator Design Using the Method of Moments. 1629-1637 - Hooman Rashtian, Shahriar Mirabbasi:
Applications of Body Biasing in Multistage CMOS Low-Noise Amplifiers. 1638-1647 - Wei-Zen Chen, Tai-You Lu, Yan-Ting Wang, Jhong-Ting Jian, Yi-Hung Yang, Kai-Ting Chang:
A 160-GHz Frequency-Translation Phase-Locked Loop With RSSI Assisted Frequency Acquisition. 1648-1655 - Shien-Chun Luo, Ching-Ji Huang, Yuan-Hua Chu:
A Wide-Range Level Shifter Using a Modified Wilson Current Mirror Hybrid Buffer. 1656-1665 - Xiaotie Wu, Xilin Liu
Current Mode Image Sensor With Improved Linearity and Fixed-Pattern Noise. 1666-1674 - Babak Hamidi, Hossein Miar Naimi:
Extended Noise Shaping in Sigma-Delta Modulator Using Cross-Coupled Paths. 1675-1686 - Piotr Patronik, Stanislaw J. Piestrak:
Design of Reverse Converters for General RNS Moduli Sets {2k, 2n-1, 2n+1, 2n+1-1} and {2k, 2n-1, 2n+1, 2n-1-1} (n even). 1687-1700 - Jeroen Delvaux
Fault Injection Modeling Attacks on 65 nm Arbiter and RO Sum PUFs via Environmental Changes. 1701-1713 - Naushad Alam
An Analytical Delay Model for Mechanical Stress Induced Systematic Variability Analysis in Nanoscale Circuit Design. 1714-1726 - Uma Sadhvi Potluri, Arjuna Madanayake
Improved 8-Point Approximate DCT for Image and Video Compression Requiring Only 14 Additions. 1727-1740 - Lionel Vincent, Edith Beigné
Dynamic Variability Monitoring Using Statistical Tests for Energy Efficient Adaptive Architectures. 1741-1754 - Djaafar Chabi, Weisheng Zhao, Erya Deng, Yue Zhang, Nesrine Ben Romdhane, Jacques-Olivier Klein
Ultra Low Power Magnetic Flip-Flop Based on Checkpointing/Power Gating and Self-Enable Mechanisms. 1755-1765 - Håkan Johansson, Amir Eghbali:
Add-Equalize Structures for Linear-Phase Nyquist FIR Filter Interpolators and Decimators. 1766-1777 - Haibo Du, Yigang He, Yingying Cheng:
Finite-Time Synchronization of a Class of Second-Order Nonlinear Multi-Agent Systems Using Output Feedback Control. 1778-1788 - Xi-Ming Sun, Sheng-Li Du, Peng Shi, Wei Wang, Li-Dong Wang:
Input-to-State Stability for Nonlinear Systems With Large Delay Periods Based on Switching Techniques. 1789-1800 - Carlos Murguia
Synchronization of Identical Linear Systems and Diffusive Time-Delayed Couplings. 1801-1814 - Elizabeth Rita Samuel
Model Order Reduction of Time-Delay Systems Using a Laguerre Expansion Technique. 1815-1823 - Christoph Roth, Sandro Belfanti, Christian Benkeser, Qiuting Huang:
Efficient Parallel Turbo-Decoding for High-Throughput Wireless Systems. 1824-1835 - Sayed Vahid Mir-Moghtadaei, Ali Fotowat-Ahmady, Abolghasem Zeidaabadi Nezhad, Wouter A. Serdijn:
A 90 nm-CMOS IR-UWB BPSK Transmitter With Spectrum Tunability to Improve Peaceful UWB-Narrowband Coexistence. 1836-1848 - Zhiwen Zhu, Xinping Huang, Mario Caron, Henry Leung:
Blind Self-Calibration Technique for I/Q Imbalances and DC-Offsets. 1849-1859 - Christian Senning, Lukas Bruderer, Josua Hunziker, Andreas Burg
A Lattice Reduction-Aided MIMO Channel Equalizer in 90 nm CMOS Achieving 720 Mb/s. 1860-1871 - Sejun Jeon, Hyeon-Min Bae:
BER-Aware ADC-Based 2×1 MIMO Blind Receiver for High Speed Broadband Communication Links. 1872-1882 - Sumit Bagga, André Mansano, Wouter A. Serdijn, John R. Long, Koen van Hartingsveldt, Kathleen Philips:
A Frequency-Selective Broadband Low-Noise Amplifier With Double-Loop Transformer Feedback. 1883-1891 - Sina Chiniforoosh
Direct Interfacing of Dynamic Average Models of Line-Commutated Rectifier Circuits in Nodal Analysis EMTP-Type Solution. 1892-1902
Volume 61-I, Number 7, July 2014
- Giuseppe Scotti
88-µ A 1-MHz Stray-Insensitive CMOS Current-Mode Interface IC for Differential Capacitive Sensors. 1905-1916 - Jingjing Yu, Ahmed Amer, Edgar Sánchez-Sinencio:
Electromagnetic Interference Resisting Operational Amplifier. 1917-1927 - Bing Li, Lei Sun, Chi-Tung Ko, Alex Kak-Yeung Wong, Kong-Pang Pun:
A High-Linearity Capacitance-to-Digital Converter Suppressing Charge Errors From Bottom-Plate Switches. 1928-1941 - Dario Bianchi, Fabio Quaglia, Andrea Mazzanti, Francesco Svelto:
Analysis and Design of a High Voltage Integrated Class-B Amplifier for Ultra-Sound Transducers. 1942-1951 - Kaiming Nie, Suying Yao, Jiangtao Xu, Jing Gao, Yu Xia:
A 128-Stage Analog Accumulator for CMOS TDI Image Sensor. 1952-1961 - Martin Di Federico, Pedro Julián
SCDVP: A Simplicial CNN Digital Visual Processor. 1962-1969 - Na Gong, Jinhui Wang, Ramalingam Sridhar:
Variation Aware Sleep Vector Selection in Dual Vt Dynamic OR Circuits for Low Leakage Register File Design. 1970-1983 - Shiva Kumar Madishetty, Arjuna Madanayake
Precise VLSI Architecture for AI Based 1-D/ 2-D Daub-6 Wavelet Filter Banks With Low Adder-Count. 1984-1993 - Jing Guo, Liyi Xiao, Zhigang Mao:
Novel Low-Power and Highly Reliable Radiation Hardened Memory Cell for 65 nm CMOS Technology. 1994-2001 - Mario Garrido
Low-Complexity Multiplierless Constant Rotators Based on Combined Coefficient Selection and Shift-and-Add Implementation (CCSSI). 2002-2012 - Hong Zhu, Volkan Kursun
Novel Low-Leakage and High-Speed Triple-Threshold-Voltage Buffers With Skewed Inputs and Outputs. 2013-2021 - Jingook Kim, Junho Lee, Sunki Cho, Chulsoon Hwang, Changwook Yoon, Jun Fan
Analytical Probability Density Calculation for Step Pulse Response of a Single-Ended Buffer With Arbitrary Power-Supply Voltage Fluctuations. 2022-2033 - Wameedh Nazar Flayyih
Crosstalk-Aware Multiple Error Detection Scheme Based on Two-Dimensional Parities for Energy Efficient Network on Chip. 2034-2047 - Md. Zulfiquar Ali Bhotto, Andreas Antoniou:
Affine-Projection-Like Adaptive-Filtering Algorithms Using Gradient-Based Step Size. 2048-2056 - Paolo Manfredi
Stochastic Modeling of Nonlinear Circuits via SPICE-Compatible Spectral Equivalents. 2057-2065 - Deyan Lin, S. Y. Ron Hui
Gas Discharge Lamps Are Volatile Memristors. 2066-2073 - Chang-Ming Lai, Kai-Wen Tan, Yen-Ju Chen, Ta-Shun Chu:
A UWB Impulse-Radio Timed-Array Radar With Time-Shifted Direct-Sampling Architecture in 0.18-µm CMOS. 2074-2087 - Yuelin Ma, Yasushi Yamao, Yoshihiko Akaiwa, Koji Ishibashi:
Wideband Digital Predistortion Using Spectral Extrapolation of Band-Limited Feedback Signal. 2088-2097 - Amany El-Gouhary
An Analysis of Phase Noise in Transformer-Based Dual-Tank Oscillators. 2098-2109 - Yi-Min Lin, Chih-Hsiang Hsu, Hsie-Chia Chang, Chen-Yi Lee:
A 2.56 Gb/s Soft RS (255, 239) Decoder Chip for Optical Communication Systems. 2110-2118 - Valentijn De Smedt
Transient Behavior and Phase Noise Performance of Pulsed-Harmonic Oscillators. 2119-2128 - Ravi Shivnaraine, Mohammad Sadegh Jalali, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
An 8-11 Gb/s Reference-Less Bang-Bang CDR Enabled by "Phase Reset". 2129-2138 - Li Sun, Quan Pan, Keh-Chung Wang, C. Patrick Yue
A 26-28-Gb/s Full-Rate Clock and Data Recovery Circuit With Embedded Equalizer in 65-nm CMOS. 2139-2149 - Fabian Angarita, Javier Valls
Reduced-Complexity Min-Sum Algorithm for Decoding LDPC Codes With Low Error-Floor. 2150-2158 - Muhammed S. Khairy, Chung-An Shen, Ahmed M. Eltawil
Algorithms and Architectures of Energy-Efficient Error-Resilient MIMO Detectors for Memory-Dominated Wireless Communication Systems. 2159-2171 - Ding Nie, Bertrand M. Hochwald, Erik Stauffer:
Systematic Design of Large-Scale Multiport Decoupling Networks. 2172-2181 - Gustavo Revel, Andrés E. Leon
Dynamics and Stability Analysis of a Power System With a PMSG-Based Wind Farm Performing Ancillary Services. 2182-2193 - Shunji Nakata
Energy Efficient Stepwise Charging of a Capacitor Using a DC-DC Converter With Consecutive Changes of its Duty Ratio. 2194-2203 - Santiago Sanchez Acevedo
Conditions for Existence of Equilibria of Systems With Constant Power Loads. 2204-2211 - Muhammad Ali Akbar, Jeong-A Lee:
Comments on "Self-Checking Carry-Select Adder Design Based on Two-Rail Encoding". 2212-2214
Volume 61-I, Number 8, August 2014
- José M. de la Rosa
Guest Editorial - Special Section on the 2013 IEEE Custom Integrated Circuits Conference (CICC 2013). 2217-2218 - Nagendra Krishnapura
A Model-Agnostic Technique for Simulating Per-Element Distortion Contributions. 2219-2228 - Sabrina Liao, Mark Horowitz:
A Verilog Piecewise-Linear Analog Behavior Model for Mixed-Signal Validation. 2229-2235 - Vaibhav Tripathi, Boris Murmann
Mismatch Characterization of Small Metal Fringe Capacitors. 2236-2242 - Shupeng Sun, Fa Wang, Soner Yaldiz, Xin Li, Lawrence T. Pileggi, Arun Natarajan, Mark A. Ferriss, Jean-Olivier Plouchart, Bodhisatwa Sadhu
Indirect Performance Sensing for On-Chip Self-Healing of Analog and RF Circuits. 2243-2252 - Siva V. Thyagarajan, Ali M. Niknejad, Christopher D. Hull:
A 60 GHz Drain-Source Neutralized Wideband Linear Power Amplifier in 28 nm CMOS. 2253-2262 - Trevor C. Caldwell, David Alldred, Zhao Li:
A Reconfigurable ΔΣ ADC With Up to 100 MHz Bandwidth Using Flash Reference Shuffling. 2263-2271 - Xiaochen Yang, Jin Liu:
A 10 GS/s 6 b Time-Interleaved Partially Active Flash ADC. 2272-2280 - Wonsik Yu, KwangSeok Kim, SeongHwan Cho:
A 148fsrms Integrated Noise 4 MHz Bandwidth Second-Order ΔΣ Time-to-Digital Converter With Gated Switched-Ring Oscillator. 2281-2289 - Shidhartha Das, Ganesh S. Dasika, Karthik Shivashankar, David M. Bull:
A 1 GHz Hardware Loop-Accelerator With Razor-Based Dynamic Adaptation for Energy-Efficient Operation. 2290-2298 - Jayita Das, Swaroop Ghosh:
Energy Barrier Model of SRAM for Improved Energy and Error Rates. 2299-2308 - Xuan Zhang
Evaluating Adaptive Clocking for Supply-Noise Resilience in Battery-Powered Aerial Microrobotic System-on-Chip. 2309-2317 - Richard A. Wachnik, Sungjae Lee, Li-Hong Pan, Hongmei Li, Ning Lu, Jing Wang, Christophe Bernicot, Raphael Bingert, Mai Randall, Scott K. Springer, Christopher S. Putnam:
Gate Stack Resistance and Limits to CMOS Logic Performance. 2318-2325 - Yeo Myung Kim, Tae Wook Kim:
An 11 b 7 ps Resolution Two-Step Time-to-Digital Converter With 3-D Vernier Space. 2326-2336 - Xueqing Li, Qi Wei, Zhen Xu, Jianan Liu, Hui Wang
A 14 Bit 500 MS/s CMOS DAC Using Complementary Switched Current Sources and Time-Relaxed Interleaving DRRZ. 2337-2347 - Sunil Rana
Energy and Latency Optimization in NEM Relay-Based Digital Circuits. 2348-2359 - Chao Sun, Tomoko Ogura Iwasaki, Takahiro Onagi, Koh Johguchi, Ken Takeuchi:
Cost, Capacity, and Performance Analyses for Hybrid SCM/NAND Flash SSD. 2360-2369 - Li Cao, Jianguo Liu
Novel Structures for Cyclic Convolution Using Improved First-Order Moment Algorithm. 2370-2379 - Chaowen Shen, Simin Yu
Designing Hyperchaotic Systems With Any Desired Number of Positive Lyapunov Exponents via A Simple Model. 2380-2389 - Janusz A. Starzyk, Basawaraj
Memristor Crossbar Architecture for Synchronous Neural Networks. 2390-2401 - Eike Linn, Anne Siemon, Rainer Waser
Applicability of Well-Established Memristive Models for Simulations of Resistive Switching Devices. 2402-2410 - Fei Xiao:
Direct Synthesis of General Chebyshev Bandpass Filters in the Bandpass Domain. 2411-2421 - Liang Liu
Energy-Efficient Soft-Input Soft-Output Signal Detector for Iterative MIMO Receivers. 2422-2432 - Masoud Meghdadi
Two-Dimensional Multi-Parameter Adaptation of Noise, Linearity, and Power Consumption in Wireless Receivers. 2433-2443 - Herman Jalli Ng, Reinhard Feger, Andreas Stelzer:
A Fully-Integrated 77-GHz UWB Pseudo-Random Noise Radar Transceiver With a Programmable Sequence Generator in SiGe Technology. 2444-2455 - Muhammad S. Khairy, Amin Khajeh, Ahmed M. Eltawil
Joint Power Management and Adaptive Modulation and Coding for Wireless Communications Systems With Unreliable Buffering Memories. 2456-2465 - Joon-Yeong Lee, Jong-Hyeok Yoon, Hyeon-Min Bae:
A 10-Gb/s CDR With an Adaptive Optimum Loop-Bandwidth Calibrator for Serial Communication Links. 2466-2472 - Yuanjin Zheng, Yao Zhu
A 3.54 nJ/bit-RX, 0.671 nJ/bit-TX Burst Mode Super-Regenerative UWB Transceiver in 0.18-µm CMOS. 2473-2481 - Young-Ju Kim, Sang-Hye Chung, Lee-Sup Kim:
A Quarter-Rate Forwarded Clock Receiver Based on ILO With Low Jitter Tracking Bandwidth Variation Using Phase Shifting Phenomenon in 65 nm CMOS. 2482-2490 - Ugur Çilingiroglu
On-Chip Photovoltaic Energy Conversion in Bulk-CMOS for Indoor Applications. 2491-2504 - Jae-Won Yang, Hyun-Lark Do:
High-Efficiency ZVS AC-DC LED Driver Using a Self-Driven Synchronous Rectifier. 2505-2512
Volume 61-I, Number 9, September 2014
- Ahmed S. Elwakil
Single Transistor Active Filters: What is Possible and What is Not. 2517-2524 - Henri Ruotsalainen, Holger Arthaber
Quantization Noise Reduction Techniques for Digital Pulsed RF Signal Generation Based on Quadrature Noise Shaped Encoding. 2525-2536 - Stefano Perticaroli, Stefano Dal Toso, Fabrizio Palma:
A Harmonic Class-C CMOS VCO-Based on Low Frequency Feedback Loop: Theoretical Analysis and Experimental Results. 2537-2549 - Xilin Liu
A Low-Power Multifunctional CMOS Sensor Node for an Electronic Facade. 2550-2559 - Zhicheng Lin, Pui-In Mak
Analysis and Modeling of a Gain-Boosted N-Path Switched-Capacitor Bandpass Filter. 2560-2568 - Christian Hangmann, Christian Hedayat, Ulrich Hilleringmann
Stability Analysis of a Charge Pump Phase-Locked Loop Using Autonomous Difference Equations. 2569-2577 - Yi-Wei Chiu, Yu-Hao Hu, Ming-Hsien Tu, Jun-Kai Zhao, Yuan-Hua Chu, Shyh-Jye Jou, Ching-Te Chuang:
40 nm Bit-Interleaving 12T Subthreshold SRAM With Data-Aware Write-Assist. 2578-2585 - Przemyslaw Mroszczyk, Piotr Dudek:
Tunable CMOS Delay Gate With Improved Matching Properties. 2586-2595 - Swaroop Ghosh:
Modeling of Retention Time for High-Speed Embedded Dynamic Random Access Memories. 2596-2604 - Kejie Huang
A Low Active Leakage and High Reliability Phase Change Memory (PCM) Based Non-Volatile FPGA Storage Element. 2605-2613 - Kejie Huang
A Low Power Localized 2T1R STT-MRAM Array With Pipelined Quad-Phase Saving Scheme for Zero Sleep Power Systems. 2614-2623 - Weikai Xu, Lin Wang, Guanrong Chen
Performance Analysis of the CS-DCSK/BPSK Communication System. 2624-2633 - Aynaz Vatankhahghadim, Safeen Huda, Ali Sheikholeslami:
A Survey on Circuit Modeling of Spin-Transfer-Torque Magnetic Tunnel Junctions. 2634-2643 - Maiying Zhong, Dingfei Guo, Donghua Zhou:
A Krein Space Approach to H∞ Filtering of Discrete-Time Nonlinear Systems. 2644-2652 - Masaaki Kojima
Multimode Oscillations in Coupled Oscillators With High-Order Nonlinear Characteristics. 2653-2662 - Roberto Diversi
Bias-Compensated Least Squares Identification of Distributed Thermal Models for Many-Core Systems-on-Chip. 2663-2676 - Sairaj V. Dhople, Brian B. Johnson, Florian Dörfler
Synchronization of Nonlinear Circuits in Dynamic Electrical Networks With General Topologies. 2677-2690 - Junghwan Han
A SAW-Less Receiver Front-End Employing Body-Effect Control IIP2 Calibration. 2691-2698 - Rahul Shrestha, Roy P. Paily
High-Throughput Turbo Decoder With Parallel Architecture for LTE Wireless Communication Standards. 2699-2710 - Injae Yoo, Bongjin Kim, In-Cheol Park
Tail-Overlapped SISO Decoding for High-Throughput LTE-Advanced Turbo Decoders. 2711-2720 - Chia-Hsiang Yang
A 5.4 µW Soft-Decision BCH Decoder for Wireless Body Area Networks. 2721-2729 - Robert Chen-Hao Chang
Implementation of a High-Throughput Modified Merge Sort in MIMO Detection Systems. 2730-2737 - Chung-Chao Cheng, Jeng-Da Yang, Huang-Chang Lee, Chia-Hsiang Yang
A Fully Parallel LDPC Decoder Architecture Using Probabilistic Min-Sum Algorithm for High-Throughput Applications. 2738-2746 - Goodarz Ghanavati, Paul D. H. Hines, Taras I. Lakoba, Eduardo Cotilla Sanchez:
Understanding Early Indicators of Critical Transitions in Power Systems From Autocorrelation Functions. 2747-2760 - Benoit Labbe
Design and Stability Analysis of a Frequency Controlled Sliding-Mode Buck Converter. 2761-2770 - Masaaki Takada, Yutaka Hori, Shinji Hara
Comments and Corrections on "Stability of Genetic Regulatory Networks With Time Delay". 2771-2774
Volume 61-I, Number 10, October 2014
- Kai Ho Mak, Ka Nang Leung
A Signal- and Transient-Current Boosting Amplifier for Large Capacitive Load Applications. 2777-2785 - Chao-Chang Chiu, Moris Lin, Chih-Wei Chang, Che-Hao Meng, Hsiang-An Yang, Ke-Horng Chen
Self-Calibrated Knee Voltage Detector With 99.65% High Accuracy for AC Charger System in 0.5 µm 500 V UHV Process. 2786-2795 - Taewook Kim, Changsok Han, Nima Maghari:
Noise-Shaped Residue-Discharging Delta-Sigma ADCs With Time-Modulated Pulse Feedback. 2796-2804 - Chien-Jian Tseng, Chieh-Fan Lai, Hsin-Shu Chen
A 6-Bit 1 GS/s Pipeline ADC Using Incomplete Settling With Background Sampling-Point Calibration. 2805-2815 - Kushal Das, Torsten Lehmann, Andrew Steven Dzurak
Sub-Nanoampere One-Shot Single Electron Transistor Readout Electrometry Below 10 Kelvin. 2816-2824 - Carlos Augusto de Moraes Cruz
FPN Attenuation by Reset-Drain Actuation in the Linear-Logarithmic Active Pixel Sensor. 2825-2833 - Kun-Lin Tsai
Automatic Charge Balancing Content Addressable Memory With Self-control Mechanism. 2834-2841 - Jongwook Sohn, Earl E. Swartzlander Jr.:
A Fused Floating-Point Three-Term Adder. 2842-2850 - Jian Zhang, Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Configurable Circuits Featuring Dual-Threshold-Voltage Design With Three-Independent-Gate Silicon Nanowire FETs. 2851-2861 - Shengbo Zhang, Jun Xiao, Guangjun Yang, Jian Hu, Mingyong Huang, Shichang Zou:
A 1.35-V 16-Mb Twin-Bit-Cell Virtual-Ground-Architecture Embedded Flash Memory With a Sensing Current Protection Technique. 2862-2868 - Sau-Gee Chen, Shen-Jui Huang, Mario Garrido
Continuous-flow Parallel Bit-Reversal Circuit for MDF and MDC FFT Architectures. 2869-2877 - Ariel Burg, Osnat Keren:
Universal Hardware for Systems With Acceptable Representations as Low Order Polynomials. 2878-2887 - Dongsheng Yu, Herbert Ho-Ching Iu, Andrew Lewis Fitch, Yan Liang:
A Floating Memristor Emulator Based Relaxation Oscillator. 2888-2896 - Jufang Chen, Xiaoming Zhang, Jianhua Peng:
Time-Delayed Chaotic Circuit Design Using All-Pass Filter. 2897-2903 - Tomoharu Nagashima, Xiuqin Wei, Hisa-Aki Tanaka, Hiroo Sekiya
Locking Range Derivations for Injection-Locked Class-E Oscillator Applying Phase Reduction Theory. 2904-2911 - Paolo Maffezzoni, Salvatore Levantino
Phase Noise of Pulse Injection-Locked Oscillators. 2912-2919 - Tuck-Boon Chan, Wei-Ting Jonas Chan, Andrew B. Kahng:
On Aging-Aware Signoff for Circuits With Adaptive Voltage Scaling. 2920-2930 - Dongkun Han, Graziano Chesi:
Robust Synchronization via Homogeneous Parameter-Dependent Polynomial Contraction Matrix. 2931-2940 - Minyu Feng
Highest Degree Likelihood Search Algorithm Using a State Transition Matrix for Complex Networks. 2941-2950 - Ronghui Zhang, Mustafa Acar, Mark P. van der Heijden, Melina Apostolidou, Domine Leenaerts:
Generalized Semi-Analytical Design Methodology of Class-E Outphasing Power Amplifier. 2951-2960 - Melvin Heng Li Lim, Wang Ling Goh:
High-Throughput Cognitive-Amplification Detector for LDPC Decoders. 2961-2969 - Sangjin Byun
Analysis and Design of CMOS Received Signal Strength Indicator. 2970-2977 - Shunta Iguchi, Akira Saito, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya:
Design Method of Class-F Power Amplifier With Output Power of -20 dBm and Efficient Dual Supply Voltage Transmitter. 2978-2986 - Taylor W. Barton, David J. Perreault
Four-Way Microstrip-Based Power Combining for Microwave Outphasing Power Amplifiers. 2987-2998 - Sen Wang, Wen-Jie Lin:
A 10/24-GHz CMOS/IPD Monopulse Receiver for Angle-Discrimination Radars. 2999-3006 - Hong-Soon Cho, Chung-Hwan Kim, Sang-Gug Lee:
A High-Sensitivity and Low-Walk Error LADAR Receiver for Military Application. 3007-3015 - Kyu-Dong Hwang, Lee-Sup Kim:
A 5 Gbps 1.6 mW/G bps/CH Adaptive Crosstalk Cancellation Scheme With Reference-less Digital Calibration and Switched Termination Resistors for Single-Ended Parallel Interface. 3016-3024 - Liang Wu, Howard C. Luong
A 49-to-62 GHz Quadrature VCO With Bimodal Enhanced-Magnetic-Tuning Technique. 3025-3033 - Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim:
An Approximate Closed-Form Channel Model for Diverse Interconnect Applications. 3034-3043 - Fabio Pareschi
Short-term Optimized Spread Spectrum Clock Generator for EMI Reduction in Switching DC/DC Converters. 3044-3053
Volume 61-I, Number 11, November 2014
- Andrew Marshall:
Thoughts on Possible Future Charge-Based Technologies for Nano-Electronics. 3057-3065 - Matthias Völker, Sara Pashmineh, Johann Hauer, Maurits Ortmanns:
Current Feedback Linearization Applied to Oscillator Based ADCs. 3066-3074 - Amin Ojani, Behzad Mesgarzadeh, Atila Alvandpour:
Modeling and Analysis of Harmonic Spurs in DLL-Based Frequency Synthesizers. 3075-3084 - Denis Guangyin Chen, Fang Tang, Man Kay Law, Xiaopeng Zhong, Amine Bermak
A 64 fJ/step 9-bit SAR ADC Array With Forward Error Correction and Mixed-Signal CDS for CMOS Image Sensors. 3085-3093 - Neeraj K. Mandloi, Giacomo Indiveri
Compact Analog Temporal Edge Detector Circuit With Programmable Adaptive Threshold for Neuromorphic Vision Sensors. 3094-3104 - Kamyar Keikhosravy, Shahriar Mirabbasi:
A 0.13-µm CMOS Low-Power Capacitor-Less LDO Regulator Using Bulk-Modulation Technique. 3105-3114 - Chiou-Yng Lee, Chun-Sheng Yang, Bimal Kumar Meher, Pramod Kumar Meher, Jeng-Shyang Pan
Low-Complexity Digit-Serial and Scalable SPB/GPB Multipliers Over Large Binary Extension Fields Using (b, 2)-Way Karatsuba Decomposition. 3115-3124 - Chiou-Yng Lee, Pramod Kumar Meher, Chien-Ping Chang:
Efficient $M$ -ary Exponentiation over $GF(2^{m})$ Using Subquadratic KA-Based Three-Operand Montgomery Multiplier. 3125-3134 - Nicolas Laflamme-Mayer, Yves Blaquière, Yvon Savaria, Mohamad Sawan:
A Configurable Multi-Rail Power and I/O Pad Applied to Wafer-Scale Systems. 3135-3144 - Chun-Hung Lai, Yun-Chung Yang, Ing-Jer Huang:
A Versatile Data Cache for Trace Buffer Support. 3145-3154 - Ibrahim Kazi, Pascal Andreas Meinerzhagen, Pierre-Emmanuel Gaillardon, Davide Sacchetto, Yusuf Leblebici, Andreas Peter Burg
Energy/Reliability Trade-Offs in Low-Voltage ReRAM-Based Non-Volatile Flip-Flop Design. 3155-3164 - Sukhwan Choi, Hyunsik Kim
Auto-Scaling Overdrive Method Using Adaptive Charge Amplification for PRAM Write Performance Enhancement. 3165-3174 - Itamar Levi, Amir Albeck, Alexander Fish
A Low Energy and High Performance ${\rm DM}^{2}$ Adder. 3175-3183 - David Seebacher, Peter Singerl, Christian Schuberth, Franz Dielacher
Reduction of Aliasing Effects of RF PWM Modulated Signals by Cross Point Estimation. 3184-3192 - Sushil Subramanian, Hossein Hashemi
Reconfigurable Quantization of Oversampled Signals Under Discrete-Time Filtering. 3193-3205 - Wen Bin Ye, Ya Jun Yu:
Bit-Level Multiplierless FIR Filter Optimization Incorporating Sparse Filter Technique. 3206-3215 - Shuna Zhang, Xiaoqun Wu, Junan Lu, Hui Feng, Jinhu Lu
Recovering Structures of Complex Dynamical Networks Based on Generalized Outer Synchronization. 3216-3224 - Guillermo Gallego
Optimal Polygonal L1 Linearization and Fast Interpolation of Nonlinear Systems. 3225-3234 - Edward J. Hancock
Restricted Partial Stability and Synchronization. 3235-3244 - Guanghui Wen
H∞ Pinning Synchronization of Directed Networks With Aperiodic Sampled-Data Communications. 3245-3255 - Enrico Roverato, Marko Kosunen
RX-Band Noise Reduction in All-Digital Transmitters With Configurable Spectral Shaping of Quantization and Mismatch Errors. 3256-3265 - Yun Yin, Baoyong Chi, Yanqiang Gao, Xiaodong Liu, Zhihua Wang:
A 0.1-5.0 GHz Reconfigurable Transmitter With Dual-Mode Power Amplifier and Digitally-Assisted Self-Calibration for Private Network Communications. 3266-3277 - Fanta Chen, Min-Sheng Kao, Yu-Hao Hsu, Jen-Ming Wu, Ching-Te Chiu, Shawn S. H. Hsu, Mau-Chung Frank Chang
A 10-Gb/s Low Jitter Single-Loop Clock and Data Recovery Circuit With Rotational Phase Frequency Detector. 3278-3287 - Bin Luo, Shichuang Wu, Nanrun Zhou:
Flexible Design Method for Multi-Repeater Wireless Power Transfer System Based on Coupled Resonator Bandpass Filter Model. 3288-3297 - Shiquan Fan, Zhongming Xue, Hao Lu, Yan Song, Haiqi Li, Li Geng:
Area-Efficient On-Chip DC-DC Converter With Multiple-Output for Bio-Medical Applications. 3298-3308 - Hans Raben, Johan Borg
Design of Voltage Multipliers for Maximized DC Generation in Inductively Coupled RFID Tags. 3309-3317
Volume 61-I, Number 12, December 2014
- Mehrdad A. Ghanad, Michael M. Green, Catherine Dehollain:
A 15 µW 5.5 kS/s Resistive Sensor Readout Circuit with 7.6 ENOB. 3321-3329 - Thanh Trung Nguyen, Tao Feng, Philipp Häfliger
Hybrid CMOS Rectifier Based on Synergistic RF-Piezoelectric Energy Scavenging. 3330-3338 - Yin-Nien Chen, Ming-Long Fan, Vita Pi-Ho Hu
Evaluation of Sub-0.2 V High-Speed Low-Power Circuits Using Hetero-Channel MOSFET and Tunneling FET Devices. 3339-3347 - Vishnu Unnikrishnan
Time-Mode Analog-to-Digital Conversion Using Standard Cells. 3348-3357 - Shabnam Ladan, Ajay Babu Guntupalli, Ke Wu:
A High-Efficiency 24 GHz Rectenna Development Towards Millimeter-Wave Energy Harvesting and Wireless Power Transmission. 3358-3366 - John Lynch, Pedro P. Irazoqui
A Low Power Logic-Compatible Multi-Bit Memory Bit Cell Architecture With Differential Pair and Current Stop Constructs. 3367-3375 - Taehui Na
Reference-Scheme Study and Novel Reference Scheme for Deep Submicrometer STT-RAM. 3376-3385 - Roghayeh Saeidi
Statistical Analysis of Read Static Noise Margin for Near/Sub-Threshold SRAM Cell. 3386-3393 - Song-Nien Tang, Fu-Chiang Jan, Hui-Wen Cheng, Ching-Kai Lin, Guo-Zua Wu:
Multimode Memory-Based FFT Processor for Wireless Display FD-OCT Medical Systems. 3394-3406 - Baljit Kaur
Efficient ECSM Characterization Considering Voltage, Temperature, and Mechanical Stress Variability. 3407-3415 - Nan-Chun Lien, Li-Wei Chu, Chien-Hen Chen, Hao-I Yang, Ming-Hsien Tu, Paul-Sen Kan, Yong-Jyun Hu, Ching-Te Chuang, Shyh-Jye Jou, Wei Hwang:
A 40 nm 512 kb Cross-Point 8 T Pipeline SRAM With Binary Word-Line Boosting Control, Ripple Bit-Line and Adaptive Data-Aware Write-Assist. 3416-3425 - Alessandro Cilardo, Davide De Caro
High Speed Speculative Multipliers Based on Speculative Carry-Save Tree. 3426-3435 - Piotr Patronik, Stanislaw J. Piestrak:
Design of Reverse Converters for the New RNS Moduli Set {2n+1, 2n-1, 2n, 2n-1+1} (n odd). 3436-3449 - Piotr Zbigniew Wieczorek
An FPGA Implementation of the Resolve Time-Based True Random Number Generator With Quality Control. 3450-3459 - Takao Hinamoto, Akimitsu Doi, Wu-Sheng Lu:
Roundoff Noise Minimization in State-Space Discrete-Time Systems Using Joint Optimization of High-Order Error Feedback and Realization. 3460-3468 - Yue Wu
Discrete Wheel-Switching Chaotic System and Applications. 3469-3477 - Ye Zhang, Jan Henning Mueller, Bastian Mohr, Stefan Heinen:
A Low-Power Low-Complexity Multi-Standard Digital Receiver for Joint Clock Recovery and Carrier Frequency Offset Calibration. 3478-3486 - Oualid Hammi
A Digital Predistortion System With Extended Correction Bandwidth With Application to LTE-A Nonlinear Power Amplifiers. 3487-3495 - Navid Lashkarian, Jun Shi, Marcellus Forbes:
A Direct Learning Adaptive Scheme for Power-Amplifier Linearization Based on Wirtinger Calculus. 3496-3505
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