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Armadeus Systems
- Mulhouse, France
- http://www.fabienm.eu/flf/
- @Martoni@piaille.fr
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A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the fut…
The PoC Library has been forked to github.com/VHDL/PoC. See new address below
UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improv…
A huge VHDL library for FPGA and digital ASIC development
Patmos is a time-predictable VLIW processor, and the processor for the T-CREST project
A VHDL UART for communicating over a serial link with an FPGA
Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
VHDL / PoC
Forked from VLSI-EDA/PoCIP Core Library - Published and maintained by the Open Source VHDL Group
Tests to evaluate the support of VHDL 2008 and VHDL 2019 features
🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.
Examples and design pattern for VHDL verification
Bonfire SoC running on FireAnt FPGA Board
Synthesizable VHDL models for HiL Simulation
Some example circuits written in VHDL for Terasic DE0-Nano FPGA board.