PicoRV32 - A Size-Optimized RISC-V CPU

Verilog Ethernet components for FPGA implementation

Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Open source FPGA-based NIC and platform for in-network compute

RTL, Cmodel, and testbench for NVDLA

IC design and development should be faster，simpler and more reliable

Must-have verilog systemverilog modules

Verilog AXI components for FPGA implementation

HDL libraries and projects

SERV - The SErial RISC-V CPU

RISC-V CPU Core (RV32IM)

A small, light weight, RISC CPU soft core

Verilog PCI express components

Verilog library for ASIC and FPGA designers

An open source GPU based off of the AMD Southern Islands ISA.

The USRP™ Hardware Driver Repository

32-bit Superscalar RISC-V CPU

Source and Documentation files for USB C Industrial Camera Project, This repo contains PCB boards, FPGA , Camera and USB along with FPGA Firmware and USB Controller Firmware source.

An Open-source FPGA IP Generator

MNT VA2000, an Open Source Amiga 2/3/4000 Graphics Card (Zorro II/III), written in Verilog

3-stage RV32IMACZb* processor with debug

The RIFFA development repository

Various HDL (Verilog) IP Cores

An FPGA-based USB 1.1 (full-speed) device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB 1.1 (full-sp…

一步一步写MIPS CPU

Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

An FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor. 基于FPGA的FOC控制器，用于驱动BLDC/PMSM电机。

Z80 open-source silicon clone. Goal is to become a silicon proven, pin compatible, open-source replacement for classic Z80.