ghdl

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Here are 134 public repositories matching this topic...

qnighy / ghdl-hello

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GHDL Sample Program & Makefile

vhdl ghdl

Updated Dec 17, 2014
VHDL

tivaliy / ghdl-jenkins-swarm-slave

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Docker-based Jenkins swarm slave client with GHDL software

docker-container vhdl jenkins-jobs ci-infrastructure ghdl vunit jenkins-swarm

Updated Apr 4, 2017
Shell

kamaz08 / System-Wbudowane

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Systemy-wbudowane 2017

vhdl ghdl embeded

Updated Sep 5, 2017
VHDL

eggsactly / VHDL-FIFO

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FIFO implemented in VHDL.

vhdl fifo ghdl

Updated Nov 25, 2017
VHDL

guillaumebour / ying

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Ying is a microcontroller based on a 16 bits RISC microprocessor with a 5-stage pipeline.

microcontroller vhdl ghdl

Updated Jun 12, 2018
VHDL

diogratia / pipelined_des

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Pipelined Digital Encryption Standard in VHDL, includes validation testbench

validation vhdl encryption-standard ghdl

Updated Jul 8, 2018
VHDL

asl0007 / DSD-VHDL-

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PROGRAMS OF VHDL

vhdl gtkwave ghdl vhdl-modules vhdl-code vhdl-examples

Updated Mar 27, 2019
VHDL

doppioandante / vivado_tools

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Command line utilities for GHDL+vivado project management and simulation

vhdl tcl vivado gtkwave ghdl

Updated Jan 12, 2020
Shell

syfluqs / hdl_scratchpad

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VHDL scratchpad

vhdl ghdl

Updated Feb 18, 2020
VHDL

cajt / ghdlsynth-testcase-loa

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A "test" for GHDL Synthesis. Including logs for https://github.com/tgingold/ghdlsynth-beta/issues/87 .

vhdl testcase ghdl loa ghdlsyth

Updated Feb 28, 2020
VHDL

yousinix / vhdl-docker-template

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Template for creating VHDL project using docker

docker vscode gtkwave ghdl vuint

Updated Mar 20, 2020
VHDL

Kazhuu / vhdl-examples

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VHDL examples for a different kind of topics

vim examples example vhdl example-project modelsim ghdl example-code vim-hdl example-codes hdlcc

Updated Jun 4, 2020
VHDL

rodrigomelo9 / verifying-foss-hdl-synthesizers

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a project to check the FOSS synthesizers against vendors EDA tools

vivado ise ghdl yosys iverilog verilator quartus pyfpga ghdl-yosys-plugin foss-synthesizers

Updated Sep 26, 2020
Makefile

S0obi / GHDLDocumentation

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Documentation for GHDL

ghdl

Updated Jan 9, 2021

hargorin / udp_communication

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UDP/IP communication between FPGA and PC

fpga udp ghdl udp-communication ip-communication

Updated Jan 25, 2021
VHDL

tmeissner / cryptocores

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cryptography ip-cores in vhdl / verilog

cryptography fpga vhdl verilog testbenches ghdl

Updated Feb 20, 2021
VHDL

PyFPGA / openflow

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A Python library, and CLI utilities, which solves HDL-to-bitstream based on FOSS.

fpga icestorm ghdl yosys nextpnr prjtrellis

Updated Apr 13, 2021
Python

baptistepetit / cordic

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A Naive CORDIC implementation

algorithm hardware ghdl cordic ci-environment

Updated Apr 17, 2021
VHDL

jakubcabal / spi-fpga

Sponsor

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SPI master and SPI slave for FPGA written in VHDL

fpga controller vhdl accelerometer spi ghdl spi-master spi-slave cyc1000 spi-loopback spi-controller

Updated Apr 24, 2021
VHDL

marph91 / icestick-uart

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Lightweight UART implementation in VHDL for the lattice icestick

fpga hardware vhdl uart ghdl yosys ice40 icestick

Updated May 14, 2021
VHDL

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