verilator / verilator
Verilator open-source SystemVerilog simulator and lint system
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Verilator open-source SystemVerilog simulator and lint system
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
OpenTitan: Open source silicon root of trust
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
A minimal GPU design in Verilog to learn how GPUs work from the ground up
Common SystemVerilog components