alexforencich / verilog-ethernet
Verilog Ethernet components for FPGA implementation
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Verilog Ethernet components for FPGA implementation
HDL libraries and projects
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
FPGA cores compatible with multiple arcade game machines and KiCAD schematics of arcade games. Working on MiSTer FPGA/Analogue Pocket
An Open-source FPGA IP Generator
The USRP™ Hardware Driver Repository
Verilog PCI express components