FM24C64D

2-Wire Serial EEPROM

With Unique ID and Security Sector

Data Sheet

Jun. 2015

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 1
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Shanghai Fudan Microelectronics Group Co., Ltd or its subsidiaries in China.
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Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 2
Description Packaging Type
The FM24C64D provides 65,536 bits of serial electrically
erasable and programmable read-only memory
(EEPROM) organized as 8,192 words of 8 bits each, with
128-bit UID and 32-byte Security Sector. The device’s
cascadable feature allows up to 8 devices to share a
common 2-wire bus. The device is optimized for use in
many industrial and commercial applications where
low-power and low-voltage operations are essential.

Features
z Low Operation Voltage: VCC = 1.7V to 5.5V
z Internally Organized: 8,192 x 8
z 2-wire Serial Interface
z Schmitt Trigger, Filtered Inputs for Noise
Suppression
z Bi-directional Data Transfer Protocol
z 1MHz (2.5V~5.5V) and 400 kHz (1.7V)
Compatibility
z Write Protect Pin for Hardware Data Protection
z 32-Byte Page Write Modes (Partial Page
Writes are Allowed)
z Lockable 32-Byte Security Sector
z 128-Bit Unique ID for each device
z Self-timed Write Cycle (5 ms max)
z High-reliability
– Endurance: 1,000,000 Write Cycles
– Data Retention: 40 Years
z PDIP8 Package (RoHS Compliant)
z SOP8, TSSOP8, TDFN8 and Thin 4-ball
WLCSP Packages (RoHS Compliant and
Halogen-free)
Note：
Absolute Maximum Ratings Please contact local sales office for detail
description.
Operating Temperature
-55°C to +125°C
(Plastic Package) Pin Configurations
Operating Temperature
-20°C to +60°C
(Module Package)
Pin Name Function
Storage Temperature
-65°C to +150°C A0~A2 Device Address Inputs
(Plastic Package)
Storage Temperature SDA Serial Data Input/Output
-25°C to +70°C
(Module Package) SCL Serial Clock Input
Voltage on Any Pin with Respect WP Write Protect
-1.0V to +7.0V
to Ground
VCC Power Supply
Maximum Operating Voltage 6.25V
DC Output Current 5.0 mA GND Ground
*NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may NC Not Connect
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions beyond those indicated in
the operational sections of this specification are not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 3
Figure 1．Block Diagram

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 4
Pin Description
SERIAL CLOCK (SCL): The SCL input is used to pulled down to GND if the capacitive coupling to
positive edge clock data into each EEPROM device the circuit board VCC plane is <3pF, if coupling
and negative edge clock data out of each device. is >3pF, FMSH recommends connecting the
address pins to GND.
SERIAL DATA (SDA): The SDA pin is bi-directional
for serial data transfer. This pin is open-drain driven WRITE PROTECT (WP): The FM24C64D has a
and may be wire-ORed with any number of other Write Protect pin that provides hardware data
open-drain or open-collector devices. protection. The WP pin allows normal write operations
when connected to ground (GND). When the Write
DEVICE ADDRESSES (A2, A1, A0): The A2, A1
Protect pin is connected to VCC, all write operations
and A0 pins are device address inputs that are
to the memory are inhibited. If the pin is left floating,
hardwired or left not connected for hardware
the WP pin will be internally pulled down to GND if
compatibility with other FM24CXX devices. When
the capacitive coupling to the circuit board Vcc plane
the pins are hardwired, as many as eight 64K
is <3pF. If coupling is >3pF, FMSH recommends
devices may be addressed on a single bus system
connecting the WP to GND. Switching WP to VCC
(device addressing is discussed in detail under the
prior to a write operation creates a software write
Device Addressing section). If the pins are left
protected function.
floating, the A2, A1 and A0 pins will be internally

Write Protect Description

Part of the Memory Protected
WP Pin Status
FM24C64D
WP=VCC Full Memory
WP=GND Normal Read/Write Operations

Memory Organization
FM24C64D, 64K SERIAL EEPROM: Internally organized with 256 pages of 32 bytes each, the 64K
requires a 13-bit data word address for random word addressing.
Security Sector ： The FM24C64D offers 32-byte Security Sectors which can be written and (later)
permanently locked in Read-only mode. This memory may be used by the system manufacturers to store
security and other important information separately from the main memory array.

Byte Number
Device ADDR Page ADDR
31 ··· 0
0
1
1010 2 Data Memory (256P X 32B)
···
255
xxxx x00x
1011 Security Sector (32 Bytes)
xxxx xxxx1
xxxx xx1x
1011 Unique ID（128 Bits）
xxxx xxxx2

Note: 1. Address bits ADDR<10:9> must be 00, ADDR<4:0> define byte address, other bits are don’t care
2. Address bits ADDR<10:9> must be x1, ADDR<3:0> define byte address, other bits are don’t care

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 5
Pin Capacitance
SYMBOL PARAMETER CONDITIONS Max Units
CIN1 Input Capacitance VIN = 0V, f = 1MHz 6 pF
COUT1 Output Capacitance VOUT = 0V, f = 1MHz 8 pF
Note: 1. This parameter is characterized and is not 100% tested.

DC Characteristics
Applicable over recommended operating range from: TA = -40°C to +85°C, VCC = +1.7V to +5.5V, (unless
otherwise noted).

Symbol Parameter Test Condition Min Typ Max Units

VCC Supply Voltage 1.7 5.5 V
ICC1 Supply Current VCC = 5.0V, Read at 400KHz 0.4 1.0 mA
ICC2 Supply Current VCC = 5.0V, Write at 400KHz 2.0 3.0 mA
ISB1 Standby Current VCC = 1.7V, VIN = VCC/ VSS 1.0 µA
ISB2 Standby Current VCC = 5.5V, VIN = VCC/ VSS 6.0 µA
ILI Input Leakage Current VIN = VCC/VSS 0.1 3.0 µA
ILO Output Leakage Current VOUT = VCC/ VSS 0.05 3.0 µA
VIL1 Input Low Level -0.6 VCC x 0.3 V
VIH1 Input High Level VCC x 0.7 VCC + 0.5 V
VOL2 Output Low Level 2 VCC = 3.0V, IOL = 2.1 mA 0.4 V
VOL1 Output Low Level 1 VCC =1.7V, IOL = 0.15 mA 0.2 V
Note: 1. VIL min and VIH max are reference only and are not tested.

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 6
AC Characteristics
400 kHz AC characteristics
Recommended operating conditions: TA = -40°C to +85°C, VCC = +1.7V to +5.5V, CL = 100 pF (unless
otherwise noted). Test conditions are listed in Note 2.
Symbol Parameter Min Max Units
fSCL Clock Frequency, SCL 400 kHz
tLOW Clock Pulse Width Low 1.3 µs
tHIGH Clock Pulse Width High 0.6 µs
tI 1 Noise Suppression Time 80 ns
tAA Clock Low to Data Out Valid 0.1 0.9 µs
Time the bus must be free before a new transmission
tBUF 1 1.3 µs
can Start
tHD.STA Start Hold Time 0.6 µs
tSU.STA Start Setup Time 0.6 µs
tHD.DAT Data In Hold Time 0 µs
tSU.DAT Data In Setup Time 100 ns
tR Inputs Rise Time 1 300 ns
tF Inputs Fall Time 1 300 ns
tSU.STO Stop Setup Time 0.6 µs
tDH Data Out Hold Time 100 ns
tWR Write Cycle Time 5 ms
Write
Endurance 1 3.3V, 25°C, Page Mode 1,000,000
Cycles

1 MHz AC characteristics
Recommended operating conditions: TA = -40°C to +85°C, VCC = +2.5V to +5.5V, CL = 100 pF (unless
otherwise noted). Test conditions are listed in Note 2.
Symbol Parameter Min Max Units
fSCL Clock Frequency, SCL 1 MHz
tLOW Clock Pulse Width Low 500 ns
tHIGH Clock Pulse Width High 320 ns
tI 1 Noise Suppression Time 80 ns
tAA Clock Low to Data Out Valid 450 ns
Time the bus must be free before a new transmission
tBUF 1 500 ns
can Start
tHD.STA Start Hold Time 250 ns
tSU.STA Start Setup Time 250 ns
tHD.DAT Data In Hold Time 0 ns
tSU.DAT Data In Setup Time 50 ns
tR Inputs Rise Time 1 120 ns
tF Inputs Fall Time 1 120 ns
tSU.STO Stop Setup Time 250 ns
tDH Data Out Hold Time 100 ns
tWR Write Cycle Time 5 ms
Write
Endurance 1 3.3V, 25°C, Page Mode 1,000,000
Cycles
Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 7
Notes: 1. This parameter is characterized and is not 100% tested.
2. AC measurement conditions:
RL (connects to VCC): 1.3 kΩ
Input pulse voltages: 0.3 VCC to 0.7 VCC
Input rise and fall times: ≤ 50 ns
Input and output timing reference voltages: 0.5 VCC

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 8
Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is words. The EEPROM sends a zero during the ninth
normally pulled high with an external device. Data on clock cycle to acknowledge that it has received
the SDA pin may change only during SCL low time each word.
periods (refer to Figure 4). Data changes during
STANDBY MODE: The FM24C64D features a
SCL high periods will indicate a start or stop
low-power standby mode which is enabled: (a)
condition as defined below.
upon power-up and (b) after the receipt of the stop
START CONDITION: A high-to-low transition of SDA bit and the completion of any internal operations.
with SCL high is a start condition which must
Memory RESET: After an interruption in protocol,
precede any other command (refer to Figure 5).
power loss or system reset, any 2-wire part can be
STOP CONDITION: A low-to-high transition of SDA reset in following these steps:
with SCL high is a stop condition. After a read 1. Clock up to 9 Cycles,
sequence, the stop command will place the EEPROM 2. Look for SDA high in each cycle while SCL is
in a standby power mode (refer to Figure 5). high and then,
ACKNOWLEDGE: All address and data words are 3. Create a start condition as SDA is high.
serially transmitted to and from the EEPROM in 8-bit

Bus Timing
Figure 2．SCL: Serial Clock, SDA: Serial Data I/O

tHIGH
tF tR
SCL tLOW tLOW

tSU.STA tHD.STA tHD.DAT tSU.DAT tSU.STO

SDA
IN

tAA tDH tBUF

SDA
OUT

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 9
Write Cycle Timing
Figure 3．SCL: Serial Clock, SDA: Serial Data I/O

Note: 1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the
internal clear/write cycle.

Figure 4．Data Validity

Figure 5．Start and Stop Definition

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 10
Figure 6．Output Acknowledge

Device Addressing
DATA MEMORY ACCESS: The 64K EEPROM address word with a ‘1011’(Bh) sequence (refer to
device requires a 8-bit device address word following Table 1). The behavior of the next three bits (A2, A1
a start condition to enable the chip for a read or write and A0) remains the same as during a standard
operation (refer to Table 1). memory addressing sequence.
The device address word consists of a mandatory The eighth bit of the device address needs be set to
‘1010’(Ah) sequence for the first four most significant a one to read the Serial Number. Writing or altering
bits as shown in Table 1. This is common to all the the 128-bit unique ID is not possible.
EEPROM devices.
For more details on accessing this special feature,
The 64K EEPROM uses the three device address See Read Operations on page 14.
bits A2, A1, A0 to allow as many as eight devices on
SECURITY SECTOR ACCESS: The FM24C64D
the same bus. These bits must compare to their
offers 32-byte Security Sector which can be written
corresponding hard-wired input pins. The A2, A1 and
and (later) permanently locked in Read-only mode.
A0 pins use an internal proprietary circuit that biases
Access to this memory location is obtained by
them to a logic low condition if the pins are allowed
beginning the device address word with a ‘1011’(Bh)
to float.
sequence (refer to Table 1). The behavior of the next
The Module package device address word also three bits (A2, A1 and A0) remains the same as during
consists of a mandatory ‘1010’(Ah) sequence for the a standard memory addressing sequence.
first four most significant bits. The next 3 bits are all
The eighth bit of the device address is the read/write
zero.
operation select bit. A read operation is initiated if
The eighth bit of the device address is the read/write this bit is high and a write operation is initiated if this
operation select bit. A read operation is initiated if bit is low.
this bit is high and a write operation is initiated if this
For more details on accessing this special feature, See
bit is low.
Write Operations and Read Operations on page 13,14.
Upon a compare of the device address, the
NOISE PROTECTION: Special internal circuitry
EEPROM will output a zero. If a compare is not
placed on the SDA and SCL pins prevent small noise
made, the device will return to a standby state.
spikes from activating the device.
UNIQUE ID ACCESS: The FM24C64D utilizes a
DATA SECURITY: The Device has a hardware data
separate memory block containing a factory
protection scheme that allows the user to write protect
programmed 128-bit unique ID. Access to this
the entire memory when the WP pin is at VCC.
memory location is obtained by beginning the device

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 11
Table 1-1．Device Address

Access Area Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Data Memory 1 0 1 0 A2 A1 A0 R/W
Security Sector 1 0 1 1 A2 A1 A0 R/W
Security Sector Lock Bit 1 0 1 1 A2 A1 A0 R/W
Unique ID Number 1 0 1 1 A2 A1 A0 1
MSB LSB

Table 1-2．First Word Address

Access Area Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Data Memory x x x A12 A11 A10 A9 A8
Security Sector x x x x x 0 0 x
Security Sector Lock Bit x x x x x 1 0 X
Unique ID Number x x x x x x 1 x
MSB LSB
NOTE: x = Don`t care bit.

Table 1-3．Second Word Address

Access Area Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Data Memory A7 A6 A5 A4 A3 A2 A1 A0
Security Sector x x x A4 A3 A2 A1 A0
Security Sector Lock Bit x x x x x x x x
Unique ID Number x x x x 0 0 0 0
MSB LSB
NOTE: x = Don`t care bit.

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 12
Write Operations

BYTE WRITE: A write operation requires two 8-bit ACKNOWLEDGE POLLING: Once the internally
data word address following the device address timed write cycle has started and the EEPROM
word and acknowledgment. Upon receipt of this inputs are disabled, acknowledge polling can be
address, the EEPROM will again respond with a initiated. This involves sending a start condition
zero and then clock in the first 8-bit data word. followed by the device address word. The
Following receipt of the 8-bit data word, the read/write bit is representative of the operation
EEPROM will output a zero and the addressing desired. Only if the internal write cycle has
device, such as a microcontroller, must terminate completed will the EEPROM respond with a zero
the write sequence with a stop condition. At this allowing the read or write sequence to continue.
time the EEPROM enters an internally-timed write
cycle, tWR, to the nonvolatile memory. All inputs are WRITE SECURITY SECTOR: Write the Security
disabled during this write cycle and the EEPROM Sector is similar to the page write but requires use
will not respond until the write is complete (see of device address, and the special word address
Figure 7 on page 15). seen in Table 1 on page 12. The higher address
bits ADDR<12:5> are don’t care except for
PAGE WRITE: The 64K EEPROM is capable of
32-byte page writes. A page write is initiated the address bits ADDR<10:9>，which must be equal to
same way as a byte write, but the microcontroller ‘00b’. Lower address bits ADDR<4:0> define the
does not send a stop condition after the first data byte address inside the Security Sector (see
word is clocked in. Instead, after the EEPROM Figure 12 on page 16).
acknowledges receipt of the first data word, the
microcontroller can transmit up to 31 more data If the Security Sector is locked, the data bytes
words. The EEPROM will respond with a zero after transferred during the Write Security Sector
each data word received. The microcontroller must operation are not acknowledged (NoAck).
terminate the page write sequence with a stop
condition (see Figure 8 on page 15). LOCK SECURITY SECTOR: Lock the Security
Sector is similar to the byte write but requires use
The data word address lower seven bits are of device address, and special word address seen
internally incremented following the receipt of each in Table 1 on page 12. The word address bits
data word. The higher data word address bits are ADDR<10:9> must be ‘10b’, all other word address
not incremented, retaining the memory page row bits are don’t care. The data byte must be equal to
location. When the word address, internally the binary value 1111 1111(see Figure 14 on page
generated, reaches the page boundary, the 17).
following byte is placed at the beginning of the
same page. If more than 32 data words are If the Security Sector is locked, the data bytes
transmitted to the EEPROM, the data word transferred during the Lock Security Sector
address will “roll over” and previous data will be operation are not acknowledged (NoAck).
overwritten.

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 13
Read Operations
Read operations are initiated the same way as write read the first byte of the UID, the lower address bits
operations with the exception that the read/write select ADDR<3:0> would need to be ‘0000b’.
bit in the device address word is set to one.
When the end of the 128-bit UID number is reached
CURRENT ADDRESS READ: The internal data word (16 bytes of data), the data word address will roll-over
address counter maintains the last address accessed back to the beginning of the 128-bit UID number. The
during the last read or write operation, incremented by Unique ID Read operation is terminated when the
one. This address stays valid between operations as microcontroller does not respond with a zero (ACK)
long as the chip power is maintained. The address “roll and instead issues a Stop condition (see Figure 16 on
over” during read is from the last byte of the last page 18).
memory page to the first byte of the first page. The
address “roll over” during write is from the last byte of READ SECURITY SECTOR ： Read the Security
the current page to the first byte of the same page. Sector is similar to the random read but requires use of
device address, a dummy write, and the use of specific
Once the device address with the read/write select bit word address seen in Table 1 on page 12. The higher
set to one is clocked in and acknowledged by the address bits ADDR<12:5> are don’t care except for
EEPROM, the current address data word is serially address bits ADDR<10:9>，which must be equal to
clocked out. The microcontroller does not respond with ‘00b’. The lower address bits ADDR<4:0> define the
an input zero but does generate a following stop byte address inside the Security Sector.
condition (see Figure 9 on page 15).
The internal byte address is automatically incremented
RANDOM READ: A random read requires a “dummy” to the next byte address after each byte of data is
byte write sequence to load in the data word address. clocked out. When the last byte (1Fh) is reached, it will
Once the device address word and data word address roll over to 00h, the first byte of the Security Sector,
are clocked in and acknowledged by the EEPROM, and continue to increment. (see Figure 13 on page
the microcontroller must generate another start 17).
condition. The microcontroller now initiates a current
address read by sending a device address with the READ LOCK STATUS：There are two ways to check
read/write select bit high. The EEPROM the lock status of the Security Sector.
acknowledges the device address and serially clocks 1. The first way is initiated by a Security Sector Write,
out the data word. The microcontroller does not the EEPROM will acknowledge if the Security Sector is
respond with a zero but does generate a following stop unlocked, while it will not acknowledge if the Security
condition (see Figure 10 on page 16). Sector is locked.
Once the acknowledge bit is read, it is recommended
SEQUENTIAL READ: Sequential reads are initiated to generate a Start condition followed by a Stop
by either a current address read or a random address condition, so that:
read. After the microcontroller receives a data word, it z Start: the truncated command is not executed
responds with an acknowledge. As long as the because the Start condition resets the device
EEPROM receives an acknowledge, it will continue to internal logic
increment the data word address and serially clock out z Stop: the device is then set back into Standby
sequential data words. When the memory address mode by the Stop condition.
limit is reached, the data word address will “roll over”
and the sequential read will continue. The sequential 2. The second way is initiated by a Lock Status Read.
read operation is terminated when the microcontroller Lock Status Read is similar to the random read but
does not respond with a zero but does generate a requires use of device address seen in Table 1 on
following stop condition (see Figure 11 on page 16) page 12, a dummy write, and the use of specific word
address. The address bits ADDR<10:9> must be ‘10b’,
UNIQUE ID READ: Reading the serial number is all other address bits are Don't Care. The Lock bit is
similar to the sequential read but requires use of the the BIT1 of the byte read on SDA. It is at “1” when the
device address, a dummy write, and the use of specific lock is active and at “0” when the lock is not active.
word address seen in Table 1 on page 12. The higher The same data is shifted out repeatedly until the
address bits ADDR<12:4> are don’t care except for microcontroller does not respond with a zero but does
address bits ADDR<10:9>，which must be equal to generate a following stop condition (see Figure 15 on
‘x1b’. Lower address bits ADDR<3:0> define the byte page 18).
address inside the UID. If the application desires to

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 14
Figure 7．Byte Write

Note: 1. * = Don’t CARE bits

Figure 8．Page Write

Note: 1. * = Don’t CARE bits

Figure 9．Current Address Read

Figure 10． Random Read

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 15
Note: 1. * = Don’t CARE bits.

Figure 11． Sequential Read

Figure 12． Write Security Sector

Note: 1. * = Don’t CARE bits.

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 16
Figure 13． Read Security Sector

Note: 1. * = Don’t CARE bits.

Figure 14． Lock Security Sector

Note: 1. * = Don’t CARE bits.

Figure 15． Read Lock Status

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 17
Note: 1. * = Don’t CARE bits.
2.  = LOCK bits.

Figure 16．Read Unique ID

Note: 1. * = Don’t CARE bits.

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 18
Ordering Information

FM 24C 64 D -PP -C -H
Company Prefix
FM = Shanghai Fudan Microelectronics Group Co.,ltd

Product Family
24C = 2-Wire Serial EEPROM

Product Density
64 = 64K-bit

Device Type
D = with 128-bit Unique ID
with 32-byte Security Sector
Supply voltage from 1.7V to 5.5V

Package Type 1
PD = 8-pin PDIP M2F or M2P = 8-pin Module Package 3
SO = 8-pin SOP
TS = 8-pin TSSOP
2
DN = 8-pin TDFN (2x3mm)
3
CT = Thin 4-ball WLCSP

Product Carrier
U = Tube
T = Tape and Reel
R = Module Reel

HSF ID Code 4
Blank or R = RoHS Compliant
G = RoHS Compliant, Halogen-free, Antimony-free

Note:
1. For SO, TS, DN package, MSL1 package are available, for detail please contact local sales office.
2. For Thinner package please contact local sales office.
3. For the details of WLCSP package and Module package please contact local sales office.
4. For PD, M2F, M2P package: R class only.
For SO, TS, DN and CT package: G class only.

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 19
Part Marking Scheme

PDIP8

SOP8

TSSOP8

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 20
TDFN8 (2x3mm)

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 21
Packaging Information

PDIP 8

Symbol MIN MAX

A ‐‐‐ 5.000
A1 0.380 ---
b 0.380 0.570
b2 1.300 1.700
C 0.200 0.360
D 9.000 10.000
E1 6.100 7.000
E 7.320 8.250
e 2.540(BSC)
L 2.920 3.810
eB ‐‐‐ 10.900
NOTE:
1. Dimensions are in Millimeters.

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 22
 SOP 8

Symbol MIN MAX

A 1.350 1.750
A1 0.050 0.250
b 0.330 0.510
c 0.150 0.250
D 4.700 5.150
E1 3.800 4.000
E 5.800 6.200
e 1.270(BSC)
L 0.400 1.270
θ 0° 8°
NOTE:
1. Dimensions are in Millimeters.

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 23
 TSSOP8

Symbol MIN MAX

D 2.900 3.100
E1 4.300 4.500
b 0.190 0.300
c 0.090 0.200
E 6.250 6.550
A 1.200
A1 0.050 0.150
e 0.650 (BSC)
L 0.450 0.750
θ 0° 8°
NOTE:
1. Dimensions are in Millimeters.

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 24
 TDFN8 (2x3mm)

Symbol MIN MAX

A 0.700 0.800
A1 0.000 0.050
D 1.900 2.100
E 2.900 3.100
D2 1.400 1.600
E2 1.400 1.600
k 0.200(MIN)
b 0.200 0.300
e 0.500(TYP)
L 0.200 0.400
NOTE:
1. Dimensions are in Millimeters.

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 25
Revision History

Publication
Version Pages Revise Description
date
1.0 Nov. 2014 28 Initial document Release.
Updated the chapters of packaging type, Ordering information, Part marking
1.1 Dec. 2014 28
scheme and packaging information.
Updated the chapters of packaging type, Ordering information and packaging
1.2 May. 2015 27
information.
1. Updated the chapters of Device Addressing
1.3 Jun. 2015 27
2. Corrected the typo.

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 26
Sales and Service
Shanghai Fudan Microelectronics Group Co., Ltd.
Address: Bldg No. 4, 127 Guotai Rd,
Shanghai City China.
Postcode: 200433
Tel: (86-021) 6565 5050
Fax: (86-021) 6565 9115

Shanghai Fudan Microelectronics (HK) Co., Ltd.

Address: Unit 506, 5/F., East Ocean Centre, 98 Granville
Road, Tsimshatsui East, Kowloon, Hong Kong
Tel: (852) 2116 3288 2116 3338
Fax: (852) 2116 0882

Beijing Office
Address: Room 423, Bldg B, Gehua Building,
1 QingLong Hutong, Dongzhimen Alley north Street,
Dongcheng District, Beijing City, China.
Postcode: 100007
Tel: (86-010) 8418 6608
Fax: (86-010) 8418 6211

Shenzhen Office
Address: Room.1301, Century Bldg, No. 4002, Shengtingyuan
Hotel, Huaqiang Rd (North),
Shenzhen City, China.
Postcode: 518028
Tel: (86-0755) 8335 0911 8335 1011 8335 2011 8335 0611
Fax: (86-0755) 8335 9011

Shanghai Fudan Microelectronics (HK) Ltd Taiwan

Representative Office  
Address: Unit 1225, 12F., No 252, Sec.1 Neihu Rd.,
Neihu Dist., Taipei City 114, Taiwan
Tel : (886-2) 7721 1890 (886-2) 7721 1889
Fax: (886-2) 7722 3888

Shanghai Fudan Microelectronics (HK) Ltd

Singapore Representative Office
Address : 237, Alexandra Road, #07-01 The Alexcier,
Singapore 159929
Tel : (65) 6472 3688
Fax: (65) 6472 3669

Shanghai Fudan Microelectronics Group Co., Ltd

NA Office
Address :2490 W. Ray Road Suite#2
Chandler, AZ 85224 USA
Tel : (480) 857-6500 ext 18

Web Site: http://www.fmsh.com/

Data Sheet
FM24C64D 2-Wire Serial EEPROM Ver 1.3 27