National Semiconductor

SD387EVK EVK User Manual

LMH0387 Evaluation Board April 29, 2010
User Guide

Overview
The SD387 Evaluation Kit (EVK) enables evaluation of the LMH0387 3G/HD/SD SDI Configurable I/O Adaptive
Cable Equalizer / Cable Driver. A graphical user interface allows managing the SPI registers for the input mode
(equalizer), and can also be used to control the device’s I/O mode.

Evaluation Kit (SD387EVK) Contents

The EVK contains the following parts:
• SD387EVK board assembly with the LMH0387 configurable I/O
• SPA dongle (SPIÆUSB card)
• USB cable
• 6-pin parallel cable
• SD387EVK User Guide

Evaluation Board Description

Figure 1 shows the SD387 evaluation board and highlights some of its features.

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Rev 1.1 © 2010 National Semiconductor Corp.
 FIGURE 1. SD387 Evaluation Board

Inputs and Outputs: BNC_IO Input/Output, SDI Input, and SDO Output
The bidirectional I/O (J1) is a 75Ω BNC connector. When the LMH0387 is configured as an input, the input signal
on the BNC_IO pin should conform to the SMPTE 424M, SMPTE 292M, or SMPTE 259M standards. When the
LMH0387 is configured as an output, the BNC_IO pin will drive SMPTE SDI signal levels (800 mVP-P into 75Ω).

The SDI input connectors (J2 and J3) are 50Ω SMA connectors. This cable driver input includes a 100Ω differential
termination resistor (R5) at the LMH0387 device and is optimized for 100Ω differential input.

The SDO output connectors (J4 and J5) are 50Ω SMA connectors. When using only one side of this equalizer
output pair, the other side should be terminated with a 50Ω SMA termination. For example, when only using the
SDO output, ¯¯¯¯
SDO should be terminated with a 50Ω SMA termination.

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Rev 1.1 © 2010 National Semiconductor Corp.
DC Power Connectors
The VCC and GND power connectors should be powered with a DC input voltage of 3.3V ± 5% (3.6V maximum).

JP2 Controls
¯¯¯
CD
JP2 allows monitoring of the Carrier Detect (¯¯¯
CD ) at the BNC_IO pin while in the input mode (equalizer). ¯¯¯
CD is
asserted low when an input signal is detected at the BNC_IO pin, and high when no input signal is present.

TX_EN
JP2 allows control of the TX_EN pin to enable or disable the cable driver. The LMH0387 TX_EN pin has an
internal pullup to enable the cable driver by default, so this pin may be left unconnected when using the LMH0387
in the output mode. To disable the cable driver, place a jumper to tie TX_EN to GND. When using the LMH0387 in
the input mode, the cable driver must be disabled by tying TX_EN low. TX_EN may optionally be controlled via the
GUI using the SPA dongle as described below.

¯¯¯
SD/HD
JP2 allows control of the SD/¯¯¯
HD pin for setting the slew rate for the BNC_IO pin while the LMH0387 is in the output
mode (cable driver). This pin may be connected to GND for the faster HD/3G slew rate or connected to VCC for the
slower SD slew rate. The LMH0387 SD/HD ¯¯¯ pin has an internal pulldown to enable the HD/3G slew rate by default.

SPI Header (JP1)

JP1 is the SPI (Serial Peripheral Interface) header. It allows access to the SPI pins (¯¯¯
SS , MISO, MOSI, and SCK)
to control the SPI registers of the LMH0387 equalizer. To use the SPI interactive GUI, plug the 6-pin parallel cable
between this header and JP7 on the SPA dongle to connect the pins one-for-one as shown in Table 1. The SPA
dongle requires special software and must be connected to the PC via the USB – see the Software Setup section.

TABLE 1. SPI Connections between SD387 and SPA Dongle

SD387 JP1 SPA Dongle JP7

Pin # Name Pin # Name
1 GND Æ 1 GND
2 SCK Æ 2 MCK
3 MOSI Æ 3 MOSI
4 MISO Æ 4 MOSI
5 SS Æ 5 SS
6 GND Æ 6 GND

Carrier Detect LED (D1)

D1 shows the status of Carrier Detect at the LMH0387 equalizer input. This LED is GREEN when an input signal
has been detected at the BNC_IO pin, and OFF when no input is detected.

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SPA Dongle Description
The SPA dongle is required to use the SPI interactive GUI. The SPA dongle connects between the LMH0387 SPI
pins and the USB input of a PC. The SPA dongle is shown in Figure 2. JP7 is the SPI Header. The SPA dongle is
powered through the USB, and the D1 LED is RED when the SPA dongle is connected to a PC via the USB to
indicate the board is powered.

FIGURE 2. SPA Dongle

Figure 3 shows the connection between the SD387 and the SPA dongle. For proper operation, the SPI pins must
be connected between the SD387 JP1 and the SPA dongle JP7. Optionally, a single wire may be connected
between the SD387 TX_EN pin (JP2) and the SPA dongle PA0 (J7) to enable software control of the LMH0387
cable driver enable functionality, and allow the GUI to fully control the LMH0387 I/O Mode as described on page 8.
If this connection is not used, then the TX_EN can be controlled manually with a jumper.

FIGURE 3. SD387 Connection to SPA Dongle

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Rev 1.1 © 2010 National Semiconductor Corp.
Software Setup
System Requirements
Operating System: Windows XP or Vista
USB: 2.0

Installation
Download the latest software from the LMH0387 Evaluation Board page. Extract the ALPF_monthdayyear_major
version_minor version.exe” (ex. ALPF_04062010_128_0002.exe) file to a temporary location that can be deleted
later.

Make sure the SPA dongle is not connected to the PC. The following installation instructions are for the Windows
XP Operating System.

Install the ALP software

Execute the ALP Setup Wizard program called “ALPF_monthdayyear_major version_minor version.exe” (ex.
ALPF_04062010_128_0002.exe) that was extracted to a temporary location.

There are 7 steps to the installation once the setup wizard is started:
1. Select the “Next” button.
2. Select “I accept the agreement” and then select the “Next” button.
3. Select the location to install the ALP software and then select the “Next” button.
4. Select the location for the start menu shortcut and then select the “Next” button.
5. There will then be a screen that allows the creation of a desktop and Quick Launch icon. After selecting
the desired choices select the “Next” button.
6. Select the “Install” button, and the software will then be installed to the selected location.
7. Uncheck “Launch Analog LaunchPAD” and select the “Finish” button. The ALP software will start if
“Launch Analog LaunchPAD” is checked, but it will not be useful until the USB driver is installed.

Connect JP1 of the SD387 evaluation board to JP7 of the SPA dongle via the 6-pin parallel cable as shown in
Table 1. Power on the SD387 evaluation board with a 3.3 VDC power supply. Connect the SPA dongle to the PC
with the USB cable. The “Found New Hardware Wizard” will open on the PC. Proceed to the next section to install
the USB driver.

Install the USB driver

There are 6 steps to install the USB driver:
1. Select “No, not at this time” then select the “Next” button.
2. Select “Install from a list or specific location” then select the “Next” button.
3. Select “Search for the best driver in these locations”. Uncheck “Search removable media” and check
“Include this location in the search”.
4. Browse to the Install Directory which is typically located at “C:\Program Files\National Semiconductor
Corp\Analog LaunchPAD\vx.x.x\Drivers” and select the “Next” button. Windows should find the driver.
5. Select “Continue Anyway”.
6. Select the “Finish” button.

The software installation is complete. The ALP software may now be launched, as described in the next section.

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Rev 1.1 © 2010 National Semiconductor Corp.
Software Description
Startup
Make sure all the software has been installed and the hardware is powered on and connected to the PC. Execute
“Analog LaunchPAD” from the start menu. The default start menu location is “Programs\National Semiconductor
Corp\Analog LaunchPAD vx.x.x\Analog LaunchPAD”.

The application should come up in the state shown in Figure 4 below. If it does not, see “Trouble Shooting” at the
end of this document. Click on “LMH0387 – Nano” to select the device and open up the device profile and its
associated tabs.

FIGURE 4. ALP Startup Screen for the LMH0387

Information Tab
The Information tab is shown in Figure 5.

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 FIGURE 5. LMH0387 Information Tab

Functional Tab
The Functional tab is the main tab of the GUI and presents a high level view of the LMH0387 equalizer, as shown
in Figure 6.

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 FIGURE 6. LMH0387 Functional Tab

I/O Mode Control

The I/O Mode Control can be used to control the I/O Mode of the LMH0387,
provided an additional wire is connected between the SD387 TX_EN and the
SPA dongle PA0, as shown in Figure 3. The connection between TX_EN and
PA0 allows software control of the LMH0387 cable driver enable functionality.
If the SD387 TX_EN is not connected to the SPA dongle PA0, then TX_EN
may be controlled manually with a jumper and the I/O Mode Control will have
no effect on the LMH0387 cable driver.

The default LMH0387 I/O Mode setting is the Input (Rx) Mode, or equalizer mode. This default setting allows full
control of the LMH0387 equalizer. The three I/O modes are described below.

Input (Rx) Mode: Configures the LMH0387 for the input mode (equalizer enabled and cable driver disabled). This
is the default setting. The LMH0387 equalizer is set to auto sleep, and if TX_EN is connected to PA0, then PA0 will
drive TX_EN low to disable the LMH0387 cable driver. If this TX_EN Æ PA0 connection is not made, then the
LMH0387 cable driver should be manually disabled by setting a jumper to tie TX_EN to GND.

Output (Tx) Mode: Configures the LMH0387 for the output mode (cable driver enabled and equalizer disabled).
The LMH0387 equalizer is forced to sleep. If TX_EN is connected to PA0, then PA0 will drive TX_EN high to
enable the LMH0387 cable driver. If this TX_EN Æ PA0 connection is not made, then the LMH0387 cable driver
should be manually enabled by pulling the jumper between TX_EN and GND (TX_EN should be open).

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Rev 1.1 © 2010 National Semiconductor Corp.
Tx Loopback Mode: Configures the LMH0387 for the output mode with a loopback path (cable driver and
equalizer both enabled). The LMH0387 equalizer is set to auto sleep. If TX_EN is connected to PA0, then PA0 will
drive TX_EN high to enable the LMH0387 cable driver. If this TX_EN Æ PA0 connection is not made, then the
LMH0387 cable driver should be manually enabled by pulling the jumper between TX_EN and GND (TX_EN should
be open). In this mode, the cable driver output on the BNC_IO pin is looped back to the LMH0387 equalizer
outputs (SDO and ¯¯¯¯ ¯¯¯¯
SDO ), so the cable driver output may be observed both at BNC_IO pin and at the SDO/SDO
output pins.

The Cable Driver TX_EN indicator shows the current status of the TX_EN control (only if TX_EN is connected to
PA0). It is GREEN to indicate TX_EN is driven high and the LMH0387 cable driver is enabled, or OFF to indicate
TX_EN is driven low and the LMH0387 cable driver is disabled.

Equalizer Sleep Mode and Carrier Detect

The Equalizer Sleep Mode control shows the status of the Sleep Mode
register bits and allows control over the sleep mode. The Equalizer Sleep
Mode settings are as follows:
On: Force the equalizer into sleep mode (powered down) regardless of
whether there is an input signal or not.
Off: Disable sleep mode (force equalizer to stay enabled).
Auto: Sleep mode active when no input signal detected (default mode).

The Equalizer Sleep Status indicator shows the current sleep status of the equalizer. It is GREEN to indicate
sleeping or OFF to indicate not sleeping.

The Carrier Detect shows the status of the BNC_IO input carrier detect. It is GREEN to indicate the input signal is
present or OFF to indicate the input signal is absent.

Equalizer Output Swing

The Equalizer Output Swing control shows the current value of the LMH0387 equalizer
output amplitude and allows adjustment in 100 mV increments from 400 mVP-P to 800
mVP-P. The default setting is 700 mVP-P. The Equalizer Output Swing may be set either
by clicking on the “+” or “-” buttons, or by grabbing and spinning the “handle” on the
knob for a quick adjustment.

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Equalizer Output Offset
The Equalizer Output Offset control shows the current value of the LMH0387 equalizer
output common mode voltage and allows adjustment in 200 mV increments from 1.05V
to 1.85V. At the “Max” setting, the outputs are referenced to the positive supply and the
output common mode is 2.1V. The default setting is 1.25V. The Equalizer Output Offset
may be set either by clicking on the “+” or “-” buttons, or by grabbing and spinning the
“handle” on the knob for a quick adjustment.

Equalizer Output Mute

The Equalizer Output Mute indicator shows the mute status, and the button may be used to
toggle the mute function. The indicator is GREEN to indicate mute (equalizer outputs are
muted) and OFF to indicate normal mode (outputs are not muted).

Extended 3G Reach Mode

The Extended 3G Reach Mode indicator shows the status of the Extended 3G Reach
Mode register bit, and the button may be used to toggle this register bit. The indicator is
GREEN when the bit is set for extended 3G reach mode, and OFF when the equalizer is
set for normal mode. Note that the indicator shows the status of the register bit – not
whether the device is actually in extended 3G reach mode or not. If extended 3G reach
mode is set, the equalizer will remain in this mode until the input cable is physically
changed or power is cycled. For example, extended 3G reach mode is forced, and then it is turned off. The
indicator will show it is off, but the equalizer will still be in extended 3G reach mode until the input cable is changed
or the device power is cycled. The GUI provides a simple way to reset the extended 3G reach mode: the Extended
3G Reach Mode Reset button. This button toggles the equalizer sleep mode, and has a similar effect to removing
and re-applying the input cable.

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Equalizer Input Launch Level Control
Note: The GUI automatically sets the nominal equalizer launch amplitude setting upon
startup (specifically, it writes 30h to SPI register 02h). This nominal setting is required
for correct equalizer operation with the default SMPTE 800 mVP-P launch amplitude
and no external attenuation. If the equalizer launch amplitude setting is changed, it
can be instantly set back to this nominal setting by clicking the “Set To Default” button.

The Equalizer Input Launch Level Control is useful to compensate for attenuation of
the input signal prior to the equalizer due to a passive splitter or non-ideal input
termination network.

The Coarse Amplitude control shows the current setting of the Coarse Control register
and may be used to set the input for either 0 dB (default) or 6 dB of input attenuation.
At the default setting of 0 dB, the equalizer operates normally and expects a launch
amplitude of 800 mVP-P. With the Coarse Amplitude set to -6 dB, the equalizer is
optimized for input signals with 6 dB of input attenuation (400 mVP-P).

The Launch Amplitude Fine Tuning may be used to further fine tune the equalizer
input compensation, from -0.2 dB to 4.1 dB. The Launch Amplitude Fine Tuning may
be set either by clicking on the “+” or “-” buttons, or by grabbing and spinning the
“handle” on the knob for a quick adjustment.

Equalizer Cable Length

The Equalizer Cable Length shows the interpreted Belden 1694A cable length of the CLI
register, both with a visual bar graph and a decimal readout. The Equalizer Cable Length is
only valid when an input signal is detected, and is greyed out when there is no input to the
LMH0387 equalizer.

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Registers Tab
The Registers tab displays all registers for the LMH0387 equalizer. Figure 7 shows the Registers tab. The Value
field indicates the value of the currently selected register.

FIGURE 7. LMH0387 Registers Tab

Each register can be examined in detail by either double clicking on the desired registers fold bar (with the address
and the register name, e.g. 0x00 – General Control) or by single clicking the icon at the right of the fold bar (two
inverted carats).

The Refresh button will re-read the currently selected register and the Refresh All will read all registers in the
device. Changes may be made to the registers by checking or un-checking the individual register bits or typing in a
new register value in the Value field. After setting the appropriate register value, the Apply button must be pressed
to apply the changes. The detailed view of the General Control register is shown in Figure 8 with Verbose
Descriptions checked and Figure 9 with Verbose Descriptions un-checked.

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Rev 1.1 © 2010 National Semiconductor Corp.
 FIGURE 8. LMH0387 Registers Tab with Verbose Descriptions

FIGURE 9. LMH0387 Registers Tab without Verbose Descriptions

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Rev 1.1 © 2010 National Semiconductor Corp.
The Display button provides another view of the register set and is depicted in Figure 10. The Display dialog
supports the Windows copy command (Ctrl+c).

FIGURE 10. LMH0387 Register Display

The Load and Save buttons provide a handy mechanism for restoring or saving the register set external to the
evaluation board.

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Typical Performance
Cable Driver Output
Figure 11 shows the typical output waveform from the LMH0387 cable driver at 2.97 Gbps. The input signal is a
2.97 Gbps PRBS10 from the Agilent 86130A BERT. The input is connected differentially to the SDI SMA inputs on
the SD387 with matched 3’ SMA cables. The LMH0387 cable driver slew rate is set for HD/3G mode (SD/HD ¯¯¯ = 0).
The SD387 BNC_IO output is connected through 1m of Belden 1694A cable to the TCA75 75Ω input module on the
Tektronix DSA7125 12.5 GHz Oscilloscope.

FIGURE 11. LMH0387 Cable Driver Output at 2.97 Gbps

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Rev 1.1 © 2010 National Semiconductor Corp.
Equalizer Output
Figure 12 shows the typical output waveform from the LMH0387 equalizer at 2.97 Gbps with 120m Belden 1694A
cable on the input. The input signal is a 2.97 Gbps PRBS10 from the Agilent 86130A BERT. The input is
connected differentially to the SDI SMA inputs on an SD302 eval board with matched 3’ SMA cables. The SD302
output signal is driven through 120m of Belden 1694A cable and received at the BNC_IO input on the SD387. The
SD387 SDO SMA output is connected via a 3’ SMA cable to the 50Ω SMA input on the Tektronix DSA7125
12.5 GHz Oscilloscope.

FIGURE 12. LMH0387 Equalizer Output at 2.97 Gbps with 120m

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Rev 1.1 © 2010 National Semiconductor Corp.
Input and Output Return Loss
Figure 13 shows the LMH0387 input and output return loss measured at the BNC_IO on the SD387. The return
loss is measured on the Rohde & Schwarz ZVR 75Ω 4GHz network analyzer, with a 75Ω BNC to 75Ω Type N
connector on the input. For the input return loss, the equalizer is active and the cable driver is disabled
(TX_EN = 0). For the output return loss, the equalizer is forced to sleep and the cable driver is enabled, with an
8 MHz clock input signal applied to the cable driver inputs.

FIGURE 13. LMH0387 Input and Output Return Loss

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Rev 1.1 © 2010 National Semiconductor Corp.
Trouble Shooting
If the following window (Figure 14) opens after starting the ALP software, double check the hardware setup.

FIGURE 14. Analog LaunchPAD No Devices Error

It may also be that the USB driver is not installed. Check the device manager. There should be an ”NSC ALP
Nano Atmel” device under the “Universal Serial Bus Controllers” as shown in Figure 15.

FIGURE 15. Windows XP, Analog LaunchPAD USB Driver

The software should start with only “LMH0387 - Nano” in the “Devices” pull down menu. If there are more devices
then the software is most likely in demo mode. When the ALP is operating in demo mode there is a “(Demo Mode)”
indication in the lower left of the application status bar as shown in Figure 16.

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Rev 1.1 © 2010 National Semiconductor Corp.
 FIGURE 16. Analog LaunchPAD in Demo Mode

Disable the demo mode by selecting the “Preferences” pull down menu and un-checking “Enable Demo Mode”.

FIGURE 17. Analog LaunchPAD Preferences Menu

After demo mode is disabled, the ALP software will poll the ALP hardware. The ALP software will update and have
only “LMH0387- Nano” under the “Devices” pull down menu.

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Rev 1.1 © 2010 National Semiconductor Corp.
 FIGURE 18. Analog LaunchPAD Screen with Demo Mode Off

SD387 Bill of Materials

Reference Designator Qty Description Manufacturer Manufacturer Part No.
C1, C2, C4, C5, C6, C7, C8 7 Capacitor, 4.7uF, 6.3V, X5R, 0402 Panasonic - ECG ECJ-0EB0J475M
C3, C11 2 Capacitor, 1uF, 6.3V, X5R, 0402 Panasonic - ECG ECJ-0EB0J105M
C9, C12, C13, C14 4 Capacitor, 0.1uF, 16V, X5R, 0402 Panasonic - ECG ECJ-0EB1C104K
C10 1 Capacitor, 0.01uF, 16V, X7R, 0402 Panasonic - ECG ECJ-0EB1C103K
D1 1 LED, Green, 0603 Lite-On LTST-C190GKT
J1 1 BNC, Amphenol, 75-ohm, edge launch Amphenol 31-6009
Johnson
J2, J3, J4, J5 4 SMA, 50-ohm, edge launch Components 142-0701-851
JP1 1 Header, 6x1, 0.1" 3M/ESD 929834-02-36
JP2 1 Header, 4x2, 0.1" 3M/ESD 929836-02-36
PS1, PS2 2 Header, 2x1, 0.1" 3M/ESD 929834-02-36
R1 1 Resistor, 715-ohm, 1/16W, 1%, 0402 Vishay/Dale CRCW0402715RFKED
R2 1 Resistor, 75-ohm, 1/16W, 1%, 0402 Yageo RC0402FR-0775RL
R3 1 Resistor, 220-ohm, 1/16W, 1%, 0402 Rohm MCR01MZPF2200
R4 1 Resistor, 300-ohm, 1/10W, 5%, 0402 Panasonic - ECG ERJ-2GEJ301X
R5 1 Resistor, 100-ohm, 1/16W, 1%, 0402 Rohm MCR01MZPF1000
R6 1 Resistor, 0-ohm, 1/10W, 5%, 0402 Panasonic - ECG ERJ-2GE0R00X
National
U1 1 LMH0387 Configurable IO Semiconductor LMH0387SL

SD387 Schematic

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Rev 1.1 © 2010 National Semiconductor Corp.
 1 2 3 4 5 6
PS1
VCC
2
VCC
1
PS2
C8 C9 C10
2 4.7uF 0.1uF 0.01uF
GND
1
A GND A
VCC
C13
0.1uF
TX_ENABLE

GND
SDHD

MOSI
SCK

VCC
C2
Z75_3 C4 SDI-
GND GND R1 ZDIFF100N_1 Z50_1 J2
R2 4.7uF 715 SMA_R_EDGE
75 U1
VCC 4.7uF
48
47
46
45
44
43
42
41
40
39
38
37

LMH0387
R5
VCC RREF 100
RSVD
RSVD
RSVD

SD/HD

RSVD

TX_EN
VCCTX

MOSI
TERM_TX

VEE

SCK
VEE

C14
GND 0.1uF C5 SDI+
C12 1 36 ZDIFF100P_1 Z50_2 J3
RSVD RREF SMA_R_EDGE
0.1uF 2 35 GND
B VCCTX VEE B
3 34 4.7uF
VCCTX SDI
GND 4 33
RSVD SDI
I/O 5 32 GND
RSVD VEE
6 31
J1 RSVD VEE
C1 7 30
RSVD VCCRX
Z75_1 Z75_2 8 29 MISO
BNC_IO MISO
9 28
RSVD SDO
BNC_EDGE 4.7uF 10 27
RSVD SDO
11 26 SSb C6 SDO+

CDTHRESH
RSVD TERM_RX SS J4
12 25 ZDIFF100P_2 Z50_3
RSVD VEE SMA_R_EDGE

SPI_EN
GND
RSVD
RSVD
RSVD
RSVD

AEC+
AEC-
4.7uF

VEE

VEE
CD
13
14
15
16
17
18
19
20
21
22
23
24
C3 C7 SDO-
Z75_4 ZDIFF100N_2 Z50_4 J5
SMA_R_EDGE
1uF R7 4.7uF
R3 OPEN
220 GND
R6 GND C11 GND
Zero VCC
C VCC JP2 C
GND 1uF VCC
1 2
SD/HD SDHD
3 4
TX ENABLETX_ENABLE
5 6
CD CDb
7 8
HDR_4X2
GND

GND
VCC
LAYOUT NOTE:
CD Z50_n: W=40MIL, ZO=50+-5%
SPI HEADER D1
JP1 LED-GREEN
LAYOUT NOTE: LAYOUT NOTE:
1 GND
SCK
Z75_n: W=20MIL, ZO=75+/-5% 2 SCK R4 ZDIFF100P_n, ZDIFF100N_n: DIFFERENTIAL 100OHM IMPEDANCE
MOSI
3 MOSI
MISO 300
4 MISO
SSb
5 SS
6 GND
HDR_6
GND
D D
Title:
SD387 Evaluation Board for the LMH0387
Sheet: 1 of 1
Size: B Rev: A
Date: 4/19/2010
File: SD387.SchDoc http://www.national.com
© Copyright, National Semiconductor, 2010
1 2 3 4 5 6
SPA Dongle Bill of Materials
Reference Designator Qty Description Manufacturer Manufacturer Part No.
CR2,CR1 2 SUPPRESSOR ESD 24VDC 0603 SMD Littelfuse Inc PGB1010603MR
C1,C2,C3,C4,C5,C6,C100 7 CAP CER .1UF 50V 10% X7R 0603 Murata GRM188R71H104KA93D
C7 1 CAPACITOR TANT 1.0UF 16V 10% SMD Kemet T491A105K016AT
C8,C9 2 CAP CER .22UF 50V Y5V 0603 TDK Corporation C1608Y5V1H224Z
C10,C11 2 CAP CERAMIC 12PF 50V NP0 0603 Kemet C0603C120J5GACTU
C14 1 CAPACITOR TANT 4.7UF 16V 10% SMD Kemet T491A475K016AT
C15 1 CAP CERM 33000PF 5% 50V X7R 0603 AVX Corporation 06035C333JAT2A
Osram Opto LS M670-H2L1-1-0-10-
D1 1 LED TOPLED 628NM SUP RED CLR SMD Semiconductors R18-Z
Osram Opto LSG T670-JL-1-0+JL-1-0-
D5,D2 2 LED TOPLED 628/570 RED/GRN 4PLCC Semiconductors 10-R18-Z
Fairchild
D3 1 DIODE HI CONDUCTANCE 100V LL-34 Semiconductor FDLL4148
JP1,JP2,JP3 3 CONN HEADER VERT .100 3POS 15AU AMP/Tyco 87224-3
JP6,JP7 2 CONN HEADER VERT .100 6POS 15AU AMP/Tyco 87224-6
JP8 1 CONN HEADER VERT .100 4POS 15AU AMP/Tyco 87224-4
J3 1 CONN RECEPT MINI USB2.0 5POS. Hirose UX60-MB-5ST
J7 1 HEADER, 5x2, 0.1” 3M/ESD 929836-02-05-RK
R1,R4,R5,R16,R20,R100 6 RES ZERO OHM 1/10W 5% 0603 SMD Panasonic ERJ-3GEY0R00V
R2,R3 2 RES 22 OHM 1/16W 3300PPM 5% 0603 Panasonic ERA-V33J220V
R6,R7,R101,R102,R103 5 RES 47K OHM 1/16W .1% 0603 SMD Panasonic ERA-3AEB473V
R13,R14,R17,R22,R23 5 RES 1.0K OHM 1/16W .1% 0603 SMD Panasonic ERA-3AEB102V
R18,R15 2 RES 100K OHM 1/16W .1% 0603 SMD Panasonic ERA-3AEB104V
R19 1 RES 120K OHM 1/16W .1% 0603 SMD Panasonic ERA-3AEB124V
SW1,SW2 2 SWITCH TACT APEM Components ADTSM31NV
U1 1 IC AVR MCU 128K 64QFN Atmel AT90USB1287-16MU
U4 1 IC REG LDO 300MA ADJ 8MSOP National Semiconductor LP3982IMM-ADJ/NOPB
Y1 1 CRYSTAL 8.00MHZ 8PF FUND SMD NDK NX5032GA 8MHZ AT-W

SPA Dongle Schematic

SD387EVK User Guide 22 of 23

Rev 1.1 © 2010 National Semiconductor Corp.
 A B C D E
VCC VCC
VCC J2 R100
0ohm C100
1 2 0603 PA[7..0]
PE7 PE6 PA[7..0]
3 4 0.1uF D2
PE5 5 6 PE4 1 2 R14 0603 PA4
PE3 PE2 J1 1Kohm
7 8
PE1 9 10 PE0 PF4 1 2 PA5 R17 0603 4 3
PF5 3 4 VCC 1Kohm LAYOUT NOTE:
4 PF6 RESETB 4
2x5 pin Jumper_open 5 6 LED-Green, Red Group LEDs
PF7
7 8 in-line
PE[7..0] 9 10
C1 LAYOUT NOTE: D5
VCC AVCC 2x5 pin Jumper_open C1 next to pin 52 1 2 R22 0603 PA6
0.1uF 1Kohm
PF[7..0] of U1
C4 PA7 R23 0603 4 3
R1 0603 1Kohm
0ohm 0.1uF PF[7..0] PA[7..0] LED-Green, Red
PF[7..0] AREF PA[7..0]
C2 C3 AVCC
AGND
PA0
PA1
PA2
PF1
PF2
PF3
PF4
PF5
PF6
PF7
PF0

0.1uF 0.1uF AVCC VCC J7

LAYOUT NOTE: VCC
VCC C5 next to pin 3 U1
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49

1 2
PA7 PA6
of U1 3 4

2
LAYOUT NOTE: PA5 5 6 PA4
AREF
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7

PA0
PA1
PA2
AVCC
GND

GND
VCC

Ferrite & capacitors LAYOUT NOTE: PA3 7 8 PA2 + C14 D1

C5 D+ D- resistors PA1 PA0
close to the MCU 9 10
4.7uF LED-super-red
close to the MCU
0.1uF 2x5 pin Jumper_open
J3 PE6 PA3

1
1 PE6 PA3 48
UVCON PE7 2 47 PA4 PA[7..0]
9

VBUS UVCC PE7 PA4 PA5 R13

mini USB 5pin

1 3 UVcc PA5 46
3
R2 22_ohm 0603 D- 4 45 PA6 1Kohm 3
2 R3 22_ohm 0603 D+ D- PA6 PA7 0603
3 5 D+ PA7 44 VCC J5
GND PE2
UCAP CAPACITOR

4
ID 6 UGnd PE2 43
close to the MCU

UCAP PC7
LAYOUT NOTES:

5 7 UCap PC7 42 1 2
VBUS 8 AT90 AVR® 8-Bit 41 PC6 PC7 3 4 PC6
VBus PC6
6

PE3 9 40 PC5 PC5 5 6 PC4

PB0 PE3 PC5 PC4 PC3 PC2
SHIELD 10 PB0 PC4 39 7 8
1

CR1 CR2 PB1 PC3 PC1 PC0

TVS - Zener Diode

TVS - Zener Diode

11 PB1 PC3 38 9 10
+ C7 PB2 12 37 PC2
PB3 PB2 PC2 PC1 2x5 pin Jumper_open
13 PB3 PC1 36 VCC3
1uF PB4 14 35 PC0
PB5 PB4 PC0 PE1 PC[7..0]
15 PB5 PE1 34
R4 0603 PB6 PE0
2

16 PB6 PE0 33
0ohm PB7 PC[7..0] U4 R18 R16 0603 UCAP VCC
PC[7..0] D3
1 8 100Kohm 0ohm
OUT /FAULT
RESETB

VBUS 5V
GND

VCC 2 1 2 7 0603 R20 0603

XTAL2
XTAL1

AGND R5 0603 J4 IN /SHDN R15 0603 0ohm

3 6
GND
VCC

PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7

GND CC
PB7
PE4
PE5

0ohm 1 2 SS DIODE 4 5 100Kohm 5V R21 0603

PD7 PD6 OUT SET
3 4 0ohm_open
PB[7..0] PD5 5 6 PD4 REG_LDO C15 R19
PB[7..0]
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

LAYOUT NOTE: PD3 7 8 PD2 120Kohm !!! DO NOT LOAD R21 !!!
Resistor close PD1 9 10 PD0 0.033uF 0603
U4 OUT = 1.25*(1+(R15+R18)/R19)
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PE4
PE5

to the device If R21 is loaded

2x5 pin Jumper_open
XTAL2
XTAL1

PD[7..0] DO NOT MOUNT R20

RESETB

2 PD[7..0] 2
PD[7..0] DO NOT MOUNT U4
JP7
VCC This will allow use of
JP6
1 GND 1 GND 3.3V from U1 internal
JP8 PB1 MCK - SPI PD7 TDI - JTAG Y1 reguator
2 2
1 GND 3 PB2 MOSI - SPI 3 PD6 TDO - JTAG C6
PB4 PB3 PD5
VCC

2 CS - I2S 4 MISO - SPI 4 TMS - JTAG

3 PD0 SCL - I2S 5 PB0 #SS - SPI 5 PD4 TCK - JTAG 0.1uF
4 PD1 SDA - I2S 6 GND 6 Vref Vref 16MHz CRYSTAL
LAYOUT NOTE: C10 C11
C6 next to pin 21
15pF 15pF VCC VCC
of U1
R6 R7
47Kohm 47Kohm
0603 0603
VCC
RESETB PE2
R101 R102 R103 SW1 C8 SW2 C9
1
RST HWB 1
47Kohm 47Kohm 47Kohm SPST 0.22uF SPST 0.22uF
0603 0603 0603
JP1 JP2 JP3
1 1 1 Title
PB1 2 PB2 2 PB3 2 Reset Circuit Bootloader Atmel Dongle Card
3 3 3 Activation
Size Document Number Rev
B Atmel Dongle Card Rev 1 0f
Date: Thursday, November 06, 2008 Sheet 1 of 1
A B C D E
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