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ISCAS 2000: Geneva, Switzerland
- IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. IEEE 2000
Volume 1
- Akira Toriumi:
Challenge to off-roadmap silicon devices. - Alan C. Seabaugh:
Tunnel diode integrated circuits. - Costa Gerousis, Stephen M. Goodnick, Xiaohui Wang, Wolfgang Porod, Árpád Csurgay, Géza Tóth, Craig S. Lent:
Modeling nanoelectronic CNN cells: CMOS, SETs and QCAs. - Árpád Csurgay, Wolfgang Porod:
Toward nanoelectronic systems integration. 1-4 - Richard Stanley Williams, Philip J. Kuekes:
Molecular nanoelectronics. 5-7 - Arthur H. M. van Roermund, Jaap Hoekstra:
From nanotechnology to nanoelectronic systems, from SETs to neural nets. 8-11 - Omar Nibouche, Ahmed Bouridane, Mokhtar Nibouche, Danny Crookes:
A new pipelined digit serial-parallel multiplier. 12-15 - Dusan Suvakovic, C. André T. Salama:
A pipelined multiply-accumulate unit design for energy recovery DSP systems. 16-19 - D. J. Soudris
, Minas Dasygenis, Adonios Thanailakis:
Designing RNS and QRNS full adder based converters. 20-23 - Shugang Wei, Kensuke Shimizu:
Residue arithmetic circuits using a signed-digit number representation. 24-27 - Ramchan Woo, Se-Joong Lee, Hoi-Jun Yoo:
A 670 ps, 64 bit dynamic low-power adder design. 28-31 - Daniel Gatica-Perez, Ming-Ting Sun, Chuang Gu:
Semiautomatic video object generation using multivalued watershed and partition lattice operators. 32-35 - Jinhui Pan, Shipeng Li
Automatic extraction of moving objects using multiple features and multiple frames. 36-39 - Jin-Woo Kim, Munjae Song, Ig-Jae Kim, Yong-Moo Kwon, Hyoung-Gon Kim, Sang Chul Ahn:
Automatic FDP/FAP generation from an image sequence. 40-43 - Viswanathan Swaminathan, Gerard Fernando:
MPEG-J: Java application engine in MPEG-4. 44-47 - Dapeng Oliver Wu
Adaptive QOS control for MPEG-4 video communication over wireless channels. 48-51 - Ramesh Harjani, Oyvind Birkenes, Jonghae Kim:
An IF stage design for an ASK-based wireless telemetry system. 52-55 - Alain-Serge Porret, Thierry Melly, Christian C. Enz, Eric A. Vittoz:
A low-power low-voltage transceiver architecture suitable for wireless distributed sensors network. 56-59 - Brian J. Minnis, Paul A. Moore, Adrian W. Payne, Alan J. Davie, Nigel P. J. Greer:
A low-IF, polyphase receiver for DECT [in BiCMOS]. 60-63 - Bo Shi, Lars Sundström
A novel design using translinear circuit for linear LINC transmitters. 64-67 - F. Xavier Moncunill-Geniz, Orestes Mas-Casals
A direct-sequence spread-spectrum super-regenerative receiver. 68-71 - Krishnendu Chakrabarty
Built-in self testing of high-performance circuits using twisted-ring counters. 72-75 - Fulvio Corno
An improved cellular automata-based BIST architecture for sequential circuits. 76-79 - Shyue-Kung Lu, Jen-Sheng Shih, Cheng-Wen Wu
Built-in self-test and fault diagnosis for lookup table FPGAs. 80-83 - Dimitri Kagaris, Spyros Tragoudas:
Methods for on-chip embedding of path delay test vectors. 84-87 - Jongwook Park, Sang-Hoon Shin, Sungju Park:
A partial scan design by unifying structural analysis and testabilities. 88-91 - Atsushi Ogata, Naoyuki Aikawa, Masamitsu Sato:
A design method of low delay FIR bandpass filters. 92-95 - Rick M. Roark, Monty A. Escabí:
Design of FIR filters with exceptional passband and stopband smoothness using a new transitional window. 96-99 - Miroslav Vlcek, Pavel Zahradnik, Rolf Unbehauen:
Asymptotic behaviour of FIR filters. 100-103 - Jussi Vesma, Tapio Antero Saramäki:
Design and properties of polynomial-based fractional delay filters. 104-107 - Vladimir V. Lukin
Design and properties of step-like weighting windows. 108-111 - Fu-Yen Kuo, Chung-Wei Ku:
Software radio based re-configurable correlator/FIR filter for CDMA/TDMA receiver. 112-115 - Ridha Radhouane, Peter Liu, Cory Modlin:
Minimizing the memory requirement for continuous flow FFT implementation: continuous flow mixed mode FFT (CFMM-FFT). 116-119 - Yujiro Inouye, Ruey-Wen Liu:
A system-theoretic foundation for blind equalization of an FIR MIMO channel system. 120-123 - Buon Kiong Lau, Yee Hong Leung:
A Dolph-Chebyshev approach to the synthesis of array patterns for uniform circular arrays. 124-127 - Palghat P. Vaidyanathan, Yuan-Pei Lin, Sony Akkarakaran, See-May Phoong:
Optimality of principal component filter banks for discrete multitone communication systems. 128-131 - Geoffrey J. Coram, Brian D. O. Anderson, John L. Wyatt Jr.:
Thermal noise behavior of a nonlinear bridge circuit. 132-135 - Geoffrey J. Coram, John L. Wyatt Jr.:
Poisson and Gaussian models for noisy devices. 136-139 - Eva Vidal, Sonia Porta, Herminio Martínez, Eduard Alarcón, Alberto Poveda:
Complete nonlinear model for the MRC (MOS resistive circuit). 140-143 - Yongwang Ding, Ramesh Harjani:
A universal analytic charge injection model. 144-147 - Matthew Green, Abdelhak M. Zoubir:
A search for a parsimonious basis sequence approximation of time-varying, nonlinear systems. 148-151 - Hongwei Yang, Chen He, Hong-Wen Zhu, Wentao Song:
Prediction of slant path rain attenuation based on artificial neural network. 152-155 - Hazem M. El-Bakry
Fast modular neural nets for face detection. 156-159 - José Manoel de Seixas, William Soares-Filho, Marcelo C. Bossan, Zieli Dutra Thomé, W. C. A. Pereira:
Neural identification of failed fuel rods in nuclear reactors [PWRs]. 160-163 - Ying Li, Bendu Bai, Licheng Jiao:
An adaptive neurofuzzy network for identification of the complicated nonlinear system. 164-167 - Arto Kantsila, Mikko Lehtokangas, Jukka Saarinen:
On equalization with maximum covariance initialized cascade-correlation learning. 168-171 - Francisco Serra-Graells
VLSI CMOS low-voltage log companding filters. 172-175 - Douglas Frey:
C-log domain filters. 176-179 - Daniel Rocha, Wouter A. Serdijn:
A dynamic-translinear fully-integrated highly-directional hearing aid adapter. 180-183 - Esther O. Rodríguez, Alberto Yufera, Adoración Rueda:
A low-voltage √x floating-gate MOS integrator. 184-187 - Emmanuel M. Drakakis, Alison J. Payne:
On the exact realisation of LC ladder finite transmission zeros in log-domain: a theoretical study. 188-191 - Kohkichi Tsuji:
On a new type of extended Petri nets and its applications. 192-195 - Guo-Hui Lin, Guoliang Xue:
A linear time algorithm for computing hexagonal Steiner minimum trees for terminals on the boundary of a regular hexagon. 196-199 - Toshihiko Takahashi:
Dropping method for rectangle packing problem. 200-203 - Jaroslaw K. Cel:
Minty's coloured branch theorem versus Tellegen's theorem. 204-207 - Raimund Ubar, Jaan Raik
Back-tracing and event-driven techniques in high-level simulation with decision diagrams. 208-211 - Xiaoyun Wu, Wenwu Zhu, Zixiang Xiong, Ya-Qin Zhang:
Object-based multiresolution watermarking of images and video. 212-215 - Anastasios Tefas, Ioannis Pitas:
Image authentication using chaotic mixing systems. 216-219 - Sofia Tsekeridou
Wavelet-based self-similar watermarking for still images. 220-223 - Peter Hon-Wah Wong, Oscar C. Au, Justy W. C. Wong:
Image watermarking using spread spectrum technique in log-2-spatio domain. 224-227 - Wen-Nung Lie, Guo-Shiang Lin, Chih-Liang Wu, Ta-Chun Wang:
Robust image watermarking on the DCT domain. 228-231 - Irwin W. Sandberg:
A canonical form for discrete-time systems defined over +. 232-235 - Alexander Yu. Pogromsky
New results for estimation of Hausdorff dimension. 236-239 - Domine M. W. Leenaerts:
On explicit solutions of nonlinear dynamic systems. 240-243 - Efthimios Kappos:
Compactified dynamics and peaking. 244-247 - Tadashi Tsubone, Toshimichi Saito:
On basic piecewise-constant systems. 248-251 - Itsda Boonyaroonate, Takayuki Fukami, Shinsaku Mori:
Class E isolated DC-DC converter using PWM synchronous rectifier. 252-255 - Hoi Lee, Philip K. T. Mok, Wing-Hung Ki:
A novel voltage-control scheme for low-voltage DC-DC converters with fast transient recovery. 256-259 - Noriaki Hara, Ichirou Oota, Fumio Ueno:
Ring type switched-capacitor transformer and its applications. 260-263 - Mamadou Gaye, Sami Ajram, Jean-Yves Lebas, Romain Kozlowski, Georges Salmer:
A 50-100 MHz 5 V to -5 V, 1 W Cuk converter using gallium arsenide power switches. 264-267 - Nicola Femia, Massimo Vitelli, Domenico Cerbasi, Giovanni Spagnuolo:
Analysis of soft synchronous commutations in switching converters. 268-271 - Walter Sachs, Stefan Wolter:
Specification and implementation of a cryptocoprocessor for ISDN. 275-278 - Sarwono Sutikno
An architecture of F(22N) multiplier for elliptic curves cryptosystem. 279-282 - Yan Wang, Chi-Ying Tsui, Roger S. Cheng:
A low power VLSI architecture of SOVA-based turbo-code decoder using scarce state transition scheme. 283-286 - Zhongfeng Wang, Hiroshi Suzuki, Keshab K. Parhi
Efficient approaches to improving performance of VLSI SOVA-based turbo decoders. 287-290 - Li-Minn Ang, Hon Nin Cheung, Kamran Eshraghian:
A dataflow-oriented VLSI architecture for a modified SPIHT algorithm using depth-first search bit stream processing. 291-294 - Tihao Chiang, Hung-Ju Lee, Huifang Sun:
An overview of the encoding tools in the MPEG-4 reference software. 295-298 - Weiping Li, Fan Ling, Xuemin Chen:
Fine granularity scalability in MPEG-4 for streaming video. 299-302 - Shipeng Li
Generic, scalable and efficient shape coding for visual texture objects in MPEG-4. 303-306 - Eric Petajan:
The communication of virtual human faces using MPEG-4 tools. 307-310 - Iraj Sodagar, Hung-Ju Lee, Paul Hatrack, Bing-Bing Chai:
Multi-scale zerotree entropy coding. 311-314 - Pietro Andreani, Sven Mattisson:
A 1.8-GHz CMOS VCO tuned by an accumulation-mode MOS varactor. 315-318 - Mark Lehne, John T. Stonick, Un-Ku Moon:
An adaptive offset cancellation mixer for direct conversion receivers in 2.4 GHz CMOS. 319-322 - Yue Wu, Chunlei Shi, Mohammed Ismail, Håkan K. Olsson:
Temperature compensation design for a 2.4 GHz CMOS low noise amplifier. 323-326 - Toby Kwok-Kei Kan, Kin-Chung Mak, Dongsheng Ma, Howard C. Luong:
A 2-V 900-MHz CMOS mixer for GSM receivers. 327-330 - Donhee Ham
Design and optimization of a low noise 2.4 GHz CMOS VCO with integrated LC tank and MOSCAP tuning. 331-334 - Carsten Wegener, Michael Peter Kennedy:
Model-based testing of high-resolution ADCs. 335-338 - Saman Adham, Dhamin Al-Khalili, Côme Rozon, Douglas Racz:
Comprehensive defect analysis and testability of current-mode logic circuits. 339-342 - Patrice Vado, Yvon Savaria, Yannick Zoccarato, Chantal Robach:
A methodology for validating digital circuits with mutation testing. 343-346 - Marie-Lise Flottes, Bruno Rouzeyre, Laurent Volpe:
A controller resynthesis based method for improving datapath testability. 347-350 - Valentin Muresan, Xiaojun Wang, Mircea Vladutiu:
The left edge algorithm in block test scheduling under power constraints. 351-354 - Wu-Sheng Lu:
Design of stable minimax IIR digital filters using semidefinite programming. 355-358 - Kazuyoshi Uesaka, Masayuki Kawamata:
Synthesis of low-sensitivity second-order digital filter using genetic programming with automatically defined functions. 359-362 - Luiz W. P. Biscainho, Paulo Sergio Ramirez Diniz
On the effects of zero-pole pairs and individual zeros and poles on discrete-time transfer functions. 363-366 - Johnny Holmberg, Lennart Harnefors, Svante Signell:
Stability analysis of the second-order lossless digital integrator allpass filter. 367-370 - Xi Zhang, Kazuyoshi Suzuki, Toshinori Yoshikawa:
Complex Chebyshev approximation for IIR digital filters. 371-374 - Jie Chen, Paul Lungner, Jit Kumar:
A flexible design of packets over SONET or directly over fiber. 375-378 - Jian Ding, Gerald E. Sobelman:
ATM switch design using code division multiple access techniques. 379-382 - Alessandra Giovanardi, Gianluca Mazzini:
Impact of chaotic self-similar and Poisson traffics on WLAN token passing protocols. 383-386 - Ilion Yi-Liang Hsiao, Chein-Wei Jen:
A new hardware design and FPGA implementation for Internet routing towards IP over WDM and terabit routers. 387-390 - José G. Delgado-Frias, Jabulani Nyathi:
A wave-pipelined CMOS associate router for communication switches. 391-394 - Wu-Sheng Lu:
Design of stable 2D IIR digital filters using iterative semidefinite programming. 395-398 - Paul Zaris, Jeffrey Wood, Eric Rogers:
The zero structure of nD linear systems. 399-402 - Krzysztof Galkowski, Eric Rogers, Artur Gramacki, Jaroslaw Gramacki, David H. Owens:
Strong practical stability for a class of 2D linear systems. 403-406 - Rudolf Rabenstein, Lutz Trautmann:
Partial differential equation models for continuous multidimensional systems. 407-410 - Sankar Basu:
System theoretic ideas for construction of ND in (N≥2) causal, stable, perfect reconstruction filter banks. 411-414 - Nicolas Donckers, Carlos Dualibe, Michel Verleysen:
A current-mode CMOS loser-take-all with minimum function for neural computations. 415-418 - Francesco Diotalevi, Maurizio Valle, Gian Marco Bo, Ezio Biglieri, Daniele D. Caviglia:
An analog on-chip learning circuit architecture of the weight perturbation algorithm. 419-422 - Kwok Kit Lau, Bertram E. Shi
A 1-D local image velocity sensor using Gabor filtering. 423-426 - Ronald G. Spencer:
CMOS dynamic linking networks for real-time human face tracking. 427-430 - Tina A. Hudson, David C. Lin, Julian A. Bragg, Edgar A. Brown, Stephen P. DeWeerth:
An analog VLSI model of muscle sarcomeres. 431-434 - Seung-Bin You, Ku-Whan Lee, Hee-Cheol Choi, Ho-Jin Park, Jae-Whui Kim, Philip Chung:
A 3.3 V 14-bit 10 MSPS calibration-free CMOS pipelined A/D converter. 435-438 - Hee-Cheol Choi, Ho-Jin Park, Shin-Kyu Bae, Jae-Whui Kim, Philip Chung:
A 1.4 V 10-bit 20 MSPS pipelined A/D converter. 439-442 - Jen-Shiun Chiang, Ming-Da Chiang:
The design of a 1.5 V, 10-bit, 10 M samples/s low power pipelined analog-to-digital converter. 443-446 - Nam-Keal Kim, Wang-Seup Yeum, Jae-Whui Kim:
A 2.4 V, 12 mW stereo audio D/A converter with double sampling switching. 447-450 - Zhilliang Zheng, Byung-Moo Min, Un-Ku Moon, Gabor C. Temes:
Efficient error-cancelling algorithmic ADC. 451-454 - Mario Roberto Casu
A high accuracy-low complexity model for CMOS delays. 455-458 - Jorge Juan-Chico, Paulino Ruiz-de-Clavijo, Manuel J. Bellido, Antonio J. Acosta, Manuel Valencia:
Inertial and degradation delay model for CMOS logic gates. 459-462 - Li-Pen Yuan, Sung-Mo Kang:
Detection and elimination of initial transient for accurate power analysis. 463-466 - Ramamurti Chandramouli, Vamsi K. Srikantam:
Optimum probability model selection using Akaike's information criterion for low power applications. 467-470 - Radu Marculescu, Cristinel Ababei:
Improving simulation efficiency for circuit-level power estimation [CMOS]. 471-474 - Armen H. Zemanian:
Maximum principles for node voltages and branch currents in transfinite resistive networks. 475-478 - Jaroslaw K. Cel:
Identifications of Hasler's classes of linear resistive circuit structures. 479-482 - Bradley A. Minch:
Synthesis of dynamic multiple-input translinear element networks. 483-486 - Gerald E. Subak-Sharpe, George P. H. Styan:
A necessary condition for the realization of a resistive n-port based on network size and on the concept of weighted terminal valency. 487-490 - Andreas Bauer, Wowgang Schwarz:
Circuit analysis and optimization with automatically derived Volterra kernels. 491-494 - Yefim Bevkovich, Adrian Ioinovici:
Power factor correction circuit with ZVT for all switches. 495-498 - Theerayod Wiangtong
FPGA based-IC design for inverter with vector modulation technique. 499-502 - Wilson W. S. Chan, Philip K. T. Mok, Alex T. K. Ng, Wing-Hung Ki, Johnny K. O. Sin:
IC controller for phase-controlled dimmable compact fluorescent lamps with closed-loop control. 503-506 - Toshimichi Saito, Hiroyuki Torikai, Yoshikazu Nomoto:
A buck-boost converter controlled by periodic inputs. 507-510 - Martin Streitenberger
Theory and implementation of a new type of digital power amplifier for audio applications. 511-514 - Amir M. Sodagar, G. Roientan Lahiji:
Parabolic approximation: a new method for phase to amplitude conversion in sine-output direct digital frequency synthesizers. 515-518 - Thuyen Le, Manfred Glesner:
An efficient filter bank architecture for the cross-term reduced processing of discrete time-frequency distributions. 519-522 - Sony Akkarakaran, Palghat P. Vaidyanathan:
Principal component filter banks: existence issues, and application to modulated filter banks. 523-526 - Yang Xiao:
Schur stability of interval bivariate polynomials. 527-530 - Srinivasan Balakrishnan, Soumitra Kumar Nandy:
Performance evaluation of multithreaded architectures for media processing applications. 531-534 - Dietrich Fränken:
Wave digital simulation of electrical networks containing nonlinear dynamical elements-a new approach. 535-538 - Soo-Chang Pei, Peng-Hua Wang:
Closed-form design of maximally flat R-regular Mth-band FIR filters. 539-542 - Mariane R. Petraglia, Paulo Bulkool Batalheiro:
Prototype filter design for subband adaptive filtering structures with critical sampling. 543-546 - Lan-Da Van, Chih-Chun Tang, Shing Tenqchen, Wu-Shiung Feng:
A new VLSI architecture without global broadcast for 2-D digital filters. 547-550 - Pasi Kolinummi, Juha Sarkijarvi, Timo D. Hämäläinen, Jukka Saarinen:
Scalable implementation of H.263 video encoder on a parallel DSP system. 551-554 - Patrizia Ferrari, Andrea Mariscotti, Paolo Pozzobon:
Reference curves of the pantograph impedance in DC railway systems. 555-558 - Abdesselam Klouche-Djedid, Stuart S. Lawson:
A general design of mixed IIR-FIR two channel QMF bank. 559-562 - Mariane R. Petraglia, Rogerio Guedes Alves, Paulo Sergio Ramirez Diniz
Convergence analysis of an oversampled subband adaptive filtering structure with local errors. 563-566 - Yuval Bistritz:
On Jury's test for 2-D stability of discrete-time systems and its simplification by telepolation. 567-570 - Seetharaman Ramachandran, S. Srinivasan:
A programmable pruning level control based MPEG video encoder. 571-574 - Radu P. Matei:
Haar filtering with pyramidal resistive networks. 575-578 - Per Löwenborg, Håkan Johansson, Lars Wanhammar:
A class of two-channel approximately perfect reconstruction hybrid analog/digital filter banks. 579-582 - Olli Lehtoranta, Timo D. Hämäläinen, Jukka Saarinen:
Real-time H.263 encoding of QCIF-images on TMS320C6201 fixed point DSP. 583-586 - Iwao Nagashiro, Toichi Machida:
A system function representation by scale-shift transform-the case of Doppler effect. 587-590 - David B. H. Tay:
Two stage, least squares design of biorthogonal filter banks. 591-594 - Seongmo Park, Seongmin Kim, Kyeongjin Byeon, Jinjong Cha, Hanjin Cho:
An area efficient video/audio codec for portable multimedia application. 595-598 - Sergio L. Toral Marín, José Manuel Quero Reboul, Leopoldo García Franquelo:
Stochastic pulse coded arithmetic. 599-602 - Thuyen Le, Manfred Glesner:
Rotating stall analysis using signal-adapted filter bank and Cohen's time-frequency distributions. 603-606 - Seetharaman Ramachandran, S. Srinivasan:
Design and implementation of an EPLD-based variable length coder for real time image compression applications. 607-610 - Olaf Machul, Dirk Hammerschmidt, Dirk Weiler, Bedrich J. Hosticka:
Nonlinear function generation using oversampled ΣΔ-modulators. 611-614 - Chee Kiang Goh, Yong Ching Lim:
A WLS algorithm for the design of low-delay quadrature mirror filter banks. 615-618 - Chien-Yu Chen, Zhong-Lan Yang, Tu-Chih Wang, Liang-Gee Chen:
A programmable VLSI architecture for 2-D discrete wavelet transform. 619-622 - Antonio Buonomo, Alessandro Lo Schiavo:
On the analysis and design of second-order harmonic oscillators. 623-626 - Jinsong Mao, Shing-Chow Chan, Ka-Leung Ho:
Design of two-channel PR FIR filter banks with low system delay. 627-630 - Chih-Chang Chen, Oscal T.-C. Chen:
A low-complexity computation scheme of discrete cosine transform and quantization with adaptation to block contents. 631-634 - Mayukh Bhattacharya, Shriram Kulkarni, Alejandro F. González, Pinaki Mazumder:
A prototyping technique for large-scale RTD-CMOS circuits. 635-638 - Robert Bregovic, Tapio Saramäki:
A new method for the design of two-channel perfect-reconstruction linear-phase FIR filter banks. 639-642 - Luis Fernando González Pérez, Emmanuel Boutillon:
A study of a suboptimal VLSI architecture for joint source-channel trellis coding. 643-646 - Thomas Falk, Wolfgang Schwarz:
Impulse sensitivity functions of oscillators. 647-650 - Zhen Luo, Ruby B. Lee:
Cost-effective multiplication with enhanced adders for multimedia applications. 651-654 - Mitchai Chongcheawchamnan, Mike J. Blewett, Ian D. Robertson:
Feedforward linearisation applied to a direct carrier modulation transmitter. 655-658 - Wael M. Badawy
A VLSI architecture for hierarchical mesh based motion compensation using scalable affine transformation core. 659-662 - Seiichiro Moro, Tadashi Matsumoto:
Synchronization phenomena in coupled system of RC transistor oscillators. 663-666 - Vasily G. Moshnyaga, Kazuhito Nakasima:
Reduction of background computations in adaptive block-matching motion estimation. 667-670 - Chi K. Tse, Yuk-Ming Lai:
Control of bifurcation in current-programmed DC/DC converters: a reexamination of slope compensation. 671-674 - Andreas Demosthenous, John Taylor, Geoff Morrison:
An analogue approach to the design of motion estimators for digital video encoding. 675-678 - Masayuki Yamauchi, Masahiro Wada, Yoshifumi Nishio, Akio Ushida:
Collisions between two phase-inversion-waves in an array of oscillators. 679-682 - Ching-Long Su, Chein-Wei Jen:
Motion estimation using on-line arithmetic. 683-686 - Mao-Feng Lan, Randall L. Geiger:
Gradient sensitivity reduction in current mirrors with non-rectangular layout structures. 687-690 - Jarno K. Tanskanen, Tero Sihvo, Jarkko Niittylahti, Jarmo Takala, Reiner Creutzburg
Parallel, memory access schemes for H.263 encoder. 691-694 - Yuri Bruck, Michael Zelikson, Gennady Burdo:
Novel design technique for highly linear current mode amplifiers. Analysis, design, simulations. 695-698 - Er-Wei Bai, Zhi Ding:
Zero-forcing equalizability of FIR and IIR multi-channel systems with and without perfect measurements. 699-701 - Gleb V. Klimovitch:
Near-carrier oscillator spectrum due to flicker and white noise. 703-706 - Mårten Sjöström
Properties of smoothing with time gating. 707-710 - Mieczyslaw Jessa
Data encryption algorithms using one-dimensional chaotic maps. 711-714 - Ubirajara F. Moreno, Pedro L. D. Peres, Ivanil S. Bonatti:
Contributions to the analysis of second order piecewise linear systems with chaotic oscillations. 715-718 - Munehisa Sekikawa, Tetsuya Miyoshi, Naohiko Inaba:
The successive occurrence of torus doubling. 719-722 - Gianluca Mazzini, Riccardo Rovatti, Gianluca Setti:
Non-average performance of chaos-based DS-CDMA: driving optimization towards exploitable maps. 723-726 - Zsolt Miklós Kovács-Vajna, Emilio Sardini
Chaotic behavior of 741 opamps subjected to EMI conveyed to power supply rails. 727-730 - Wataru Ohno, Tetsuro Endo:
A double crisis-induced intermittency in a forced PLL equation. 731-734 - Thomas Beth:
Quantum computing: an introduction. 735-736 - Umesh V. Vazirani:
Quantum computing and quantum complexity theory. 737-739 - Markus Grassl:
Methods of quantum error correction. 740-743 - Kai Pahlke, Lars Kroneberg, Wolfgang Mathis:
A CNOT-gate implementation for information transfer by the phonon bus. 744-747 - Muhammad E. S. Elrabaa, Mohab H. Anis, Mohamed I. Elmasry:
A contention-free domino logic for scaled-down CMOS technologies with ultra low threshold voltages. 748-751 - Ramin Rafati, Sied Mehdi Fakhraie, Kenneth C. Smith:
Low-power data-driven dynamic logic (D3L) [CMOS devices]. 752-755 - Chulwoo Kim, Seong-Ook Jung, Kwang-Hyun Baek, Sung-Mo Kang:
Parallel dynamic logic (PDL) with speed-enhanced skewed static (SSS) logic. 756-759 - Bai-Sun Kong, Young-Hyun Jun:
Data-dependent evaluating latched CMOS differential logic family for statistical power reduction. 760-763 - Roland Strandberg, Jiren Yuan:
Single input current-sensing differential logic (SCSDL). 764-767
Volume 2
- Christian F. Roos, Harald Rohde, Stephan Gulde, Andreas Mundt, Georges Reymond, Madeleine Lederbauer, Jürgen Eschner
Towards quantum information with trapped calcium ions. - Guobin Shen, Bing Zeng, Ming Lei Liou:
Achieving optimal rate-distortion performance in arbitrarily-shaped transform coding. 1-4 - Guobin Shen, Bing Zeng, Ming Lei Liou:
An efficient hybrid arbitrarily-shaped object coding technique. 5-8 - Hani Sorial, William E. Lynch, André Vincent:
Joint bit-allocation for MPEG encoding of multiple video sequences with minimum quality-variation. 9-12 - Chung-Wen Hung, David W. Lin:
Towards jointly optimal rate allocation for multiple videos with possibly different frame rates. 13-16 - Chia-Wen Lin, Te-Jen-Liou, Yung-Chang Chen:
Dynamic rate control in multipoint video transcoding. 17-20 - Francisco Colodro, Antonio Jesús Torralba Silgado, Alfredo Pérez Vega-Leal, Leopoldo García Franquelo:
Multirate-multibit sigma-delta modulators. 21-24 - Saska Lindfors, Kari Halonen:
Two-step quantization architectures for multibit ΔΣ-modulators. 25-28 - Craig Petrie, Matthew R. Miller:
A background calibration technique for multibit delta-sigma modulators. 29-32 - Peter Kiss, José Silva, Un-Ku Moon, John T. Stonick, Gabor C. Temes:
Improved adaptive digital compensation for cascaded ΔΣ ADCs. 33-36 - Rocío del Río, Fernando Medeiro, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez:
High-order cascade multibit ΣΔ modulators for xDSL applications. 37-40 - Ming-Luen Liou, Tzi-Dar Chiueh:
A parametric module design framework and its application to gate-level datapath/DSP module synthesis. 41-44 - Albrecht P. Stroele:
Synthesizing data paths with arithmetic self-test. 45-48 - Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee:
Automatic distributed asynchronous control circuit generation from data flow graph for asynchronous high-level synthesis. 49-52 - Srinivas Katkoori
Scheduling for low power under resource and latency constraints. 53-56 - Mineo Kaneko, Yoshitaka Nishio, Satoshi Tayu:
Exact and heuristic methods of assignment driven scheduling for data-path synthesis applications. 57-60 - Jung-Pil Choi, Seung-Cheol Shin, Jin-Gyun Chung:
Efficient ROM size reduction for distributed arithmetic. 61-64 - Saman S. Abeysekera, Kabi Prakash Padhi:
Design of multiplier free FIR filters using a LADF sigma-delta (Σ-Δ) modulator. 65-68 - Yong Ching Lim, Ya Jun Yu:
A successive reoptimization approach for the design of discrete coefficient perfect reconstruction lattice filter bank. 69-72 - Shing-Chow Chan, Wei Liu
Perfect reconstruction modulated filter banks with sum of powers-of-two coefficients. 73-76 - Juha Yli-Kaakinen, Tapio Saramäki:
An algorithm for the design of multiplierless approximately linear-phase lattice-wave digital filters. 77-80 - Liang Jin, Qinye Yin, Bo-Feng Jiang:
Direction finding of wideband signals via spatial-temporal processing in wireless communications. 81-84 - Der-Zheng Liu, Che-Ho Wei:
Asynchronous symbol timing recovery with adaptive interpolation filter for high data-rate digital mobile radio. 88- - Chih-Sheng Chou, David W. Lin:
Training techniques of space-time Viterbi equalizers for high speed mobile communication. 89-92 - Guoquan Cai, Guowen Song, Dapeng Yu, Xingmei Zhong:
An adaptive algorithm for narrow-band interference rejection in DSSS systems. 93-95 - Er-Wei Bai, Zhi Ding:
Blind decision feedback equalization of time-varying channels with DPSK inputs. 96-99 - Carles Batlle, Enric Fossas, Gerard Olivar
From Floquet exponents to control of chaos in piecewise linear systems. 100-103 - Naohiko Inaba, Takahiro Tamua, Juichi Miyamichi:
Mechanism for taming chaos by weak harmonic perturbations. 104-107 - Alexander L. Baranovski, Andreas Mögel, Wolfgang M. Schwarz, Oliver Woywode:
Chaotic control of a DC-DC-converter. 108-111 - Erik M. Bollt:
Controlling invariant density: an l∞ solution to the inverse Frobenius-Perron problem. 112-115 - Xiao Fan Wang, Guanrong Chen, Kim-Fung Man:
Chaotifing a continuous-time system by time-delay feedback. 116-119 - Tamás Roska, Ángel Rodríguez-Vázquez:
Review of CMOS implementations of the CNN universal machine-type visual microprocessors. 120-123 - István Szatmári, Ákos Zarándy, Péter Földesy, László Kék:
An analogic CNN engine board with the 64×64 analog I/O CNN-UM chip. 124-127 - Wai-Chi Fang:
A smart vision system-on-a-chip design based on programmable neural processor integrated with active pixel sensor. 128-131 - Paolo Arena, Luigi Fortuna, Francesco Giuffre:
Multidimensional RD-CNNs: a circuit realization. 132-135 - Szabolcs Tõkés, László Orzó, Csaba Rekeczky, Tamás Roska, Ákos Zarándy:
An optical CNN implementation with stored programmability. 136-139 - Jader A. De Lima, Carlos Dualibe:
On designing linearly-tunable ultra-low voltage CMOS gm-C filters. 140-143 - Y. W. Choi, Howard C. Luong:
A high-Q and wide-dynamic-range CMOS IF bandpass filter for monolithic receivers. 144-147 - Armin Tajalli
A 1.5-V supply, video range frequency, Gm-C filter. 148-151 - Chunlei Shi, Yue Wu, Hassan O. Elwan, Mohammed Ismail:
A low-power high-linearity CMOS baseband filter for wideband CDMA applications. 152-155 - Salvatore Levantino, Alfio Zanchi, Andrea Bonfanti, Carlo Samori:
Fast simulation techniques for phase noise analysis of oscillators. 156-159 - Yorgos Koutsoyannopoulos, Yannis Papananos, Sotiris Bantas, Carlo Alemanni:
Performance limits of planar and multi-layer integrated inductors. 160-163 - Leonard A. MacEachern, Tajinder Manku:
Metal-over-gate MOSFET modeling for radio frequency IC applications. 164-167 - Mark M. Gourary, Sergey G. Rusakov
Computational method of stability investigation for large analog circuits. 168-171 - Eric G. Mercer, Chris J. Myers:
Stochastic cycle period analysis in timed circuits. 172-175 - Andreas Hutter, Georg Giebel, Walter Stechele:
A coprocessor architecture implementing the MPEG-4 visual core profile for mobile multimedia applications. 176-179 - Mladen Berekovic
Co-processor architecture for MPEG-4 main profile visual compositing. 180-183 - Hao-Chieh Chang, Yung-Chi Chang, Yuan-Bin Tsai, Chih-Peng Fan
MPEG-4 video bitstream structure analysis and its parsing architecture design. 184-187 - Masafumi Takahashi, Tsuyoshi Nishikawa, Hideho Arakida, Noriaki Machida, Hideaki Yamamoto, Toshihide Fujiyoshi, Yoko Matsumoto, Osamu Yamagishi, Tatsuo Samata, Atsushi Asano, Toshihiro Terazawa, Kenji Ohmori, Junya Shirakura, Yoshinori Watanabe, Hiroki Nakamura, Shigenobu Minami, Tohru Furuyama:
A scalable MPEG-4 video codec architecture for IMT-2000 multimedia applications. 188-191 - Hans-Joachim Stolberg, Mladen Berekovic
The M-PIRE MPEG-4 codec DSP and its macroblock engine. 192-195 - Irwin W. Sandberg:
Time-varying linear systems and input-output stability. 196-199 - Jaewook Lee, Hsiao-Dong Chiang:
Stability regions of non-hyperbolic dynamical systems: theory and optimal estimation. 200-203 - Michal Tadeusiewicz:
Proving asymptotic stability of equilibrium points of MOS transistor circuits. 204-207 - Yuzo Ohta, Kenichiro Yamamoto:
Stability analysis of nonlinear systems via piecewise linear Lyapunov functions. 208-211 - Anton Kummert:
Parametric model for 2D real scattering Schur polynomials. 212-215 - Claudio Busada
Sensorless variable structure speed control of an induction motor. 216-219 - Bei Gou, Ali Abur:
An efficient method for multiple measurement placement in power networks. 220-223 - Yunkun Fan, Dagmar Niebur, Chika O. Nwankpa, Harry G. Kwatny, Robert Fischl:
Multiple power flow solutions of small integrated AC/DC power systems. 224-227 - Ian A. Hiskens, M. A. Pai:
Hybrid systems view of power system modelling. 228-231 - Raoul Farer, Edward Grant, Tushar K. Ghosh
A rule-based robotic control approach to melt-blowing for shaped fabric structures. 232-235 - Harald Weinfurter
Quantum communication and entanglement. 236-239 - Yuriy Makhlin, Gerd Schön, Alexander Shnirman:
Nano-electronic circuits as quantum bits. 241-244 - Robert H. Blick, Heribert Lorenz:
Possible definition of quantum bits in coupled quantum dots. 245-248 - David J. Foley, Michael P. Flynn:
A 3.3 V, 1.6 GHz, low-jitter, self-correcting DLL based clock synthesizer in 0.5 μm CMOS. 249-252 - Youcef Fouzar, Mohamad Sawan, Yvon Savaria:
A new fully integrated CMOS phase-locked loop with low jitter and fast lock time. 253-256 - Kuo-Hsing Chen, Huan-Sen Liao, Lin-Jiunn Tzou:
A low-jitter and low-power phase-locked loop design. 257-260 - Jae J. Chang, Martin Anthony Brooke:
A clock extraction circuit using passive components-free filter in standard digital process. 261-264 - Jinn-Shyan Wang, Pei-Lung Lin, Wern-Ho Sheen, Duo Sheng, Yu-Ming Huang:
A compact adaptive equalizer IC for HIPERLAN system. 265-268 - Zihua Guo, Oscar C. Au, Khaled Ben Letaief:
Parameter estimation for image/video transcoding. 269-272 - Marek Domanski, Adam Luczak, Slawomir Mackowiak:
Scalable MPEG video coding with improved B-frame prediction. 273-276 - Gan-Cheih Chang, Weo-Nung Lie:
Multi-view image compression and intermediate view synthesis for stereoscopic applications. 277-280 - W. A. C. Fernando, Cedric Nishan Canagarajah, David R. Bull:
Video special effects editing in MPEG-2 compressed video. 281-284 - Ching-Min Cheng, Soo-Chang Pei, Lung-Feng Ho:
Limited color display for compressed video. 285-288 - Rany A. Tawfik, Aly H. Fahmy, Aly E. Salama:
Analog VLSI design of supervised-learnable neural cell using switched-current technique. 289-292 - Jonathan Coulombe, Mohamad Sawan, Chunyan Wang:
Variable resolution CMOS current mode active pixel sensor. 293-296 - Alyssa B. Apsel, Zaven K. Kalayjian, Andreas G. Andreou, George Simonis, Wayne Chang, Madhumita Datta, Bikash Koley:
Edge orientation enhancement using optoelectronic VLSI and asynchronous pulse coding. 297-300 - Atsushi Iwata, Makoto Nagata, Noriaki Takeda, Mitsuru Homma, Takashi Morie:
Pulse modulation circuit architecture and its application to functional image sensors. 301-304 - Charles S. Wilson, Paul E. Hasler, Stephen P. DeWeerth:
Synchrony detection for spike-mediated computation. 305-308 - Min Zhao, Sachin S. Sapatnekar:
Dual-monotonic domino gate mapping and optimal output phase assignment of domino logic. 309-312 - Bogdan J. Falkowski, Sudha Kannurao:
Efficient spectral method for disjoint bi-decompositions of Boolean functions. 313-316 - Jiann-Chyi Rau, Yan-Min Chen, Shih-Chieh Chang:
A compact factored form for a Boolean function. 317-320 - Bogdan J. Falkowski, Sudha Kannurao:
Skew symmetry detection using the Walsh spectral coefficients. 321-324 - Shen-Fu Hsiao, Jia-Siang Yeh, Da-Yen Chen:
High-performance multiplexer-based logic synthesis using pass-transistor logic. 325-328 - Takao Hinamoto, S. Kanemori:
Error spectrum shaping in state-space digital filters with L2 -scaling constraints. 329-332 - Hung-Ching Lu, Shian-Tang Tzeng:
Genetic algorithm approach for designing arbitrary FIR log filters. 333-336 - Young-Woo Kim, Young-Mo Yang, Jae-Tack Yoo, Soo-Won Kim:
Low-power digital filtering using approximate processing with variable canonic signed digit coefficients. 337-340 - Nabil R. Yousef, Ali H. Sayed:
A unified approach to the steady-state analysis of quantized adaptive filtering algorithms. 341-344 - Li-Hsun Chen, Wei-Lung Liu, Oscal T.-C. Chen:
Determination of radix numbers of the Booth algorithm for the optimized programmable FIR architecture. 345-348 - Korrai Deergha Rao, M. N. S. Swamy, Eugene I. Plotkin:
Complex EKF neural network for adaptive equalization. 349-352 - Weng Ho Yung, Min Jian, Yew Wee Ho:
Polyphase decomposition channelizers for software radios. 353-356 - Gonçalo Nuno Gomes Tavares, Luís Miguel Gomes Tavares, Moisés Simões Piedade:
A new ML-based data-aided feedforward symbol synchronizer for burst-mode transmission. 357-360 - Daniele Domanin, Umberto Gatti, Piero Malcovati, Franco Maloberti:
A multipath polyphase digital-to-analog converter for software radio transmission systems. 361-364 - Bob Ka-Man Wong, Chi-Ying Tsui, Roger S.-K. Cheng:
Low complexity VLSI implementation of a joint successive interference cancellation with interleaving scheme. 365-368 - Roberto Santos Bueno, José Luis Rodríguez Marrero:
Application of the OGY method to the control of chaotic DC-DC converters: theory and experiments. 369-372 - Maciej Ogorzalek, Hervé Dedieu:
Control theory approach to shadowing and possible applications. 373-376 - Mario di Bernardo:
Controlling switching systems: a bifurcation approach. 377-380 - Michele Basso, Lorenzo Giovanardi, Alberto Tesi:
LMI-based synthesis for controlling periodic solutions in a class of nonlinear systems. 381-384 - Diego M. Alonso, Eduardo E. Paolini
Bifurcation control in an underactuated pendulum. 385-388 - Ronald Kunz, Ronald Tetzlaff
Brain electrical activity in epilepsy: characterization of the spatio-temporal dynamics with cellular neural networks based on a correlation dimension analysis. 389-392 - Pier Paolo Civalleri, Marco Gilli:
Analysis and design of cellular neural networks, through a space-time spectral approach. 393-396 - Ziyi Lu, Bertram E. Shi
Binocular visual feedback with CNN sensors. 397-400 - Gustavo Liñán
Implementation of non-linear templates using a decomposition technique by a 0.5 μm CMOS CNN universal chip. 401-404 - Marco Balsi, Francesco Voci:
Fuzzy reasoning for the design of CNN-based image processing systems. 405-408 - John B. Hughes, Apisak Worapishet, Christofer Toumazou:
Switched-capacitors versus switched-currents: a theoretical comparison [in CMOS]. 409-412 - Apisak Worapishet, John B. Hughes, Christofer Toumazou:
Low-voltage class AB two-step sampling switched-currents. 413-416 - Piotr Dudek, Peter J. Hicks:
A CMOS general-purpose sampled-data analogue microprocessor. 417-420 - Saroj Rout, Edward K. F. Lee:
Design of 1 V switched-current cells in standard CMOS process. 421-424 - Xaojing Shi, Hirokazu Matsumoto, Kenji Murao:
Gain- and offset-compensated non-inverting SC circuits. 425-428 - Dominique Schreurs
Evaluation of non-linear modelling techniques for MOSFETs based on vectorial large-signal measurements. 429-432 - Qiang Zhang, Juin J. Liou, John McMacken, Kevin Stiles, J. Ross Thomson, Paul Layman:
An efficient and practical MOS statistical model for digital applications. 433-436 - Kenichi Okada, Hidetoshi Onodera:
Statistical modeling of device characteristics with systematic fluctuation. 437-440 - Nadia Harabech, Rachid Bouchakour, Pierre Canet, Philippe Pannier, Jean-Pierre Sorbier:
Extraction of Fowler-Nordheim parameters of thin SiO2 oxide film including polysilicon gate depletion: validation with an EEPROM memory cell. 441-444 - Jinghong Chen, Sung-Mo Kang:
An algorithm for automatic model-order reduction of nonlinear MEMS devices. 445-448 - Hao-Chieh Chang, Liang-Gee Chen, Mei-Yun Hsu, Yung-Chi Chang:
Performance analysis and architecture evaluation of MPEG-4 video codec system. 449-452 - Andrea Graziani, Stefano Battista:
Optimization of an MPEG-4 decoding algorithm on a "very long instruction word" architecture. 453-456 - Jagan Thinakaran, Duan Juat Wong-Ho, Nam Ling:
An architecture for MPEG-4 binary shape decoder. 457-460 - Thuyen Le, Manfred Glesner:
Configurable VLSI-architectures for both standard DCT and shape-adaptive DCT in future MPEG-4 circuit implementations. 461-464 - Souhila Boughoufalah, Jean-Claude Dufourd, Frédéric Bouilhaguet:
MPEG-Pro, an authoring system for MPEG-4. 465-468 - Oscar De Feo, Gian Mario Maggio
Bifurcation phenomena in the Colpitts oscillator: a robustness analysis. 469-472 - Herbert H. C. Iu, C. K. Tse:
Bifurcation in parallel-connected boost DC/DC converters. 473-476 - Nicholas G. Maratos, Costas D. Vournas:
Relationships between static bifurcations and constrained optima. 477-480 - Takuji Kousaka, Takashi Kido, Tetsushi Ueta, Hiroshi Kawakami, Minoru Abe:
Analysis of border-collision bifurcation in a simple circuit. 481-484 - Guillermo L. Calandrini, Daniel W. Berns, Eduardo E. Paolini
On cyclic fold bifurcations in nonlinear systems. 485-488 - Hung-Ching Lu, Ta-Hsiung Hung, Cheng-Hung Tsai:
Sensorless vector control of induction motor using artificial neural network. 489-492 - Tsung-Hsin Yu, Chung-Yu Wu, Pei-Yen Chen, Fa-Wen Chi, Jiunn-Jye Luo, Cheng Der Chiang, Ya-Tung Cherng:
A new CMOS readout circuit for uncooled bolometric infrared focal plane arrays. 493-496 - Nicolás J. Medrano-Marqués, Bonifacio Martín-del-Brío:
A general method for sensor linearization based on neural networks. 497-500 - Yi-Cheng Huang
Application of a novel battery charger system to new developed piezoelectric actuator for high speed micropositioning motion. 501-504 - Richard A. Guinee, Colin Lyden:
A novel application of the fast simulated diffusion algorithm for dynamical parameter identification of brushless motor drive systems. 505-508 - Christopher S. Taillefer, Chunyan Wang:
Current mirror compensation for transistor mismatch. 509-512 - Li-Rong Zheng, Bingxin Li, Hannu Tenhunen:
Efficient and accurate modeling of power supply noise on distributed on-chip power networks. 513-516 - Jie Wan, Karen Nan Miu:
Load estimation in radial electric power distribution networks using limited measurements. 517-520 - Spiridon Vlassis, Stylianos Siskos:
Current-mode non-linear building blocks based on floating-gate transistors. 521-524 - Lama H. Chandrasena, Michael J. Liebelt:
Energy minimization in dynamic supply voltage scaling systems using data dependent voltage level selection. 525-528 - Brian Handlon, Steven J. Lorenc, Leonhard Bernold, Gordon Lee:
Tool integrated electromagnetic pulse induction technology to locate buried utilities. 529-532 - Johan van der Tang, Dieter Kasperkovitz:
Oscillator design efficiency: a new figure of merit for oscillator benchmarking. 533-536 - Nihar R. Mahapatra, Sriram V. Garimella, Alwin Takeen:
Efficient techniques based on gate triggering for designing static CMOS ICs with very low glitch power dissipation. 537-540 - Gary B. Levy, Alessandro Piovaccari:
A CMOS low-power, high-speed, asynchronous comparator for synchronous rectification applications. 541-544 - Ka Nang Leung
Analysis on an alternative structure of damping-factor-control frequency compensation. 545-548 - Lihong Jia, Yonghong Gao, Hannu Tenhunen:
New metrics for architectural level power performance evaluation. 549-552 - Tadeusz Lobos, Tomasz Kozina, Zbigniew Leonowicz
High resolution spectrum estimation methods for signal analysis in power electronics and systems. 553-556 - Mladen Vucic, Hrvoje Babic:
Filter families with minimum impulse response moments. 557-560 - Piotr Pawlowski, Andrzej Guzinski:
Comparative investigations of substrate noise caused by voltage-mode and current-mode gates. 561-564 - Yasunori Mitani, Peiyun Miao, Kiichiro Tsuji:
A numerical method to evaluate bifurcation aspects around generator stability limit. 565-568 - Eitake Ibaragi, Akira Hyogo, Keitaro Sekine:
A 1-MHz 7th-order continuous-time lowpass filter using very low distortion CMOS OTAs. 569-572 - Taekyoon Ahn, Kiyoung Choi, Ki-Hyun Kim, Seong-Kwan Hon:
A new cost model for high-level power optimization and its application. 573-576 - Andrea Baschirotto
High-frequency CMOS low-power single-branch continuous-time filters. 577-580 - Sadiq M. Sait, Habib Youssef, Hassan R. Barada, Ahmad A. Al-Yamani:
A parallel tabu search algorithm for VLSI standard-cell placement. 581-584 - Rafael Vargas-Bernal
Identifying translinear loops in the circuit topology. 585-588 - Nikolaos D. Zervas, Dimitrios Soudris
A methodology for the behavioral-level event-driven power management of digital receivers. 589-592 - Alejandro Díaz-Sánchez, Jaime Ramírez-Angulo, Antonio Lopez, Edgar Sánchez-Sinencio:
A fully parallel CMOS analog median filter. 593-596 - Marek Wróblewski, Sven Simon, Josef A. Nossek:
Low power transformation of datapath architectures with cyclic SFGs. 597-600 - Tsung-Sum Lee, Chun-Chieh Liu:
Design techniques for low-voltage VHF BiCMOS transconductance-filters with automatic tuning. 601-604 - Giuseppe Ferri, Pierpaolo de Laurentis:
A low-voltage CMOS phase shifter as a resistive sensor transducer. 605-608 - Emmanuel M. Drakakis, Alison J. Payne:
Approximate process-parameter dependent symbolic calculation of harmonic distortion in log-domain: the lossy integrator case-study. 609-612 - Sherief Reda, Ayman Wahba
M-CHECK: a multiple engine combinational equivalence checker. 613-616 - Robert M. Fox:
Enhancing dynamic range in differential log-domain filters based on the two-filters approach. 617-620 - Jean-Gabriel Cousin, Olivier Sentieys, Daniel Chillet:
Multi-algorithm ASIP synthesis and power estimation for DSP applications. 621-624 - Yuyu Chang, John Choma Jr., Jack Wills:
The design and analysis of a RF CMOS bandpass filter. 625-628 - Massimo Alioto, Gaetano Palumbo:
Evaluation of power consumption in adiabatic circuits. 629-632 - Chung-Yu Wu, Yu Cheng, Jeng Gong:
The new CMOS 2 V low-power IF fully differential Rm-C bandpass amplifier for RF wireless receivers. 633-636 - Daniel S. C. Kwok, Martin Margala:
Optimization techniques for maximum power-efficiency of deep sub-micron CMOS digital circuits. 637-640 - Paolo Bacchetta, Lidia Daldoss, Donatella Sciuto, Cristina Silvano:
Low-power state assignment techniques for finite state machines. 641-644 - Markus Helfenstein, Jari P. Curty, George S. Moschytz:
Switched-current biquad using differential, double-sampling, forward/backward difference integrators. 645-648 - Janusz A. Starzyk, Jing Pang:
Fault diagnosis in analog and mixed mode low testability system. 649-652 - Takao Hinamoto, Takuya Inoue:
Synthesis of continuous-time linear systems with minimum L2 -sensitivity. 653-656 - Ra'a A. Said:
Picoseconds measurement of internal waveforms in integrated circuits using sampling force probing. II. Applications, capabilities, and limitations. 657-660 - Xuguang Zhang, Brent J. Maundy, Ezz I. El-Masry, Ivars G. Finvers:
A novel low-voltage operational transconductance amplifier and its applications. 661-664 - Shih-Chieh Chang, Jiann-Chyi Rau:
A timing-driven pseudo-exhaustive testing of VLSI circuits. 665-668 - Faramarz Bahmani, Seid Mehdi Fakhraie, Ali Khakifirooz:
A rail-to-rail, constant-Gm, 1-volt CMOS opamp. 669-672 - Gian Carlo Cardarilli, Panfilo Marinucci, Adelio Salsano:
Development of an evaluation model for the design of fault-tolerant solid state mass memory. 673-676 - Hanspeter Schmid, George S. Moschytz:
A charge-pump-controlled MOSFET-C single-amplifier biquad. 677-680 - Ra'a A. Said:
Picoseconds measurement of internal waveforms in integrated circuits using sampling force probing. I. Principle and demonstration. 681-684 - Serdar Özoguz, Cevdet Acar, Ali Toker:
Transformation methods for reducing sensitivities of current-mode CCII-based filters. 685-688 - Yiorgos Makris, Jamison Collins, Alex Orailoglu, Praveen Vishakantaiah:
Transparency-based hierarchical test generation for modular RTL designs. 689-692 - Aurencio Sanczczak Farias, Sidnei Noceti Filho, Rui Seara:
Transitional filters based on the classical polynomial approximations. 693-696 - Lih-Yang Wang, Chi-Sung Laih, Hang-Geng Tsai, Nern-Min Huang:
On the hardware design for DES cipher in tamper resistant devices against differential fault analysis. 697-700 - Omid Oliaei:
A design methodology for active-bootstrapped Miller-amplifiers. 701-704 - Ismet Bayraktaroglu, Alex Orailoglu:
Unifying methodologies for high fault coverage concurrent and off-line test of digital filters. 705-708 - Øivind Næss, Yngvar Berg:
Tunable ultralow voltage transconductance amplifier and GmC filter. 709-712 - Hongchin Lin
A simple high-speed low current comparator. 713-716 - Francesco Diotalevi, Maurizio Valle, Gian Marco Bo, Enrico Biglieri, Daniele D. Caviglia:
Analog CMOS current mode neural primitives. 717-720 - Dimitrios Soudris
Low power design of a multi-mode transceiver. 721-724 - Juan I. Osa, Alfonso Carlosena:
MOSFET-C sinusoidal oscillator with variable frequency and amplitude. 725-728 - Marc Borremans, Bram De Muer, Michiel Steyaert:
The optimization of GHz integrated CMOS quadrature VCO's based on a poly-phase filter loaded differential oscillator. 729-732 - Claudio Fiegna:
The effects of scaling on the performance of small-signal MOS amplifiers: a physics-based simulation study. 733-736 - Ayman I. Ahmed, Khalid Sharaf, Hisham S. Haddara, Hani F. Ragai:
CMOS VCO-prescaler cell-based design for RF PLL frequency synthesizers. 737-740 - H. J. Kadim, D. M. Harvey:
Estimation of parameter fluctuations for robust operation in analogue circuits and systems. 741-744 - Anne Van den Bosch, Michiel Steyaert, Willy Sansen:
The extraction of transistor mismatch parameters: the CMOS current-steering D/A converter as a test structure. 745-748 - Vladimir Naumovich Vapnik:
SVM method of estimating density, conditional probability, and conditional density. 749-752 - Nello Cristianini:
Large margin strategies in machine learning. 753-756 - Johan A. K. Suykens, Lukas Lukas, Joos Vandewalle:
Sparse approximation using least squares support vector machines. 757-760 - Yi Yu, Wayne Lawton:
Learning from examples with spatial-adaptive wavelet-based reproducing kernels. 761-764 - Joel Ratsaby, Santosh S. Venkatesh:
On partially blind learning complexity. 765-768
Volume 3
- James C. Morizio
SNDR sensitivity analysis for cascaded ΣΔ modulators. - Wei-Jean Liu, Robin R.-B. Sheen, Jen-Shang Hwang, Oscal T.-C. Chen:
A low-power and high-frequency CMOS transceiver for chip-to-chip interconnection. 1-4 - Jaime Ramírez-Angulo, Ramón G. Carvajal, Juana M. Martínez-Heredia, Antonio Torralba:
Very low-voltage class AB CMOS precision voltage and current rectifiers. 5-8 - Dongwon Seo, Naresh R. Shanbhag, Milton Feng:
Low-power decimation filters for oversampling ADCs via the decorrelating (DECOR) transform. 9-12 - Thomas Olsson, Peter Nilsson, Thomas Meincke, Ahmad Hemami, Mats Torkelson:
A digitally controlled low-power clock multiplier for globally asynchronous locally synchronous designs. 13-16 - Se-Joong Lee, Jinho Han, Seung-Ho Hank, Joe-Ho Lee, Jung-Su Kim, Minkyu Je, Hoi-Jun Yoo:
One chip-low power digital-TCXO with sub-ppm accuracy. 17-20 - Meng Wu, M. Omair Ahmad, M. N. S. Swamy:
A new fractal zerotree coding for wavelet image. 21-24 - Levent Öktem, Rusen Öktem, Karen O. Egiazarian, Jaakko Astola:
Efficient encoding of the significance maps in wavelet based image compression. 25-28 - Subhasis Saha, Rao Vemuri:
Analysis-based adaptive wavelet filter selection in lossy image coding schemes. 29-32 - Chin-Hwa Kuo, Tzu-Chuan Chou, Tay-Shen Wang:
An efficient spatial prediction-based image compression scheme. 33-36 - loannis Andreopoulos, Yorgos A. Karayiannis, Thanos Stouraitis:
A hybrid image compression algorithm based on fractal coding and wavelet transform. 37-40 - Chris Trask:
High dynamic range double-balanced active mixers using lossless feedback. 41-44 - Takeo Yasuda:
High-speed wide-locking range VCO with frequency calibration. 45-48 - Francesco Svelto, Giampiero Montagna, Stefano Deantoni, Giulio Braschi, Rinaldo Castello
Solutions for image rejection CMOS LNA. 49-52 - HongMo Wang:
A solution for minimizing phase noise in low-power resonator-based oscillators. 53-56 - Hui Wu, Ali Hajimiri
A novel tuning technique for distributed voltage controlled oscillators. 57-60 - Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Ming-Hwa Sheu:
An efficient approach for in-place scheduling of path metric update in Viterbi decoders. 61-64 - Shingo Nakaya, Tetsushi Koide, Shin'ichi Wakabayashi:
An adaptive genetic algorithm for VLSI floorplanning based on sequence-pair. 65-68 - Thitipong Tanprasert:
An analytical 3-D placement that reserves routing space. 69-72 - Kuo-Chih Hsu, Yu-Chung Lin, Po-Xun Chiu, Tsai-Ming Hsieh:
Minimum crosstalk channel routing with dogleg. 73-76 - Koji Kiyota, Kunihiro Fujiyoshi:
Simulated annealing search through general structure floorplans using sequence-pair. 77-80 - Håkan Johansson:
New classes of frequency-response masking FIR filters. 81-84 - Min-Chi Kao, Sau-Gee Chen:
A novel iterative design technique for linear-phase FIR half-band filters. 85-88 - Yonghong Gao, Lihong Jia, Hannu Tenhunen:
A fifth-order comb decimation filter for multi-standard transceiver applications. 89-92 - Orlando J. Tobias, Rui Seara, Carlos Aurélio Faria da Rocha:
Analytical model for the mean weights of two adaptive interpolated-FIR filter structures. 93-96 - Luiz W. P. Biscainho, Paulo S. R. Diniz
A model for an ARMA process split in sub-bands. 97-100 - Nabil R. Yousef, Ali H. Sayed:
A new combined architecture for CDMA location searchers and RAKE receivers. 101-104 - Marko Kosunen, Jouko Vankka, Kari Halonen:
A multicarrier QAM modulator for WCDMA basestation. 105-108 - Holger Boche, Martin Schubert:
Space-time Rake receiver with optimal beamforming for the uplink of CDMA-based wireless systems. 109-112 - Riku H. Uusikartano, Jarkko T. Niittylahti:
A compact digital frequency synthesizer for GSM IF up/downconverter. 113-116 - A. S. Madhukumar, Francois P. S. Chin:
Code synchronization and path delay estimation for a CDMA system using long code masking. 117-120 - Eckhard Hennig, Ralf Sommer:
Frequency compensation of closed-loop feedback amplifier systems. 121-124 - Nicolas Kauffmann, Agnieszka Konczykowska:
Interconnect layout macromodelling and simulation in high speed circuits. 125-128 - Nuno Horta
Symbolic techniques applied to switched-current ADCs synthesis. 129-132 - Oscar Guerra, Juan D. Rodríguez-García, Elisenda Roca, Francisco V. Fernández, Ángel Rodríguez-Vázquez:
An error-controlled methodology for approximate hierarchical symbolic analysis. 133-136 - Friedemann Eberhardt, Wilfried Tenten, Peter R. Shepherd:
Parallel symbolic sensitivity analysis of large-scale linear analogue circuits. 137-140 - Marc-André Cantin, Yves Blaquière, Yvon Savaria, Pierre Lavoie, Eric Granger
Analysis of quantization effects in a digital hardware implementation of a fuzzy ART neural network algorithm. 141-144 - Hiroomi Hikawa:
Pulse mode multilayer neural network based on floating point number representation. 145-148 - Sergio L. Netto
On the composite squared-error algorithm for neural networks. 149-152 - Toshiya Nakaguchi, Kenya Jin'no, Mamoru Tanaka:
Hysteresis neural networks for solving traveling salesperson problems. 153-156 - Goce V. Shutinoski, Tomislav A. Dzhekov, Vanco B. Litovski:
Current mode elementary motion perception neural cell. 157-160 - Tertulien Ndjountche, Rolf Unbehauen, Fa-Long Luo:
Dynamic analog resonator-based adaptive filters. 161-164 - Jorge M. Cañive, José Gabriel Rodríguez Carneiro Gomes, Antonio Petraglia:
A CMOS low sensitivity switched-capacitor video filter. 165-168 - Jacqueline S. Pereira, Antonio Petraglia:
Low-sensitivity direct-form IIR SC filters with improved phase linearity. 169-172 - Andrea Baschirotto, Domenico Bijno, Rinaldo Castello
A 1 V 1.2 μW 4th order bandpass switched-opamp SC filter for a cardiac pacer sensing stage. 173-176 - Seng-Pan U, Rui Paulo Martins, José E. Franca:
A linear-phase halfband SC video interpolation filter with coefficient-sharing and spread-reduction. 177-180 - Alex Doboli, Nagu R. Dhanwada, Ranga Vemuri
A heuristic technique for system-level architecture generation from signal-flow graph representations of analog systems. 181-184 - Cheong Ngai, Rui Paulo Martins:
Interactive SC multirate compiler applied to multistage decimator design. 185-188 - Farhad Razaghian, Sirus Sadughi, Kambiz Badie:
An intelligent framework for designing analog circuits based on hybrid reasoning. 189-192 - Xuan Zeng, Mingyuan Li, Wenqing Zhao, Pushan Tang, Dian Zhou:
Parasitic and mismatch modeling for optimal stack generation [in CMOS]. 193-196 - Patrick B. Wu, Robert J. Mack, Robert E. Massara:
A parameterised block-level layout generation system for CMOS analog ICs. 197-200 - Heiko Purnhagen, Nikolaus Meine:
HILN-the MPEG-4 parametric audio coding tools. 201-204 - Martin Dietz, Torsten Mlasko:
Using MPEG-4 audio for DRM digital narrowband broadcasting. 205-208 - Arouggou Jbira, Ahmet M. Kondoz:
Multi-layer scalable LPC audio format. 209-212 - Takehiro Moriya, Takeshi Mori, Naoki Iwakami, Akio Jin:
A design of error robust scalable coder based on MPEG-4/Audio. 213-216 - Christian Landone, Mark B. Sandler:
Applications of binaural processing to surround sound reproduction in large spaces. 217-220 - Anthony C. Davies:
Dynamic properties of a multiway arbiter. 221-224 - Alexander Podgorny, Orla C. Feely:
Global nonlinear dynamics of second-order DPLL. 225-228 - Gianluca Setti, Michele Balestra, Riccardo Rovatti:
Experimental verification of enhanced electromagnetic compatibility in chaotic FM clock signals. 229-232 - Mikhail V. Shashkov:
On complexity of bifurcations for some classes of systems with simple dynamics. 233-234 - Jaber Abu-Qahouq, Huai Wei, Wei Gu, Issa Batarseh:
Analysis and design of soft-switching power factor correction converter. 235-238 - Alberto Reatti, Marian K. Kazimierczuk:
Current controlled current source model for a PWM dc-dc boost converters operated in discontinuous current mode. 239-242 - Xu Huang, Jun Chen, Khai D. T. Ngo:
Graphical DC analysis of three-phase PWM converters using a complex transformation. 243-246 - Spartacus Gomaríz, Francesc Guinjoan, Enric Vidal-Idiarte, Luis Martínez-Salamero, Alberto Poveda:
On the use of the describing function in fuzzy controller design for switching dc-dc regulators. 247-250 - Nicola Femia, Massimo Vitelli, Giovanni Spagnuolo, Domenico Cerbasi:
Analysis of hard synchronous commutations in switching converters. 251-254 - Marco C. Campi, M. Vidyasagar:
Learning with prior information. 255-258 - Partha Niyogi:
Perspectives from the informational complexity of learning. 259-262 - B. Ross Barmish, Houssain Kettani:
Monte Carlo analysis of resistive networks without a priori probability distributions. 263-266 - Sankar Basu, Charles A. Micchelli, Peter Olsen:
Maximum entropy and maximum likelihood criteria for feature selection from multivariate data. 267-270 - Jonathan Baxter, Peter L. Bartlett:
Direct gradient-based reinforcement learning. 271-274 - Srikunth Rao M., Soumitra Kumar Nandy:
Controller redesign based clock and register power minimization. 275-278 - Wen-Tsong Shiue, Chaitali Chakrabarti:
ILP-based scheme for low power scheduling and resource binding. 279-282 - Kevin T. Tang, Eby G. Friedman:
Delay and power expressions characterizing a CMOS inverter driving an RLC load. 283-286 - Mohamed M. Aly, Khaled M. Sharaf, Hani F. Ragai
On the utilization of strength-reduced architectures for adaptive equalizers. 287-290 - Artur Wróblewski, Christian V. Schimpfle, Josef A. Nossek:
Automated transistor sizing algorithm for minimizing spurious switching activities in CMOS circuits. 291-294 - Subhasis Saha, Rao Vemuri:
An analysis on the effect of image activity on lossy coding performance. 295-298 - Marek Domanski, Krzysztof Rakowski:
A simple technique for near-lossless coding of color images. 299-302 - Takayuki Nakachi, Tatsuya Fujii:
Unified lossless and near-lossless color image coding based on adaptive quantization. 303-306 - Sandro Ridella, Stefano Rovetta, Rodolfo Zunino:
Augmenting vector quantization with interval arithmetics for image-coding applications. 307-310 - Jozsef Vass, Xinhua Zhuang:
Joint source-channel coding for highly efficient error resilient image transmission. 311-314 - José Gabriel Rodríguez Carneiro Gomes, Antonio Petraglia:
A switched-capacitor DSB to SSB converter using a recursive Hilbert transformer with sampling rate reduction. 315-318 - R. Timothy Edwards, Kim Strohbehn, Steven E. Jaskulek:
A field-programmable mixed-signal array architecture using antifuse interconnects. 319-322 - Waisiu Law, Martin A. Afromowitz:
Noise-tolerant switched-capacitor time-delay measurement system for micro-fluidic flow sensing. 323-326 - John G. Harris, Shao-Jen Lim:
An analog front-end speech processor using the ratio spectrum. 327-330 - Norm M. Filiol, Tom A. D. Riley, Miles A. Copeland, Calvin Plett:
A receive path ΔΣ frequency to digital converter. 331-334 - Trudi-Heleen Joubert, Evert Seevinck, Monuko du Plessis:
A CMOS reduced-area SRAM cell. 335-338 - Julian A. Bragg, Reid R. Harrison, Paul E. Hasler, Stephen P. DeWeerth:
A floating-gate pFET based CMOS programmable analog memory cell array. 339-342 - Yngvar Berg, Øivind Næss, Mats Høvin:
Ultra low-voltage floating-gate transconductance amplifier with tunable gain and linearity. 343-346 - Yngvar Berg, Øivind Næss, Mats Høvin:
Ultra low-voltage floating-gate transconductance amplifier. 347-350 - Matt Kucic, Ai Chen Low, Paul E. Hasler:
A programmable continuous-time analog Fourier processor based on floating-gate devices. 351-354 - Saed Samadi
Explicit formula for generalized half-band maximally flat diamond-shaped filters. 355-358 - Oscar Gustafsson, Håkan Johansson, Lars Wanhammar:
Design and efficient implementation of high-speed narrow-band recursive digital filters using single filter frequency masking techniques. 359-362 - Sang-Hun Yoon, Jong-Wha Chong:
FIR digital filter implementation using flattened coefficient. 363-366 - Marcos Martínez-Peiró, Lars Wanhammar:
High-speed, low-complexity fir filter using multiplier block reduction and polyphase decomposition. 367-370 - David B. H. Tay:
Families of binary coefficient biorthogonal wavelet filters. 371-374 - Liang Jin, Qin-Ye In, Wenjie Wang:
Time-frequency signal subspace fitting method for direction-of-arrival estimation. 375-378 - Dengwei Fu, Alan N. Willson Jr.:
A fast synchronizer for burst modems with simultaneous symbol timing and carrier phase estimations. 379-382 - Hai-Wei Wang, Che-Ho Wei:
Pilot-symbol assisted channel estimation for coherent DS-CDMA communications. 383-386 - Erich F. Haratsch, Kamran Azadet:
High-speed reduced-state sequence estimation. 387-390 - Hing Cheung So, Yiu Tong Chan:
Two algorithms for frequency estimation of a real sinusoid from short data records. 391-394 - Masayuki Mur Akami:
A routing technique using fuzzy sets theory. 395-398 - En-Cheng Liu, Tu-Hsing Lin, Ting-Chi Wang:
On accelerating slicing floorplan design with boundary constraints. 399-402 - Yehea I. Ismail, Eby G. Friedman:
Sensitivity of interconnect delay to on-chip inductance. 403-406 - Chieh Lin, Domine M. W. Leenaerts:
A new faster sequence pair algorithm [circuit layout]. 407-410 - Marc Lecouve, Pierre Jarry, Eric Kerherve, Nicolas Boutheiller, François Marc:
Genetic algorithm optimisation for evanescent mode waveguide filter design. 411-414 - Mika Laiho
Building blocks for large annealed compact neural networks. 415-418 - Paolo Arena, Marco Branciforte, Giovanni Di Bernardo, Mario Lavorgna, Luigi G. Occhipinti:
Reaction-diffusion CNN chip. I. IC implementation. 419-422 - Alessandro Marongiu, Valerio Cimagalli:
Exact realization of large DT-CNNs on limited-sized CNN circuits. 423-426 - Paolo Arena, Marco Branciforte, Giovanni Di Bernardo, Mario Lavorgna, Luigi G. Occhipinti:
Reaction-diffusion CNN chip. II. Applications. 427-430 - Vincenzo Bonaiuto, Antonio Maffucci, Giovanni Miano, Mario Salerno, F. Sargeni, C. Visone:
Design of a cellular nonlinear network for analogue simulation of reaction-diffusion PDEs. 431-434 - Amir Hadji-Abdoeharnid, David A. Johns:
ADC resolution enhancement by an analog decorrelator. 435-438 - Yefim S. Poberezhskiy, Gennady Y. Poberezhskiy:
Sample-and-hold amplifiers performing internal antialiasing filtering and their applications in digital receivers. 439-442 - Fathi A. Farag
A fully balanced programmable sample-hold amplifier for low-voltage applications. 443-446 - Jan-Erik Eklund, Fredrik Gustafsson:
Digital offset compensation of time-interleaved ADC using random chopper sampling. 447-450 - Young-Deuk Jeon, Seung-Chul Lee, Sang-Min Yoo, Seung-Hoon Lee:
Acquisition-time minimization and merged-capacitor switching techniques for sampling-rate and resolution improvement of CMOS ADCs. 451-454 - Pak K. Chan, Liter Siek
A low-offset class-AB CMOS operational amplifier. 455-458 - Doug Dean, Ramesh Harjani:
A high speed differential to single-ended amplifier for instrumentation applications. 459-462 - Mohamed A. Yakout, AbdelFattah I. Abdelfattah, Ayman S. El-Baz:
BiCMOS current conveyor: design and application. 463-466 - Hyunchol Shin, Dong-Jin Keum, Jin-Sub Choi, Duck-Young Jung, Byeong-Ha Park:
Highly linear variable gain amplifiers with programmable temperature compensation for CDMA wireless applications. 467-470 - Daniel Becvar, Kamil Vrba, Vaclav Zeman, Vladislav Musil:
Novel universal active block: a universal current conveyor. 471-474 - Tetsushi Ueta, Guanrong Chen:
Bifurcation and bursting response in coupled neural oscillators. 475-478 - Junji Kawata, Yoshifumi Nishio, Akio Ushida:
On synchronization phenomena in chaotic systems coupled by transmission line. 479-482 - Igor V. Belykh, Vladimir N. Belykh:
On partial synchronization of continuous and discrete-time coupled dynamical systems. 483-486 - Fumitaka Komatsu, Hiroyuki Torikai, Toshimichi Saito:
A network of relaxation oscillators based on intermittently coupled capacitors. 487-490 - Henri J. C. Huijberts, Henk Nijmeijer, Alexander Yu. Pogromsky:
An observer point of view on synchronization of discrete-time systems. 491-494 - Jun Zhang, Henry S. H. Chung, Wai Lun Lo, S. Y. Ron Hui, A. Wu:
Decoupled optimization technique for design of switching regulators using genetic algorithms. 495-498 - Henry S. H. Chung, Adrian Ioinovici:
Development of a generalized switched-capacitor DC/DC converter with bi-directional power flow. 499-502 - Ichirou Oota, Noriaki Hara, Fumio Ueno:
A general method for deriving output resistances of serial fixed type switched-capacitor power supplies. 503-506 - Jaber Abu-Qahouq, Issa Batarseh:
Generalized analysis of soft-switching DC-DC converters. 507-510 - Guangyong Zhu, Shiguo Luo, Chris Iannello, Issa Batarseh:
Modeling of conduction losses in PWM converters operating in discontinuous conduction mode. 511-514 - Danian Gong, Yun He:
An efficient architecture for real-time content-based arithmetic coding. 515-518 - Vladimir Katkovnik, Karen O. Egiazarian, Jaakko Astola:
Median filter with varying bandwidth adaptive to unknown smoothness of the signal. 519-522 - Subing Zhang, Guoying Lv, Zemin Lin, Zheng Zhou:
A novel VC routing algorithm based on chaotic neural networks in ATM networks. 523-526 - Ebroul Izquierdo, António M. G. Pinheiro, Mohammed Ghanbari:
A robust and efficient scale-space based metric for the evaluation of MPEG-4 VOPs. 527-530 - Afshin David, Tyseer Aboulnasr:
A globally convergent adaptive IIR filter. 531-534 - Guiwei Xing, Jin Li, Shipeng Li
Arbitrarily shaped video object coding by wavelet. 535-538 - Yue-Xian Zou, Shing-Chow Chan, Tung-Sang Ng:
A robust statistics based adaptive lattice-ladder filter in impulsive noise. 539-542 - Hazem M. El-Bakry
Automatic face recognition system using neural networks. 543-546 - Gauthier Lafruit, Lode Nachtergaele, Kristof Denolf, Jan Bormans:
3D computational graceful degradation. 547-550 - James Okello, Shin'ichi Arita, Yoshio Itoh, Yutaka Fukui, Masaki Kobayashi:
An adaptive notch filter for eliminating multiple sinusoids with reduced bias. 551-554 - Hazem M. El-Bakry
Modular neural networks for solving high complexity tasks. 555-558 - Jin-Young Yang, Yongsuk Kim, Sang-Woo Ahn, Min-Sik Park, Chieteuk Ahn, Jong-Won Seok, Young-Kwon Lim, Kyu Won Lee:
A design of a streaming system for interactive television broadcast. 559-562 - Faouzi Alaya Cheikh, Moncef Gabbouj:
Directional-rational approach for color image enhancement. 563-566 - Zygmunt A. Garczarczyk:
Interval neural networks. 567-570 - Kyeongok Kang, Jin-Woo Hong, Jinwoong Kim, Dae Gwon Jeong:
MPEG-4 HVXC encoder realtime implementation on floating point DSP. 571-574 - Roland Lares, Albrecht Rothermel:
Sync signal processing for asynchronously sampled video signals. 575-578 - Sutat Sae-Tang, Chularat Tanprasert:
Feature windowing-based Thai text-dependent speaker identification using MLP with backpropagation algorithm. 579-582 - Marty Alchin:
An active development environment for structured audio performance and composition. 583-585 - Shotaro Nishimura, Mvuma Aloys:
A lattice-based adaptive IIR notch filter and its application to FSK demodulation. 586-589 - Ernesto Chiarantoni, Giuseppe Acciani, Francesco Vacca:
Local competitive signals for an unsupervised competitive neural network. 590-593 - Ulrich Mayer, Jürgen Deicke, Manfred Glesner:
Statistical modelling of the MPEG-4 FlexMux. 594-597 - Márcio H. Costa, José C. M. Bermudez, Neil J. Bershad:
Nonlinear secondary-path effects on the transient behavior of the multiple-error FXLMS algorithm. 598-601 - Andreas Wassatsch, Marc Haase, Dirk Timmermann:
DOLFIN-digit online for integration neural networks. 602-605 - Kumi Jinzenji, Shigeki Okada, Hiroshi Watanabe, Naoki Kobayashi:
Automatic two-layer video object plane generation scheme and its application to MPEG-4 video coding. 606-609 - Hichem Besbes, Mériem Jaïdane
On exact performances of adaptive Volterra filters: the finite alphabet case. 610-613 - Simone G. O. Fiori, Francesco Piazza:
Neural MCA for robust beamforming. 614-617 - Jian-Jun Fang, Kathy Moseler, Sami Levi:
A method to reduce number of division operations for perspective texture warping. 618-621 - Sridhar Gollamudi, Yih-Fang Huang:
Continuous l∞ minimax filtering. 622-625 - Frédéric Bouilhaguet, Jean-Claude Dugourd, Souhila Boughoufalah, Christophe Havet:
Interactive broadcast digital television. The OpenTV platform versus the MPEG-4 standard framework. 626-629 - Giadira Leon, William K. Jenkins:
Adaptive fault tolerant digital filters with single and multiple bit errors in floating-point arithmetic. 630-633 - Ying Tan
Nonlinear blind separation using an RBF network model. 634-637 - Doug Young Suh, Hyun Cheol Kim, Young Kwon Lim, Myoung Ho Lee:
Probabilistic analysis of MPEG-4 error resilience tools in W-CDMA environments. 638-641 - Yoskinobu Kajikawa, Junya Yabuki, Yasuo Nomura:
Stable condition considering modeling error in the filtered-x LMS algorithm. 642-645 - I. C. Çevikhas, Arif Selçuk Ögrenci
VLSI implementation of GRBF (Gaussian radial basis function) networks. 646-649 - Zhongli He, Jaggie Malla, Mike Danielsen, Sami Levi:
Requirements and constraints in MPEG-4 binary shape decoder at main profile. 650-653 - Yuko Nishikawa, Toshihiro Furukawa, Tohru Takahashi:
A consideration on the blind channel estimation based on IIR type model. 654-657 - Jui-Cheng Yen:
A new k-groups neural network. 658-661 - Shih-Ta Hsiang, John W. Woods:
Embedded image coding using zeroblocks of subband/wavelet coefficients and context modeling. 662-665 - Hsiang-Feng Chi:
Efficient computation schemes and bit-serial architectures for normalized LMS adaptive filtering in audio applications. 666-669 - Shuji Yatsuki, Hiromi Miyajima:
Statistical dynamics of associative memory for higher order neural networks. 670-673 - Alexis M. Tourapis, Oscar C. Au, Ming L. Liou, Guobin Shen, Ishfaq Ahmad:
Optimizing the MPEG-4 encoder-advanced diamond zonal search. 674-677 - Krzysztof Wawryn, Andrzej Mazurek:
Current mode circuits for programmable neural networks. 678-681 - Yongsuk Kim, Jin-Young Yang, Min-Sik Park, Sang-Woo Ahn, Chieteuk Ahn:
Interactive broadcast terminal system using MPEG-2 and MPEG-4. 682-685 - Vasile Dragos, Vasile Dan, Radovan Kovacevic:
Prediction of the laser sheet bending using neural network. 686-689 - Eduardo Juárez, Marco Mattavelli, Daniel Mlynek:
A system-on-a-chip for MPEG-4 multimedia stream processing and communication. 690-693 - Daniel A. Blank, Albert Kern, Ruedi Stoop:
Robust encoding by collective bursting in biologically plausible neural networks. 694-697 - Giorgio Zoia, Claudio Alberti:
An efficient block-based interpreter for MPEG-4 structured audio. 698-701 - Mario Salerno, Fausto Sargeni, Vincenzo Bonaiuto, Sergio Taraglio, Andrea Zanela:
A new board for CNN stereo vision algorithm. 702-705 - Vladimir Mesarovic, N. D. Hemkumr, Miroslav Dokic:
MPEG-4 AAC audio decoding on a 24-bit fixed-point dual-DSP architecture. 706-709 - Ari Paasio
A multiplier-free fixed-task digital CNN array for video segmentation system. 710-713 - Ranniery da S. Maia, Fernando Gi V. Resende, Sergio L. Netto
Subband stationarity analysis of speech signals. 714-717 - S. Hossain Hajimowlana, Roberto Muscedere, Graham A. Jullien, James W. Roberts:
Defect detection in web inspection using fuzzy fusion of texture features. 718-721 - Young-Hyun Kwon, Dong-Jo Park, Bin-Chul Ihm:
Simplified pitch detection algorithm of mixed speech signals. 722-725 - Oliverio Arellano-Cárdenas, Herón Molina-Lozano, Jose Antonio Moreno-Cadenas, Felipe Gomez-Castañeda, Luis M. Flores-Nava:
CMOS analog neurofuzzy prototype based on ANFIS. 726-729 - Sassan Ahmadi, Andreas S. Spanias:
Minimum-variance phase prediction and frame interpolation algorithms for low bit rate sinusoidal speech coding. 730-733 - José-Alejandro López Alcantud, Tom Kazmierski:
VHDL-AMS modeling of self-organizing neural systems. 734-737 - Bin-Chul Ihm, Dong-Jo Park, Young-Hyun Kwon:
Blind separation for mixtures of sub-Gaussian and super-Gaussian sources. 738-741 - Anisoara Paraschiv-Ionescu, Christian Jutten, Gérard Bouvier:
Subspace estimation by hierarchical neural PCA: analog/digital implementation constraints. 742-745 - Jeffrey Harrison, Neil Weste:
Analytic limitations on sigma-delta modulator performance. 746-749 - Issac Hsu, Howard C. Luong:
A 70-MHz continuous-time CMOS band-pass ΣΔ modulator for GSM receivers. 750-753 - Adrian L. Leuciuc, Cristian Mitrea:
On the effect of op-amp finite gain in delta-sigma modulators. 754-757 - Martin Vogels, Georges G. E. Gielen
Efficient analysis of the stability of sigma-delta modulators using wavelets. 764- - Ankireddy Nalamalpu, Wayne P. Burleson:
Repeater insertion in deep sub-micron CMOS: ramp-based analytical model and placement sensitivity analysis. 766-769
Volume 4
- Paul R. van der Meer, Arie van Staveren, Arthur H. M. van Roermund:
Ultra-low standby-currents for deep sub-micron VLSI CMOS circuits: smart series switch. 1-4 - Mohamed M. Hafed, Sébastien Laberge, Gordon W. Roberts:
A robust deep submicron programmable DC voltage generator. 5-8 - Xiaomei Liu, Samiha Mourad:
Performance of submicron CMOS devices and gates with substrate biasing. 9-12 - Dinesh Pamunuwa
Combating digital noise in high speed ULSI circuits using binary BCH encoding. 13-16 - Anthony Vetro, Huifang Sun, Yao Wang:
Object-based transcoding for scalable quality of service. 17-20 - Qian Zhang, Ya-Qin Zhang, Wenwu Zhu:
Resource allocation for audio and video streaming over the Internet. 21-24 - Jeongnam Youn, Jun Xin, Ming-Ting Sun:
Fast video transcoding architectures for networked multimedia applications. 25-28 - Weiping Li:
Video coding for Internet and push-pull communication. 29-32 - Shih-Fu Chang, Paul Bocheck:
Principles and applications of content-aware video communication. 33-36 - Dai Won Kim, Taek Won Kwon, Jun Rim Choi, Jun Jin Kong:
A modified two-step SOVA-based turbo decoder with a fixed scaling factor. 37-40 - Hidenori Sato, Hideo Ohira, Masahiko Kazayama, Ayako Harada, Masahiko Yoshimoto, Okikazu Tanno, Satoshi Kumaki, Kazuya Ishibara, Atsuo Hanami, Tetsuya Mutsumura:
MPEG-2 4: 2: 2@HL encoder chip set. 41-44 - Chin-Liang Wang, Jah-Ming Hsu, Ting-Yang Chang:
Adaptive channel estimation using the GOBA algorithm for turbo codes in Rayleigh flat-fading channels. 45-48 - Jui-Cheng Yen, Jiun-In Guo:
A new chaotic key-based design for image encryption and decryption. 49-52 - Ali Mahmudi, Mohammed Benaissa, Peter Sweeney:
The implementation of generalized minimum distance decoding for Reed Solomon codes. 53-56 - George A. Constantinides, Peter Y. K. Cheung, Wayne Luk:
Roundoff-noise shaping in filter design. 57-60 - Chua-Chin Wang, Po-Ming Lee, Chenn-Jung Hunng:
Improved design of C2PL 3-2 compressors with less transistor count. 61-64 - Seung-Moon Yoo, Sung-Mo Kang:
New high performance sub-1 V circuit technique with reduced standby current and robust data holding. 65-68 - Arda Yurdakul:
A synthesis tool for the multiplierless realization of FIR-based multirate DSP systems. 69-72 - Masaaki Ikehara, Masahiro Okuda, Kageyuki Kiyose, Shin-ichi Tikahashi:
Complex approximation for FIR filters with equiripple magnitude and phase response. 73-76 - Magesh Valliappan, Brian L. Evans, Mohamed Gzara, Miroslav D. Lutovac, Dejan V. Tosic:
Joint optimization of multiple behavioral and implementation properties of digital IIR filter designs. 77-80 - Vedat Tavsanoglu:
A note on the square summability of 2-D first-order digital filter transfer functions. 81-84 - Chien Hsun Tseng, Kok Lay Teo, Antonio Cantoni:
Adaptive envelope-constrained filter design. 85-88 - Chen-Cheng Tseng, Su-Ling Lee:
Minimax design of stable IIR digital filter using iterative linear programming method. 89-92 - Jean-Yves Le Boudec, Patrick Thiran:
A short tutorial on network calculus. I. Fundamental bounds in communication networks. 93-96 - Rene L. Cruz, Arvind V. Santhanam:
A composable service model for lossy network elements. 97-100 - Lothar Thiele, Samarjit Chakraborty, Martin Naedele:
Real-time calculus for scheduling hard real-time systems. 101-104 - Anne Van den Bosch, Michiel Steyaert, Willy Sansen:
An accurate statistical yield model for CMOS current-steering D/A converters. 105-108 - Teresa Serrano-Gotarredona, Bernabé Linares-Barranco:
A methodology for MOS transistor mismatch parameter extraction and mismatch simulation. 109-112 - Rafael López-Ahumada, Rafael Rodríguez-Macías:
Fastest: a tool for a complete and efficient statistical evaluation of analog circuits. 113-116 - Tuna B. Tarim, Mohammed Ismail:
Application of a statistical design methodology to low voltage analog MOS integrated circuits. 117-120 - Zaven K. Kalayjian, Andreas G. Andreou:
Mismatch in photodiode and phototransistor arrays. 121-124 - Toshiya Nakaguchi, Yuichi Tanji, Mamoru Tanaka:
Image intensity conversion via cellular neural networks. 125-128 - Radu P. Matei:
Image processing using hysteretic cellular neural networks. 129-132 - Paula López, David López Vilariño, Diego Cabello:
Design of multilayer discrete time cellular neural networks for image processing tasks based on genetic algorithms. 133-136 - Moreno Coli, Paolo Palazzari, Rodolfo Rughi:
The toroidal neural networks. 137-140 - Mauro Di Marco, Alberto Tesi, Mauro Forti:
On robustness of complete stability for a class of cellular neural networks. 141-144 - Takahiro Inoue, Hideo Nakane, Yuuji Fukuju:
A low-voltage fully-differential current-mode analog CMOS integrator using floating-gate MOSFETs. 145-148 - Yue Wu, Mohammed Ismail, Håkan K. Olsson:
A novel CMOS fully differential inductorless RF bandpass filter. 149-152 - Esther O. Rodríguez, Alberto Yufera, Adoración Rueda:
A gm-C floating-gate MOS integrator. 153-156 - David H. Chiang, Rolf Schaumann:
Design of a frequency tuning circuit used in IFLF filters. 157-160 - Nikos Fragoulis, Ioannis Haritantis:
Leapfrog-type filters that retain the topology of the prototype ladder filters. 161-164 - Kiyotaka Yamamura, Shigeru Tanaka:
Finding all solutions of piecewise-linear resistive circuits using the dual simplex method. 165-168 - Janne Roos, Ville Karanko:
Always convergent piecewise-linear DC analysis by an appropriate choice of initial conditions. 169-172 - Hans Georg Brachtendorf, Rainer Laur:
On consistent initial conditions for circuit DAEs with higher index. 173-176 - Jaewook Lee, Hsiao-Dong Chiang:
Convergent regions of Newton homotopy methods for nonlinear systems: theory and computational applications. 177-180 - Leonid B. Goldgeisser, Michael M. Green:
Using continuation methods to improve convergence of circuits with high impedance nodes. 181-184 - Rodrigo L. Oliveira Pinto, Márcio C. Schneider, Carlos Galup-Montoro:
Sizing of MOS transistors for amplifier design. 185-188 - Anand Veeravalli, Edgar Sánchez-Sinencio, José Silva-Martínez:
Different operational transconductance amplifier topologies for obtaining very small transconductances. 189-192 - Meng Tong Tan, Hock-Chuan Chua, Bah-Hwee Gwee, Joseph S. Chang:
An investigation on the parameters affecting total harmonic distortion in class D amplifiers. 193-196 - Joel H. Vuolevi, Timo Rahkonen:
The effects of source impedance on the linearity of BTJ common-emitter amplifiers. 197-200 - Vladimir I. Prodanov:
V-I converters with transconductance proportional to bias current in any technology. 201-204 - Laurent Arditi, Gaël Clavé:
A semi-formal methodology for the functional validation of an industrial DSP system. 205-208 - Shuvra S. Bhattacharyya, Praveen K. Murthy:
The CBP parameter - a useful annotation to aid block-diagram compilers for DSP. 209-212 - Peter Verplaetse, Jan Van Campenhout
On synthetic benchmark generation methods. 213-216 - Chien-Nan Jimmy Liu, Chen-Yi Chang, Jing-Yang Jou, Ming-Chih Lai, Hsing-Ming Juan:
A novel approach for functional coverage measurement in HDL. 217-220 - Marco Re, Marcello Salmeri, Gian Carlo Cardarilli:
A CAD environment for fuzzy systems HW/SW mapping. 221-224 - Takashi Hiyama
Real time modal analysis of power system oscillations. 225-228 - Saffet Ayasun, Chika O. Nwankpa, Harry G. Kwatny:
Enhanced visualization of power system stability limits imposed by singularity induced bifurcations. 229-232 - Yasuharu Ohsawa, Yoshiro Maruoka, Hiromasa Takeno, Hiroaki Sugihara:
Determination of installation location of SMES for power system stabilization. 233-236 - Hiroyuki Mori:
Chaotic behavior of the Newton-Raphson method with the optimal multiplier for ill-conditioned power systems. 237-240 - Mingguo Hong, Chen-Ching Liu:
Complete controllability of power system dynamics. 241-244 - Yngvar Berg, Øivind Næss, Mats Høvin:
Ultralow-voltage floating-gate analog multiplier with tunable linearity. 245-248 - Giuseppe Palmisano, Salvatore Pennisi:
A true low-voltage CMOS class AB current mirror. 249-252 - Bradley A. Minch:
A folded floating-gate differential pair for low-voltage applications. 253-256 - Ali Zeki, Hakan Kuntman:
High-linearity low-voltage self-cascode class AB CMOS current output stage. 257-260 - Yueming Jiang, Edward K. F. Lee:
A 1.2 V bandgap reference based on transimpedance amplifier. 261-264 - Frédéric Devisch, Johan Stiens, Roger Vounckx, Maarten Kuijk:
A power reduction method for off-chip interconnects. 265-268 - Kevin T. Tang, Eby G. Friedman:
Transient analysis of a CMOS inverter driving resistive interconnect. 269-272 - Naresh R. Shanbhag, Lei Wang:
Energy-efficiency bounds for noise-tolerant dynamic circuits. 273-276 - Radu M. Secareanu, Scott Warner, Scott Seabridge, Cathie Burke, Thomas E. Watrobski, Christopher Morton, William Staub, Thomas Tellier, Eby G. Friedman:
Physical design to improve the noise immunity of digital circuits in a mixed-signal smart-power system. 277-280 - Chua-Chin Wang, Yu-Tsun Chien, Ying-Pei Chen:
Design of an inter-plane circuit for clocked PLAs. 281-284 - Haitao Zheng, K. J. Ray Liu:
Space-time diversity for multimedia delivery over wireless channels. 285-288 - Chung-Sheng Li, John R. Smith, Rakesh Mohan, Yuan-Chi Chang, Brad Topol, John Hind, Yongcheng Li:
Distributed application service for Internet information portal. 289-292 - Deepak S. Turaga, Tsuhan Chen:
Modeling of dynamic video traffic. 293-296 - Chin-Hwa Kuo, Tay-Shen Wang:
Design of networked visual monitoring systems. 297-300 - Anastasios D. Doulamis, Nikolaos D. Doulamis, Stefanos D. Kollias:
Efficient video summarization based on a fuzzy video content representation. 301-304 - Luigi Raffo
Block-matching evaluation in digital architectures for motion estimation. 305-308 - Sung-Chul Shin, Hyunki Baik, Myong-Soon Park, Dong Sam Ha:
A center-biased hybrid search method using plus search pattern for block motion estimation. 309-312 - Friederich Mombers, Stephanie Dogimont:
A limited hardware resources efficient motion estimation algorithm. 313-316 - Justy W. C. Wong, Oscar C. Au, Peter H. W. Wong:
Novel fast motion estimation for frame rate/structure conversion. 317-320 - Fulvio Moschetti, Eric Debes:
A fast block matching for SIMD processors using subsampling. 321-324 - Viktor Gruev, Ralph Etienne-Cummings:
A programmable spatiotemporal image processor chip. 325-328 - Philippe O. Pouliquen, Andreas G. Andreou, Gert Cauwenberghs
A CMOS smart focal plane for infra-red imagers. 329-332 - Chunyan Wang, Francis Devos:
An adaptive optical sensor. 333-336 - Tetsuya Kajita, Un-Ku Moon, Gabor C. Temes:
A noise-shaping accelerometer interface circuit for two-chip implementation. 337-340 - Jeffrey A. Dickson, Rodney M. Goodman:
Integrated chemical sensors based on carbon black and polymer films using a standard CMOS process and post-processing. 341-344 - Kensaku Fujii, Mitsuji Muneyasu
Method to update the feedback control filter coefficients under active noise control. 345-348 - Yoshinobu Kajikawa, Yasuo Nomura:
Active noise control system without secondary path model. 349-352 - Masaichi Akiho, Masakatsu Tamura, Miki Haseyama, Hideo Kitajima:
Performance improvements on MEFX-LMS based noise cancellation system in vehicle cabin. 353-356 - Corneliu Rusu, C. F. N. Cowan:
Convergence and steady-state analysis of the cost function adaptation algorithms for data echo cancellation. 357-360 - Isao Nakanishi, Yoshio Itoh, Yutaka Fukui:
Accelerated frequency domain adaptive filter using modified DFT pair and its application to noise canceling. 361-364 - Jean-Yves Le Boudec, Patrick Thiran, Silvia Giordano:
A short tutorial on network calculus. II. Min-plus system theory applied to communication networks. 365-368 - R. Agrawal, François Baccelli:
Dominating tails in a tandem of queues with long range dependent arrival and service processes. 369-372 - H. Holler:
Measurement and mismatch-modelling of semiconductor devices in BiCMOS technology. 373-376 - Jürgen Oehm
A physical approach to mismatch modelling and parameter correlations. 377-380 - Teresa Serrano-Gotarredona, Bernabé Linares-Barranco:
A new strong inversion 5-parameter transistor mismatch model. 381-384 - Bradley A. Minch:
Floating-gate techniques for assessing mismatch. 385-388 - Wesley P. Millard, Zaven K. Kalayjian, Andreas G. Andreou:
Calibration and matching of floating gate devices. 389-392 - Tobi Delbrück
Silicon retina for autofocus. 393-396 - Rahul Sarpeshkar, R. Herrera, H. Yang:
A current-mode spike-based overrange-subrange analog-to-digital converter. 397-400 - Tor Sverre Lande, Jan-Tore Marienborg, Yngvar Berg:
Neuromorphic cochlea implants. 401-404 - Simon J. Thorpe
Reverse engineering of the visual system using networks of spiking neurons. 405-408 - Mourad Loulou, Dominique Dallet, Philippe Marchegay:
A 3.3 V switched-current second order sigma-delta modulator for audio applications. 409-412 - Theodore Georgantas, Stamatis Bouras, Yannis Panananos, Dimitris Dervenis:
Switched-current ΣΔ modulator for baseband channel applications. 413-416 - Rocío del Río, Fernando Medeiro, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez:
Reliable analysis of settling errors in SC integrators-application to the design of high-speed ΣΔ modulators. 417-420 - Un-Ku Moon, José Silva, Jesper Steensgaard, Gabor C. Temes:
A switched-capacitor DAC with analog mismatch correction. 421-424 - Omid Oliaei:
Thermal noise analysis of multi-input SC-integrators for delta-sigma modulator design. 425-428 - Michael Peter Kennedy:
Determination of main system parameters of FM-DCSK telecommunications system. 429-432 - Géza Kolumbán, Gábor Kis:
Multipath performance of FM-DCSK chaotic communications system. 433-436 - Zoltán Jakó, Gábor Kis:
On the effectiveness of noise reduction methods in DCSK systems. 437-440 - Yuri V. Andreyev, Alexander S. Dmitriev, Elena V. Efremova:
Multiplexing chaotic signals in the presence of noise. 441-444 - Sergio Callegari
A BICMOS PDF notch circuit for FM-DCSK communication over selective channels. 445-448 - António J. Gano
New multiple input fully differential variable gain CMOS instrumentation amplifier. 449-452 - Sohrab Emami, Kazuyuki Wada, Shigetaka Tagaki, Nobuo Fujii:
A novel class A CMOS current conveyor. 453-456 - Andrea Baschirotto, Giovanni Frattini:
A 3.3 V CMOS line-driver for serial bus. 457-460 - Michael M. Green, Sridevi R. Joshi:
A 1.5 V CMOS VGA based on pseudo-differential structures. 461-464 - Fernando Muñoz, Antonio Torralba, Ramón G. Carvajal, Jon N. Tombs, Jaime Ramírez-Angulo:
Floating-gate based tunable CMOS low-voltage linear transconductor and its application to HF gm-C filter design. 465-468 - Chris van den Bos, Michiel H. L. Kouwenhoven, Wouter A. Serdijn:
Effect of smooth non-linear distortion on OFDM BER. 469-472 - Tony T. S. Ng, Kun-Wah Yip, Chin-Long Cheng:
Recursive all-lag reference-code correlator and its efficient implementation. 473-476 - Orla C. Feely:
Nonlinear dynamics of first-order DPLL with FM input. 477-480 - Riccardo Rovatti, Gianluca Mazzini, Gianluca Setti:
Non-average performance of chaos-based DS-CDMA: a tensor approach to analytical any-order correlation of spreading sequences. 481-484 - Chung M. Yuen, Kim Fung Tsang, Wai Hung Chan:
Direct memory access frequency synthesizer for channel efficiency improvement in frequency hopping communication. 485-488 - Heinz Mathis, Marcel Joho, George S. Moschytz:
A simple threshold nonlinearity for blind separation of sub-Gaussian signals. 489-492 - Arthur T. G. Fuller, Behrouz Nowrouzian:
Stability and transient behavior of Bode-type variable-amplitude digital equalizers with dynamic variable multiplier variations. 493-496 - Wei Xing Zheng:
A fast convergent algorithm for identification of noisy autoregressive signals. 497-500 - Hing Cheung So:
Adaptive time delay estimation for sinusoidal signal. 501-504 - Wei Xing Zheng:
Improved parameter estimation of linear systems with noisy data. 505-508 - Dai I. Kim, Philippe De Wilde:
Fast tracking conjugate gradient algorithm. 509-512 - Jarmo Takala, David Akopian, Jaakko T. Astola, Jukka P. Saarinen:
Scalable interconnection networks for partial column array processor architectures. 513-516 - Murat Mese, Palghat P. Vaidyanathan:
Look up table (LUT) inverse halftoning. 517-520 - Elio D. Di Claudio, Raffaele Parisi, Gianni Orlandi:
Discriminative learning strategy for efficient neural decision feedback equalizers. 521-524 - Jaewook Lee, Hsiao-Dong Chiang:
Constructive homotopy methods for finding all or multiple DC operating points of nonlinear circuits and systems. 525-528 - Cheng-Shing Wu, An-Yeu Wu:
Modified vector rotational CORDIC (MVR-CORDIC) algorithm and its application to FFT. 529-532 - Kunihiko Asakura, Masakuyo Suzuki, Hirofumi Sanada, Nobuo Nagai:
Regularity in difference in transmission characteristics for Gaussian superlattices and periodic superlattices. 533-536 - Joung-Youn Kim, Lee-Sup Kim, Seung-Ho Hwang:
An advanced contrast enhancement using partially overlapped sub-block histogram equalization. 537-540 - Antonio Buonomo, Alessandro Lo Schiavo:
Applying the trigonometric collocation method to nonlinear circuits. 541-544 - Ehab Elsehely, Mohamed I. Sobhy:
Real time radar target detection under jamming conditions using wavelet transform on FPGA device. 545-548 - Huseyin M. Ozkaramanli:
Transverse distributed coupling between specifically terminated low loss VLSI interconnections. 549-552 - Makoto Matsuyama, Yuichi Tanji, Mamoru Tanaka:
Enhancing the ability of NAS-RIF algorithm for blind image deconvolution. 553-556 - Nikolaos V. Boulgouris, Athanasios Leontaris, Michael G. Strintzis:
Wavelet compression of 3D medical images using conditional arithmetic coding. 557-560 - Mohamed Lamine Tounsi, Brahim Haraoubia:
Millimeter-wave analysis of directional couplers. 561-564 - David Z. Gevorkian, Karen O. Egiazarian, Jaakko Astola:
Modified K-nearest neighbour filters for simple implementation. 568-565 - Hirofumi Sanada, Masakuyo Suzuki, Yoji Tsukui, Nobuo Nagai:
The equivalent transmission-line approach to resonant tunneling problems described by the Kane model. 569-572 - Bogdan J. Falkowski, Lip-San Lim:
Image watermarking using the complex Hadamard transform. 573-576 - Liang Jin, Qin-Ye Yin, Min-Li Yao:
Estimating spatial spectrum with generalized spectral-correlation signal subspace fitting. 577-580 - Lubomír Brancík:
An improvement of FFT-based numerical inversion of two-dimensional Laplace transforms by means of ϵ-algorithm. 581-584 - Trinidad Sansaloni, Javier Valls, Keshab K. Parhi
FPGA-based digit-serial complex number multiplier-accumulator. 585-588 - Sungkil Hwang, Gyu Moon:
A ultra high speed clock distribution technique using a cellular oscillator network. 589-592 - Miki Haseyama, Megumi Takezawa, Hiroyuki Honda, Hideo Kitajima:
An IFS-based image restoration method for impulsive noise contamination. 593-596 - David W. Lin:
On optimal bit loading for multitone ADSL. 597-600 - Daisuke Takafuji, Satoshi Taoka, Toshimasa Watanabe:
k-edge-connectivity augmentation problem with upper bounds on edge multiplicity. 601-604 - Carlos E. Cabrera Reyes, Javier D. Bruguera:
VLSI systolic array architecture for the lattice structure of the discrete wavelet transform. 605-608 - Bai-Jue Shieh, Terng-Yin Hsu, Chen-Yi Lee:
A new approach of group-based VLC codec system. 609-612 - Wenjie Wang, Bofeng Jiang, Qinye Yin:
A beam tracking algorithm for space-time Rake receiver with a new beamformer. 613-616 - Lubomir V. Kolev, Dimitar Penev:
An interval method for global inequality-constraint optimization problems. 617-620 - Jen-Chuan Chih, Sau-Gee Chen:
A fast CORDIC algorithm based on a novel angle recoding scheme. 621-624 - Heeburm Ryu, Yoshikazu Miyanaga
Self-organized edge detection for an image compression. 625-628 - Jason Gao, Yee-Hong Leung, Antonio Cantoni:
Minimum mean square error receive filters for carrierless amplitude and phase modulation. 629-632 - Guo-Hui Lin, Guoliang Xue:
Optimal layout of hexagonal minimum spanning trees in linear time [VLSI]. 633-636 - Liang Tao, Hon Keung Kwan
Real discrete Gabor expansion for finite and infinite sequences. 637-640 - Michael C. Doggett:
A ray queueing and sorting design for real time ray casting. 641-644 - Maxime Scarpa, Julia Vogel, John T. Stonick, Sayfe Kiaei:
Performance of differentially detected π/4 DQPSK in the presence of IQ phase imbalance. 645-648 - Blazej Sawionek, Jacek Wojciechowski, Jaroslaw Arabas
Synthesis of reliable networks in the presence of line failures. 649-652 - Masoud Bahrami, Babak Sadeghiyan:
Efficient module 2n+1 multiplication schemes for IDEA. 653-656 - Bor-Sung Liang, Wen-Chang Yeh, Yuan-Chung Lee, Chein-Wei Jen:
Deferred lighting: a computation-efficient approach for real-time 3-D graphics. 657-660 - Shahriar Mirabbasi, Saeed Gazor
A wideband carrier-recovery system for multilevel QAM signals. 661-664 - Wellington S. Mota, Fernando L. Alvarado:
Power markets stability considering energy imbalance. 665-668 - Mohammed A. Hasan, Ali A. Hasan:
MUSIC and pencil-based sinusoidal estimation methods using fourth order cumulants. 669-672 - Nam Ik Cho, Bong Gyun Roh, Sang Uk Lee:
Reduction of blocking artifacts by a modeled lowpass filter output. 673-676 - Mikael Karlsson Rudberg:
ADC offset identification and correction in DMT modems. 677-680 - Eduardo J. Peralías, Antonio J. Acosta, Adoración Rueda, José L. Huertas:
VHDL-based behavioural description of pipeline ADCs. 681-684 - Ilhan Hatirnaz, Frank K. Gürkaynak, Yusuf Leblebici:
A compact modular architecture for the realization of high-speed binary sorting engines based on rank ordering. 685-688 - Jamal K. Abbas
Median-based filters with prediction error processing for video restoration. 689-692 - Jie Zhu, Xi-Ren Cao, Zhi Ding:
An algebraic principle in blind separation of single source signal. 693-696 - Adrian Maxim, Danielle Andreu:
A unified high accuracy behavioral SPICE macromodel of operational amplifiers featuring the frequency, temperature and power supply influences and the Monte Carlo simulation. 697-700 - Chad W. Dreveny, Leonard T. Bruton:
Least-squares trilinear interpolation for digital video coding. 701-704 - Pedro Julián, Belén D'Amico, Alfredo C. Desages:
A model reduction procedure for high level canonical PWL functions. 705-708 - Warnakulasuriya A. C. Fernando, Cedric Nishan Canagarajah, David R. Bull:
Fade-in and fade-out detection in video sequences using histograms. 709-712 - Marcelino Lázaro, Ignacio Santamaría, Carlos Pantaleón:
A smooth and derivable large-signal model for microwave HEMT transistors. 713-716 - Chang-Su Kim, Sang-Uk Lee:
Multiple description motion coding algorithm for robust video transmission. 717-720 - Pasin Israsena, Steve Summerfield:
Novel pattern-based power estimation tool with accurate glitch modeling. 721-724 - Chia-Huang Lin, Kuei-Ann Wen:
Spatial/temporal decimation on 3DPAC for very low bit rate video transmission. 725-728 - Jing-Jou Tang, Ping-Tsung Wang:
A efficient placement and global routing algorithm for hierarchical FPGAs. 729-732 - Mohammed Ebrahim Al-Mualla
Simplex minimisation for multiple-reference motion estimation. 733-736 - Rolf Drechsler, Wolfgang Günther:
Optimization of sequential verification by history-based dynamic minimization of BDDs. 737-740 - Kuo-Hsing Cheng, Chih-Sheng Huang, Chun-Pin Lin:
The design and implementation of DCT/IDCT chip with novel architecture. 741-744 - Simone Chiucchi, Francesco Piazza:
A virtual stereo approach to stereophonic acoustic echo cancellation. 745-748 - Derek H. S. Tam, Wai Tung Ng:
A novel mixed-mode adaptive equalization system for high-speed 2-level PAM signals. 749-752 - Marko Neitola, Timo Rahkonen:
An analog correlator for a WCDMA receiver. 753-756 - Shengting Huang, John T. Stonick:
Effect of DC offset on performance of differentially detected π/4 DQPSK. 757-760 - Kai He, Gert Cauwenberghs
Integrated 64-state parallel analog Viterbi decoder. 761-764 - Hong-Sing Kao, Chung-Yu Wu:
A compact CMOS 2 V low-power direct-conversion quadrature modulator merged with quadrature voltage-controlled oscillator and RF amplifier for 1.9 GHz RF transmitter applications. 765-768
Volume 5
- Massimo Alioto, Gaetano Palumbo:
High-speed bipolar MUX modeling and design. 1-4 - Antonio J. López-Martín, Alfonso Carlosena:
A 3.3 V tunable current-mode square-root domain biquad. 5-8 - Youngjoong Joo, Martin A. Brooke
Compact current input oversampling modulator design for a scalable high frame rate focal plane arrays. 9-12 - Ramón G. Carvajal, Jaime Ramírez-Angulo, Jonathan Noel Tombs:
High-speed high-precision voltage-mode MIN/MAX circuits in CMOS technology. 13-16 - Jung Hyun Choi, Sergio Bampi
TAT transistors on SOT array for mixed analog/digital applications. 17-20 - Roy Wang, Hong-Jiang Zhang, Ya-Qin Zhang:
A confidence measure based moving object extraction system built for compressed domain. 21-24 - Jar-Ferr Yang, Shu-Sheng Hao, Pau-Choo Chung, Chieh-Ling Huang:
Color object segmentation with eigen-based fuzzy C-means. 25-28 - Ioannis Kompatsiaris, George Mantzaras, Michael G. Strintzis:
Spatiotemporal segmentation and tracking of objects in color image sequences. 29-32 - Hisham Othman, Tyseer Aboulnasr:
Low complexity 2-D Hidden Markov Model for face recognition. 33-36 - George C. Lai, Rui J. P. de Figueiredo:
A novel algorithm for edge detection from direction-derived statistics. 37-40 - Tomaz Sef:
Slovenian text-to-speech system. 41-44 - Feng Zhang, Yan Qiu Chen, Guoan Bi:
Adaptive Harmonic Fractional Fourier Transform. 45-48 - Ravi Prakash Ramachandran, Kevin R. Farrell:
Fast pole filtering for speaker recognition. 49-52 - Kwang-Sik Moon, Yu-Jin Kim, Hoi-Rin Kim, Jae-Ho Chung:
Out-of-vocabulary word rejection algorithm in Korean variable vocabulary word recognition. 53-56 - Susanna Varho, Paavo Alku:
A linear predictive method for highly compressed presentation of speech spectra. 57-60 - Ming-Dou Ker, Tung-Yang Chen, Chung-Yu Wu, Hun-Hsien Chang:
Design and analysis of the on-chip ESD protection circuit with a constant input capacitance for high-precision analog applications. 61-64 - Louis Luh, John Choma Jr., Jeffrey Draper:
A Zener-diode-activated ESD protection circuit for sub-micron CMOS processes. 65-68 - Ming-Dou Ker, Wen-Yu Lo, Hun-Hsien Chang:
Mew diode string design with very low leakage current for using in power supply ESD clamp circuits. 69-72 - Edgar F. M. Albuquerque
A comparative study of low-noise logic cells for mixed mode integrated circuits. 73-76 - Liang Dai, Ramesh Harjani:
Comparison and analysis of phase noise in ring oscillators. 77-80 - Bruno Cernuschi-Frías, Sergio E. Lew, Hernán J. González, Jonás D. Pfefferman:
A parallel algorithm for the diagonalization of symmetric matrices. 81-84 - Hamid R. Sefiri, Majid A. Ahmadi:
Mathematical formulation of general M-D filtering by using a single building block and its novel word-parallel realization. 85-88 - Kaisa Haapala, Pasi Kolinummi, Timo D. Hämäläinen, Jukka Saarinen:
Parallel DSP implementation of wavelet transform in image compression. 89-92 - Christian Drewes
Parallel architectures for decision-directed RLS-equalization. 93-96 - Charles B. do Prado, Paulo S. R. Diniz
Implementation of overlapped block filtering using scheduling by edge reversal. 97-100 - Kenneth A. Parulski, Majid Rabbani:
The continuing evolution of digital cameras and digital photography systems. 101-104 - Patrick Emmel, Roger D. Hersch:
Colour calibration for colour reproduction. 105-108 - Raimondo Schettini, Gianluigi Ciocca, Isabella Gagliardi:
Interactive visual information retrieval. 109-112 - Franziska S. Frey, Sabine Süsstrunk:
Digital photography-How long will it last? 113-116 - Akio Hasegawa, Tetsuro Endo:
Averaging method via all numerical computation applied to weakly-nonlinear coupled oscillator systems. 117-120 - Florin Constantinescu, Miruna Nitescu:
Two-rate computation of the periodic steady-state in RF-IC circuits. 121-124 - Vello Kukk:
Large time-step integration method for modeling of oscillating circuits. 125-128 - Albert Kern, Daniel A. Blank, Ruedi Stoop:
Projective noise reduction with dynamic neighborhood selection. 129-132 - Kirill R. Chernyshov
Strongly consistent recursive regression estimation under depended observations. 133-136 - Federico Bizzarri, Marco Storace, Mauro Parodi:
Boundary cells in cellular circuits for the minimisation of continuous functionals. 137-140 - Paolo Arena, Luigi Fortuna, Alessandro Rizzo, Maria Gabriella Xibilia:
Extending the CNN paradigm to approximate chaotic systems with multivariable nonlinearities. 141-144 - Pamela Abshire, Andreas G. Andrew:
A comparative study of information capacity for biophysical and silicon photoreceptors. 145-148 - Masaya Ohta:
An algorithm for multi-layer channel routing problem using chaotic neural networks. 149-152 - Marc Cohen, Gert Cauwenberghs
Focal-plane on-line nonuniformity correction using floating-gate adaptation. 153-156 - Brent J. Maundy, Ivars G. Finvers, Peter B. Aronhime:
Cross coupled transconductance cell with improved linearity range. 157-160 - Jaime Ramírez-Angulo, Ramón G. Carvajal, Antonio Torralba, Juana M. Martínez-Heredia:
A 1.5 V linear transconductor with wide bandwidth and wide input and output signal swings. 161-164 - Jean-Charles Voghell, Mohamad Sawan:
Current tuneable CMOS transconductor for filtering applications. 165-168 - Gianluca Giustolisi, Giuseppe Palmisano, Salvatore Pennisi:
High-linear class AB transconductor for high-frequency applications. 169-172 - Fernando Muñoz, Antonio Torralba, Ramón G. Carvajal, Jaime Ramírez-Angulo:
Two new VHF tunable CMOS low-voltage linear transconductors and their application to HF GM-C filter design. 173-176 - Ralph Etienne-Cummings:
Single-capacitor-single-contact active pixel sensor. 177-180 - Sazzadur Chowdhury, Graham A. Jullien, Majid Ahmadi, William C. Miller:
A MEMS micromagnetic actuator for use in a bionic interface. 181-184 - Mehmet Ozgur, Mona E. Zaghloul, Michael Gaitan:
Optimization of backside micromachined CMOS inductors for RF applications. 185-188 - Geoffrey L. Barrows, Brian Krantz:
Integrated RF sensors for electronic warfare applications. 189-192 - Aristides Kyranas, Yannis Papananos:
A 5 GHz fully integrated VCO in a SiGe bipolar technology. 193-196 - Igor M. Filanovsky:
Voltage reference using mutual compensation of mobility and threshold voltage temperature effects. 197-200 - Mrinal Das, Jim Hellums:
Improved design criteria of gain-boosted CMOS OTA with high speed optimizations. 201-204 - Ning Guo, Rabin Raut:
Optimizing bandwidth power efficiency of a CMOS transconductor. 205-208 - Ugur Çilingiroglu
An accurate self-bias threshold voltage extractor using differential difference feedback amplifier. 209-212 - Kyoichi Takenaka, Kazuyuki Wada, Shigetaka Takagi, Nobuo Fujii:
Power saving technique for MOS differential amplifiers. 213-216 - Ahmed S. Elwakil
A system for chaos generation and its implementation in monolithic form. 217-220 - Tohru Kohda, Hiroshi Fujisaki:
The Jacobian elliptic Chebyshev rational maps can generate sequences of i.i.d. random variables. 221-224 - Tohru Kohda, Hiroshi Fujisaki, Shigeru Ideue:
On distributions of correlation values of spreading sequences based on Markov information sources. 225-228 - Marco Götz, Wolfgang Schwarz:
Statistical analysis of chaotic Markov systems with quantised output. 229-232 - Riccardo Caponetto, Luigi Fortuna, Mario Lavorgna, Domenico Porto:
Design of a chaotic generator using two CNN cells having non-integer order. 233-236 - Jang-Chyuan Jenq, Shih-Fu Hsieh:
A double-talk resistant echo cancellation based on iterative maximal-length correlation. 237-240 - Anders Berkeman, Viktor Öwall:
Co-optimization of FFT and FIR in a delayless acoustic echo canceller implementation. 241-244 - Neeraj Magotra, Juan G. Vargas-Rubio:
Comparison of two open-loop adaptive speech enhancement algorithms for digital hearing aids. 245-248 - Masanori Tsujikawa, Takanori Shiozaki, Yoshinobu Kajikawa, Yasuo Nomura:
Identification and elimination of second-order nonlinear distortion of loudspeaker systems using Volterra filter. 249-252 - Choon-Sik Park, Mineo Kaneko:
An efficient scheme based on EMPDC graph model in synthesizing fault tolerant FIR filter. 253-256 - Angus McLaren, Kenneth W. Martin:
Generation of accurate on-chip time-constants using a monolithic CMOS PLL with hybrid analog and digital control. 257-260 - Kiyoshi Ishii, Keiji Kishine, Haruhiko Ichino:
A jitter suppression technique for a 2.48832 Gb/s clock and data recovery circuit. 261-264 - Sung-Sik Hwang, Ki-Mo Joo, Ho-Jin Park, Jae-Whui Kim, Philip Chung:
A DLL based 10-320 MHz clock synchronizer. 265-268 - Bela A. Frigyik, Géza Kolumbán:
Phenomenological model of false lock in the sampling phase-locked loop. 269-272 - Géza Kolumbán, Bela A. Frigyik, Michael Peter Kennedy:
Frequency domain analysis of double sampling phase-locked loop. 273-276 - Jader A. De Lima, Sidnei F. Silva, Adriano S. Cordeiro, Alexandro C. Araujo, Michel Verleysen:
A low-power silicon-on-insulator PWM discriminator for biomedical applications. 277-280 - Konstantinos Papathanasiou, Torsten Lehmann:
An implantable CMOS signal conditioning system for recording nerve signals with cuff electrodes. 281-284 - André Boyoguéno, Bozena Kaminska, Mustapha Slamani:
A preamplifier IC design for photonic links. 285-288 - Fabrice Paillet, Damien Mercier, Thierry M. Bernard:
Efficient data output from the inner of large size cellular array. 289-292 - Amine Bermak
A high fill-factor native logarithmic pixel: Simulation, design and layout optimization. 293-296 - Anastasios L. Kesidis, Nikolaos Papamarkos:
A gray-scale Inverse Hough Transform algorithm. 297-300 - Nikolaos Papamarkos, Charalambos Strouthopoulos:
Multithresholding of mixed-type documents. 301-304 - Vinayadatt V. Kohir, Uday B. Desai:
Face recognition. 305-308 - John Gates, Miki Haseyama, Hideo Kitajima:
Real-time polygon extraction from complex images. 309-312 - Yoshitaka Matsuda, Yasuaki Sumi, Dai Kataoka, Makoto Ota, Noboru Yabuki, Yutaka Fukui, Shigehiko Miki:
Proposal for a convergence criterion to the active net in two steps. 313-316 - A. Benjamin Premkumar, Manish Bhardwaj:
Combinatorial logic based forward converters in residue number systems. 317-320 - Javier Ramírez Perez de Inestrosa, Antonio García, Pedro G. Fernández, Luis Parrilla, Antonio Lloris-Ruíz:
A new architecture to compute the discrete cosine transform using the quadratic residue number system. 321-324 - Yannick Dumonteix, Habib Mehrez:
A family of redundant multipliers dedicated to fast computation for signal processing. 325-328 - William G. Natter, Behrouz Nowrouzian:
A novel algorithm for signed-digit online multiply-accumulate operation and its purely signed-binary hardware implementation. 329-332 - Itamar Elhanany, Ortal Arazi:
Redundant linear coding for accelerating counting and comparison operations. 333-336 - Francescomaria Marino, David Z. Gevorkian, Jaakko T. Astola:
High-speed/low-power 1-D DWT architectures with high efficiency. 337-340 - Eugene Grayver, Babak Daneshrad:
Low power, area efficient programmable filter and variable rate decimator. 341-344 - Alexander Goldovsky, Bimal Patel, Michael Schulte, Ravi K. Kolagotla, Hosahalli Srinivas, Geoffrey Burns:
Design and implementation of a 16 by 16 low-power two's complement multiplier. 345-348 - Ahmet Teyfik Erdogan
A hybrid segmentation and block processing algorithm for low power implementation of digital filters. 349-352 - Marco Re, Gian Carlo Cardarilli, Andrea Del Re, Roberto Lojacono:
FPGA implementation of a demux based on a multirate filter bank. 353-356 - Jye-Jong Leu, An-Yeu Wu:
Design methodology for Booth-encoded Montgomery module design for RSA cryptosystem. 357-360 - Tin-Yau Tang, Chiu-sing Choy, Jan Butas, Cheong-Fat Chan:
An ALU design using a novel asynchronous pipeline architecture. 361-364 - James Okello, Shin'ichi Arita, Yoshio Itoh, Yutaka Fukui, Masaki Kobayashi:
A new architecture for implementing pipelined ADF. 365-368 - Shin'ichi Shiraishi, Miki Haseyama, Hideo Kitajima:
A highly accurate pipelined architecture for a CORDIC ARMA lattice filter. 369-372 - Asad Azam, Dhinesh Sasidaran, Karl E. Nelson, Gary E. Ford, Louis G. Johnson, Michael A. Soderstrand:
Efficient pipelined tunable heterodyne notch filter implementation in FPGAs. 373-376 - Carlos Dualibe, Paul G. A. Jespers, Michel Verleysen:
A 5.26 Mflips programmable analogue fuzzy logic controller in a standard CMOS 2.4 μ technology. 377-380 - Jaime Ramírez-Angulo, Seung-Gul Choi, Djuro G. Zrilic:
Compact modular expandable analog defuzzifiers using multiple input floating gate transistor transconductance multipliers. 381-384 - Lei Wang, Licheng Jiao:
A novel genetic algorithim based on immunity. 385-388 - Jordi Madrenas
Mixed-signal VLSI for neural and fuzzy sequential processors. 389-392 - Gianluca Giustolisi, Giuseppe Palmisano, Gaetano Palumbo:
A fuzzy membership function circuit in SC technique. 393-396 - Vítor M. Grade Tavares, José C. Príncipe, John G. Harris:
A silicon olfactory bulb oscillator. 397-400 - Thomas R. Cuthbert:
A real frequency technique optimizing broadband equalizer elements. 401-404 - Saman S. Abeysekera, Xue Yao:
Optimum Laguerre filter design technique for sigma-delta demodulators. 405-408 - Nikos Fragoulis, Ioannis Haritantis, George A. Constantinides:
Active filter synthesis based on tuneable log-domain lossy integrators. 409-412 - Antônio Carlos M. de Queiroz:
Synthesis of multiple resonance networks. 413-416 - Georgios Halkias, Nikos Haralabidis, Efstathios D. Kyriakis-Bitzaros, Stavros Katsafouros:
1.7 GHz bipolar optoelectronic receiver using conventional 0.8 μm BiCMOS process. 417-420 - Nikos Haralabidis, Stavros Katsafouros, George Halkias:
A 1 GHz CMOS transimpedance amplifier for chip-to-chip optical interconnects. 421-424 - Nikos Haralabidis, Georgios Halkias:
A CMOS laser driver with independently adjustable DC and modulation currents for data rates up to 2.5 Gb/s. 425-428 - Luís Nero Alves, Rui L. Aguiar
A sectored receiver for infrared wireless networks. 429-432 - Sung Min Park, Christofer Toumazou, Christos Papavassiliou:
A high-speed four-channel integrated optical receiver array using SiGe HBT technology. 433-436 - Adrian K. Ong, Vladimir I. Prodanov, Maurice Tarsia:
A method for reducing the variation in "on" resistance of a MOS sampling switch. 437-440 - Mohamed Dessouky, Andreas Kaiser
Very low-voltage fully differential amplifier for switched-capacitor applications. 441-444 - Lei Wu, Mustafa Keskin, Un-Ku Moon, Gabor C. Temes:
Efficient common-mode feedback circuits for pseudo-differential switched-capacitor stages. 445-448 - José L. Ausín
Periodical nonuniform individually sampled switched-capacitor circuits. 449-452 - Kritsapon Leelavattananon, Christofer Toumazou, John B. Hughes:
Linearity enhancement techniques for MOSFET-only SC circuits. 453-456 - Sani R. Nassif, Joseph N. Kozhaya:
Multi-grid methods for power grid simulation. 457-460 - Yao-Lin Jiang, Richard M. M. Chen, Omar Wing:
A waveform bounding algorithm for simulation of RLC circuits. 461-464 - Atila Alvandpour, Per Larsson-Edefors, Christer Svensson:
GLMC: interconnect length estimation by growth-limited multifold clustering. 465-468 - Jerzy J. Dabrowski:
Efficient interconnect timing analysis via piecewise linear technique. 469-472 - Tomohiro Fujita, Hidetoshi Onodera:
Statistical delay calculation with vector synthesis model. 473-476 - Takahide Sato, Kazuyuki Wada, Shigetaka Takagi, Nobuo Fujii:
Novel voltage-regulating circuit for low-voltage and low-power OTA realization using MOSFETs in the non-saturation region. 477-480 - Miguel Melendez-Rodriguez, José Silva-Martínez:
A fully-programmable temperature-compensated analogue circuit for Gaussian functions. 481-484 - Aly H. Ismail, Ahmed M. Soliman:
A novel CMOS four quadrant multiplier based on linearization of the long tail differential pair. 485-488 - Volney C. Vincence, Carlos Galup-Montoro, Márcio C. Schneider:
A high-swing MOS cascode bias circuit for operation at any current level. 489-492 - Jun-Woo Lee, Jae-Shin Lee, Gun-Sang Lee, Suki Kim:
A 2 W BTL single-chip class-D power amplifier with very high efficiency for audio applications. 493-496 - Dmitry A. Altshuller:
Chaos in Josephson junction circuits with voltage-dependent supercurrent. 497-500 - Giuseppe Grassi, Saverio Mascolo:
Driving cryptosystems with hyperchaotic signals: an approach involving linear observers. 501-504 - Tetsushi Ueta, Guanrong Chen:
Bifurcation and chaos of Chen's equation. 505-508 - Athanasios Nikolaidis, Ioannis Pitas:
Comparison of different chaotic maps with application to image watermarking. 509-512 - Soo-Chang Pei, Jian-Jiun Ding:
Integer discrete Fourier transform and its extension to integer trigonometric transforms. 513-516 - Yonghong Zeng, Guoan Bi, Abdul Rahim Leyman:
Polynomial transform algorithms for multidimensional discrete Hartley transform. 517-520 - Ahmed M. Shams, Wendi Pan
A high-performance 1D-DCT architecture. 521-524 - Chien-Cheng Tseng, Soo-Chang Pei:
Design of discrete-time fractional Hilbert transformer. 525-528 - Lap-Pui Chau, Wan-Chi Siu:
Recursive algorithm for the realization of the discrete cosine transform. 529-532 - Jaime Ramírez-Angulo, Ramón G. Carvajal, Juana M. Martínez-Heredia:
1.4 V supply, wide swing, high frequency CMOS analogue multiplier with high current efficiency. 533-536 - Jinn-Shyan Wang, Chun-Shing Huang:
A high-speed single-phase-clocked CMOS priority encoder. 537-540 - Dongwon Seo, Andrew C. Weil, Milton Feng:
A 14 bit, 1 GS/s digital-to-analog converter with improved dynamic performances. 541-544 - Chua-Chin Wang, Hsin-Long Wu, Chih-Feng Wu:
A fast dynamic 64-bit comparator with small transistor count. 545-548 - Dongwon Seo, Andrew C. Weil, Milton Feng:
A very wide-band 14 bit, 1 GS/s track-and-hold amplifier. 549-552 - Wing-Sum Mak, Cheong-Fat Chan, Ka-Wai Cheung, Chiu-Sing Choy:
An 8×8 adiabatic quasi-static CMOS multiplier. 553-556 - Irfan A. Chaudrhry, Sung-Ung Kwak, Gabriele Manganaro, Maher Sarraj, T. Lakshmi Viswanathan:
A triple 8b, 80MSPS 3.3 V graphics digitizer. 557-560 - Andrés D. García, Wayne P. Burleson, Jean-Luc Danger:
Low power digital design in FPGAs: a study of pipeline architectures implemented in a FPGA using a low supply voltage to reduce power consumption. 561-564 - Luis Hernandez:
Continuous-time noise-shaping modulators with delay elements. 565-568 - Daniel Eckerbert, Henrik Eriksson, Per Larsson-Edefors, Anders Edman:
An interconnect-driven design of a DFT processor. 569-572 - Antonio J. López-Martín, Alfonso Carlosena:
A tunable CMOS square-root domain oscillator. 573-576 - Yiannis Moisiadis, Ilias Bouras, Angela Arapoyanni:
A CMOS charge pump for low voltage operation. 577-580 - Jaejin Park, Ho-Jin Park, Jae-Whui Kim, Sangnam Seo, Philip Chung:
A 1 mW 10-bit 500KSPS SAR A/D converter. 581-584 - Amar Aggoun
Area-time efficient serial-serial multipliers. 585-588 - Uroschanit Yodprasit, Jitkasame Ngarmnil:
Q-enhancing technique for rf CMOS active inductor. 589-592 - Ahmed Bouridane, Mokhtar Nibouche, Omar Nibouche, Danny Crookes, Badr Albesher:
A low latency bi-directional serial-parallel multiplier architecture. 593-596 - Jia-Ching Wang, Jhing-Fa Wang, Han-Chiang Chen:
Single chip implementation of the 1.6 kbps speech vocoder. 597-600 - Manish Sharma, Naresh R. Shanbhag:
Architecture driven filter transformations. 601-604 - Harri Lampinen, Olli Vainio:
Design and implementation of application specific sigma-delta A/D converters. 605-608 - Frank K. Gürkaynak, Yusuf Leblebici, Laurent Chaouat, Patrik J. McGuinness:
Higher radix Kogge-Stone parallel prefix adder architectures. 609-612 - Lauri Sumanen, Mikko Waltari, Kari Halonen:
Optimizing the number of parallel channels and the stage resolution in time interleaved pipeline A/D converters. 613-616 - Yeong-Kang Lai, Kuo-Chen Chen:
A novel VLSI architecture for Lempel-Ziv based data compression. 617-620 - Xiaohong Sun, Kenneth R. Laker:
Cascaded ΣΔ ADC with adaptive interstage coupling. 621-624 - Koomran Raahemifar, Mojid Ahmadi:
Fast 32-bit digital multiplier. 625-628 - Ting Yu K. Lin, Alison J. Payne:
Design of a low-voltage, low-power, wide-tuning integrated oscillator. 629-632 - Kyung-Nam Han, Sang-Wook Han, Euisik Yoon:
A new adder scheme with reduced P, G signal generations using redundant binary number system. 633-636 - Andreas Lehner, Robert Weigel, Dieter Sewald, Herbert Eichfeld, Ali Hajimiri
Design of a novel low-power 4th-order 1.7 GHz CMOS frequency synthesizer for DCS-1800. 637-640 - Gunok Jung, Victoria Perepelitsa, Gerald E. Sobelman:
Time borrowing in high-speed functional units using skew-tolerant domino circuits. 641-644 - Shouli Yan, Edgar Sánchez-Sinencio:
A programmable rail-to-rail constant-gm input structure for LV amplifier. 645-648 - Michele Fedeli, Carla Vacchi
A self-biased low voltage, low power, CMOS transconductor stage. 649-652 - Christian Jesús B. Fayomi, Gordon W. Roberts, Mohamad Sawan:
Low power/low voltage high speed CMOS differential track and latch comparator with rail-to-rail input. 653-656 - Ilias Bouras, Yiannis Liaperdos
A high speed low power CMOS clock driver using charge recycling technique. 657-660 - Kong-Pang Pun, José E. Franca, Carlos Azeredo Leme:
Wideband digital correction of I and Q mismatch in quadrature radio receivers. 661-664 - Po-Hui Yang, Jinn-Shyan Wang, Yi-Ming Wang:
A 1-GHz low-power transposition memory using new pulse-clocked D flip-flops. 665-668 - Louis Luh, John Choma Jr., Jeffrey Draper:
Performance optimization for high-order continuous-time ΣΔ modulators with extra loop delay. 669-672 - Godi Fischer, Alan J. Davis:
VLSI implementation of a wide-band sonar receiver. 673-676 - Dan P. Scholnik, Jeffrey O. Coleman:
Vector delta-sigma modulation with integral shaping of hardware-mismatch errors. 677-680 - Gousuke Izawa, Toshimichi Saito, Hiroyuki Torikai:
A dependent switched capacitor A/D converter for Farey series approximation. 681-684 - Sukumar S. Raghuram, Chaitali Chakrabarti:
A programmable processor for cryptography. 685-688 - Alan J. Davis, Godi Fischer, Hans-Helge Albrecht, Jürgen Hess:
Digital correction of circuit imperfections in cascaded Σ-Δ modulators composed of 1st-order sections. 689-692 - Jun Rim Choi, Soo-Bok Park, Dong-Seok Han, Se-Ho Park:
A 2048 complex point FFT architecture for digital audio broadcasting system. 693-696 - Nobuhiro Tomabechi, Teruki Ito:
Design of a high-speed RSA encryption processor with built-in table for residue calculation of redundant binary numbers. 697-700 - Robert C. Chang, Lung-Chih Kuo
A new low-voltage charge pump circuit for PLL. 701-704 - Hanho Lee, Meng-Lin Yu, Leilei Song:
VLSI design of Reed-Solomon decoder architectures. 705-708 - Madalina Breten, Torsten Lehmann, Erik Bruun
Integrating data converters for picoampere currents from electrochemical transducers. 709-712 - Jerzy Rutkowski, Jan Machniewski:
Integer-code DC fault dictionary. 713-716 - Zdzislaw Czarnul, K. Oda, Tetsuya Iida:
A straightforward design of mismatch-shaped multi-bit ΔΣ D/A systems. 717-720 - Fernanda Gusmão de Lima, Marcelo Barcelos, Juergen Rochol, Sergio Bampi
A frame stream controller IP. 721-724 - Jiun-In Guo:
An efficient design for one dimensional discrete cosine transform using parallel adders. 725-728 - Spiridon Vlassis, Stilianos Siskos:
CMOS outlier rejection circuit. 729-732 - Bo-Ting Wang, James B. Kuo:
A novel two-port 6T CMOS SRAM cell structure for low-voltage VLSI SRAM with single-bit-line simultaneous read-and-write access (SBLSRWA) capability. 733-736 - Eric Senn, Bertrand Y. Zavidovique:
Designing a low-power (self-timed) router for a MIMD computer. 737-740 - Marc Tiebout:
A 480 μW 2 GHz ultra low power dual-modulus prescaler in 0.25 μm standard CMOS. 741-744 - S. Henry Li, Charles A. Zukowski:
Application of dynamic power supply scaling in a low-energy ATM interface. 745-748 - Frédéric Pétrot, Denis Hommais:
A generic programmable arbiter with default master grant. 749-752 - Krzysztof Wawryn, Bogdan Strzeszewski:
Prototype low power WTA circuits for programmable neural networks. 753-756 - Zhiping Lin, Jiang Qian Ying:
On nD polynomial matrix factorizations. 757-760
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