OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/

Data Structures and Algorithms library with strong emphasis on functional programming

Applications and benchmarks adapted for the riscvbarelib RISC-V baremetal library

A Benchmark Suite for Heterogeneous System Computation

55nm CMOS Open Source PDK by ICsprout Integrated Circuit Co., Ltd.

Strided Data Prefetcher for High-Performance Cache Hierarchies

ASIC implementation flow infrastructure, successor to OpenLane

An open-source static random access memory (SRAM) compiler.

UVM Verification Environment for the CVFPU

Coverview

PolyBench/C benchmark suite (version 4.2.1 beta) from http://web.cse.ohio-state.edu/~pouchet/software/polybench/

The official repository for the gem5 computer-system architecture simulator.

A SystemVerilog source file pickler.

fakeram generator for use by researchers who do not have access to commercial ram generators

Nix Packages collection & NixOS

SystemVerilog compiler and language services

SystemVerilog IPs and Modules for architectural redundancy designs.

A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)

Technology dependent cells instantiated in the design for generic process (simulation, FPGA)

Home of the open-source EDA course.

Open Application-Specific Instruction Set processor tools (OpenASIP)

An Open-Source Toolchain for Top-Metal IC Art and Ultra-High-Fidelity GDSII Renders

RISC-V IOMMU Specification

Package manager and build abstraction tool for FPGA/ASIC development

A dependency management tool for hardware projects.

Network on Chip Simulator