🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

Vivado诸多IP，包括图像处理等

♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.

CAN FD IP Core in VHDL

High speed C/C++ based behavioural VHDL/Verilog co-simulation memory model

STM32-style peripheral modules (GPIO, TIM, UART, etc.) and general graphic modules (drivers, algorithms ...) written in Verilog/Chisel/SpinalHDL with APB/AHB/AXI interfaces. Includes a RISC-V SoC e…