VHDL 2008/93/87 simulator

🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

VUnit is a unit testing framework for VHDL/SystemVerilog

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

The PoC Library has been forked to github.com/VHDL/PoC. See new address below

Implementation of a Tensor Processing Unit for embedded systems and the IoT.

A huge VHDL library for FPGA and digital ASIC development

bladeRF-wiphy is an open-source IEEE 802.11 compatible software defined radio VHDL modem

A Forth CPU and System on a Chip, based on the J1, written in VHDL

A simple RISC-V processor for use in FPGA designs.

OSVVM Utility Library: AlertLogPkg, CoveragePkg, RandomPkg, ScoreboardGenericPkg, MemoryPkg, TbUtilPkg, TranscriptPkg, ...

All the sources (Schematics, PCB, VHDL, BIOS sources) for the M8SBC-486. This project is a 486 Homebrew computer, with some efforts to make it kinda PC compatible

Image Processing Toolbox in Verilog using Basys3 FPGA

🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).

A collection of reusable, high-quality, peer-reviewed VHDL building blocks.

💻 A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.

AXIOM firmware (linux image, gateware and software tools)

VHDL library 4 FPGAs

SPI master and SPI slave for FPGA written in VHDL

Basic RISC-V CPU implementation in VHDL.