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zynq

Here are 39 public repositories matching this topic...

pavel-demin / red-pitaya-notes

Notes on the Red Pitaya Open Source Instrument

radio linux fpga zynq dsp tcl verilog nmr xilinx sdr mca redpitaya vna vivado wspr red-pitaya vitis

Updated Sep 20, 2026
Tcl

Cr4sh / zc_pcie_dma

DMA attacks over PCI Express based on Xilinx Zynq-7000 series SoC

linux kernel fpga zynq xilinx dma axi-dma pci-e

Updated May 1, 2021
Tcl

necst / zynq_userspace_dma

Userspace DMA library for Zynq-based SoCs

linux zynq linux-app pynq

Updated Jan 22, 2019
Tcl

nick-petrovsky / PYNQ-ZYBO

PYNQ for Zybo board

fpga zynq pynq zybo zynq-7010 zybo-z7 pynq-board zybo-z7-10 zybo-z7-20

Updated Jan 30, 2026
Tcl

IFM-Ulm / ro-pr-fw

Framework based on Partial Reconfiguration for chip characterization utilizing ring-oscillator PUFs

fpga zynq publication xilinx-fpga zybo hardware-security puf partial-reconfiguration ring-oscillators measurement-control

Updated Apr 1, 2020
Tcl

nengo / zynq-axi-dna

IP core with AXI interface for reading the Device DNA from the PL of Zynq 7000 devices

zynq pynq xilinx-ip

Updated Nov 25, 2021
Tcl

kuoyaoming93 / sem-ip_pynq

SEM (Soft Error Mitigation) IP adapted for PYNQ-Z2

python zynq jupyter-notebook xilinx uart pynq pynq-hardware-overlay xilinx-fpga icap xilinx-vivado axi pynq-z1 pynq-z2 soft-error sem-ip

Updated May 1, 2020
Tcl

Risto97 / zturn_linux

Building linux kernel and u-boot for MYIR Z-Turn 7020 Zynq Board

fpga zynq linux-kernel xilinx vivado u-boot zturn

Updated Feb 23, 2019
Tcl

zdzislaw-s / audio-processing

Simple audio processing with ADAU1761

audio fpga zynq hardware xilinx vivado bare-metal zedboard audio-processing adau1761 zedboard-audio-jack

Updated Apr 18, 2020
Tcl

code-xee / fpga-vivado-projects

A collection of complete Xilinx Vivado projects for Zynq-based boards, combining PL RTL designs with PS bare-metal software.

fpga zynq embedded-systems verilog xilinx vivado hdl vitis

Updated Jul 28, 2026
Tcl

leecurrent04 / MicroPhase-Z7-Lite-Board

AMD Xilinx Zynq 7020 Board and Examples

zynq amd xilinx vivado vitis zynq-7020 microphase

Updated Jun 27, 2025
Tcl

marcvhoof / genesys-zu-pynq-notes

PYNQ enabled Genesys ZU Open Source Instrument, based on Pavel Demin's Red Pitaya Notes workflow.

fpga zynq sdr adc pynq mpsoc syzygy dac dpu zynqmp vitis-ai genesyszu zmod

Updated Mar 27, 2024
Tcl

Mildstone / Anacleto

FPGA SoC devices build infrastructure for GNU Linux based on Autotools

build zynq vivado autoconf fpga-soc-build

Updated Jan 28, 2021
Tcl

ikwzm / PYNQ-Festival

PYNQ Festival

fpga zynq linux-kernel debian8 fpga-soc-linux pynq

Updated Apr 12, 2017
Tcl

RyBo / scadder

security zynq vivado microblaze

Updated May 8, 2019
Tcl

Bhavin-umatiya / Latency-Optimized-Heterogeneous-AI-Accelerator

Latency-Optimized Heterogeneous AI Accelerator for Vision Transformers (ViT)

fpga deep-learning zynq hls xilinx vivado petalinux axi-dma heterogeneous-computing edge-ai vision-transformer vitis-hls vit-accelerator latency-optimized

Updated May 19, 2026
Tcl

amarjaggari / FPGA-Waveform-Generator-Using-BRAM-Verilog-ZedBoard-

A BRAM-based digital function generator implemented in Verilog on the ZedBoard. Generates sine, square, triangular, and sawtooth waveforms using BRAM lookup tables.

open-source fpga zynq waveform verilog vivado bram zynq-7000 verilog-project

Updated Dec 22, 2025
Tcl

marcvhoof / genesys-zu-notes

Notes on the Genesys ZU Open Source Instrument. This is a port of Pavel Demin's Red Pitaya Notes.

fpga zynq sdr adc mpsoc dac genesyszu zmod genesys-zu

Updated Jul 5, 2023
Tcl

PAICookers / PAICORE_Datapath

Hardware platform for PAICORE.

zynq vivado xilinx-fpga paicore

Updated Jan 4, 2026
Tcl

mmattioli / ZedBoard-LED-Button

Illuminate LEDs on the ZedBoard using push buttons

zynq zedboard

Updated May 7, 2017
Tcl

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