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hdl

Verilog is a widely-used hardware description language (HDL) that enables designers to model, simulate, and synthesize digital circuits. It provides a text-based format for specifying the structure and behavior of electronic systems, making it easier to design complex hardware components such as microprocessors, memory, and communication devices.

Here are 66 public repositories matching this topic...

neorv32

stnolting / neorv32

🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

microcontroller embedded cpu fpga processor vhdl riscv smp multi-core rtos hdl soc risc-v soft-core system-on-chip rv32 asip neorv32 on-chip-debbuger

Updated Nov 7, 2025
VHDL

Nuand / bladeRF-wiphy

bladeRF-wiphy is an open-source IEEE 802.11 compatible software defined radio VHDL modem

vhdl rtl hdl ofdm bladerf ofdm-wireless-communications 80211 dsss

Updated Apr 15, 2024
VHDL

slaclab / surf

A huge VHDL library for FPGA and digital ASIC development

python asic fpga firmware vhdl hdl

Updated Nov 7, 2025
VHDL

stnolting / neoTRNG

🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).

cryptography asic fpga entropy random vhdl chaos rtl rng random-number-generators hdl key-generator trng entropy-source ring-oscillator asic-design neorv32

Updated Sep 11, 2025
VHDL

alialaei1 / HDLab-FPGA-Development-Board

Open source FPGA development platform

training development board fpga electronics vhdl pcb electronic fpga-game hdl pcb-layout fpga-board electronics-engineering vhdl-code vhdl-examples hdlab electronics-projects pcb-design

Updated Jul 31, 2023
VHDL

vankxr / icyradio

Over-engineered SDR development board

Updated Aug 3, 2025
VHDL

dbhi / vboard

Virtual development board for HDL design

vhdl verilog hdl ghdl cosim vpi verilator fli vhpidirect

Updated Mar 31, 2023
VHDL

VHDL / PoC

IP Core Library - Published and maintained by the Open Source VHDL Group

library asic collection fpga vhdl diamond verification xilinx synthesis vivado altera hdl ghdl quartus nvc ipcore

Updated Oct 14, 2025
VHDL

Paebbels / PicoBlaze-Library

The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a Chip (SoC or SoFPGA).

fpga hardware simulation vhdl assembler hardware-architectures verilog synthesis hardware-designs hardware-libraries picoblaze-library poc-library picoblaze-devices hdl soc

Updated Dec 24, 2020
VHDL

m-kru / fsva

FuseSoc Verification Automation

fpga hdl fusesoc

Updated Jul 21, 2022
VHDL

davidel / pyxhdl

Python Frontend For VHDL And Verilog

python vhdl verilog systemverilog hdl

Updated May 1, 2025
VHDL

prateek22sri / XNOR-net-Binary-connect

A hardware implementation of a feed-forward Convolutional Neural Network called XNOR-Net which has faster execution due to the replacement of vector-matrix multiplication to “XNOR + Popcount” operation

neural-network vhdl hdl xnor-net binary-connect

Updated Sep 16, 2018
VHDL

akaeba / tinyUART

Lightweight UART core in VHDL

asic fpga hardware controller vhdl uart rs232 hdl vhdl-code uart-transmitter uart-vhdl

Updated Jan 18, 2025
VHDL

MasterPlayer / rmii-ethernet-mac

RMII interface ethernet MAC Core for 10/100 MBit ethernet implementation with support CDC and AXI-Stream BUS without management and without MDIO interface support

mac ethernet systemverilog hdl artix rmii lan8720a ethernet-mac

Updated Jan 21, 2022
VHDL

akaeba / generic_spi_master

Customizable multi chip select supporting Serial Peripheral Interface master.

fpga vhdl parallel generic spi hdl spi-master vhdl-code sck spi-controller spi-modes

Updated Aug 31, 2021
VHDL

Choaib-ELMADI / getting-started-with-vhdl

Getting started with VHDL: Very High Speed Integrated Circuit Hardware Description Language.

design fpga digital vhdl circuit hdl fpga-soc fpga-board vhdl-code vhdl-examples fpga-programming

Updated Oct 12, 2025
VHDL

mariam-elshakafi / SAP1-VHDL

An implementation of a simple processor (SAP1) using VHDL

vhdl hdl sap1 sap1-vhdl

Updated May 3, 2020
VHDL

MasterPlayer / lcd-st7789-sv

simple demo hardware code for implement access to ST7789 LCD display from FPGA

fpga lcd systemverilog hdl artix st7789 st7789-display

Updated Mar 28, 2022
VHDL

SnrNotHere16 / FPGADivisionFloatingPoint

A series of projects using the floating point division IP from Xilinx to perform floating point (single precision) division. Boards used: ZYBO and NEXYS4DDR (ARTIX-7)

c sdk fpga zynq verilog xilinx floating-point hdl division xilinx-vivado microblaze zynq-7000 nexys4ddr floating-ip artix-7 floating-point-conversion

Updated Apr 5, 2022
VHDL

NabilChouba / luxAlgoHDL

VHDL implemetation of LUX algorithm

vhdl rtl hdl lux

Updated Mar 11, 2017
VHDL

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