default search action
ISCAS 2014: Melbourne, Victoria, Australia
- IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014. IEEE 2014, ISBN 978-1-4799-3431-7
A1L-A: Image and Video Coding
- Shuyuan Zhu, Bing Zeng, Moncef Gabbouj
:
Adaptive reweighted compressed sensing for image compression. 1-4 - Chuang Zhu
Multi-level low-complexity coefficient discarding scheme for video encoder. 5-8 - Do-Kyoung Kwon, Madhukar Budagavi:
Fast intra block copy (IntraBC) search for HEVC screen content coding. 9-12 - Li Zhang, Ying Chen, Xiang Li, Shanhua Xue:
Low-complexity advanced residual prediction design in 3D-HEVC. 13-16 - Li Zhang, Ying Chen, Vijayaraghavan Thirumalai, Jian-Liang Lin, Yi-Wen Chen, Jicheng An, Shawmin Lei, Laurent Guillo, Thomas Guionnet, Christine Guillemot:
Inter-view motion prediction in 3D-HEVC. 17-20
A1L-B: Circuits for Bio Applications I
- Xin Meng, Wei Li, Gabor C. Temes:
A fully-differential input amplifier with band-pass filter for biosensors. 21-24 - Mark M. R. Ibrahim, Peter M. Levine:
CMOS transimpedance amplifier for biosensor signal acquisition. 25-28 - Masayuki Takihi, Kiichi Niitsu
Charge-conserved analog-to-time converter for a large-scale CMOS biosensor array. 33-36 - Mohammadreza Sohbati, Christofer Toumazou:
A temperature insensitive continuous time ΔpH to digital converter. 37-40
A1L-C: Sensory Systems for Vision
- Andreas Steiner, Rico Moeckel
1kHz 2D silicon retina motion sensor platform. 41-44 - Arthur Spivak, Orly Yadid-Pecht:
Design of A 128 × 128 CMOS APS with extended noise suppression for high and low light imaging applications. 45-48 - Dipan Kumar Mandal, Jagadeesh Sankaran, Akshay Gupta, Kyle Castille, Shraddha Gondkar, Sanmati Kamath, Pooja Sundar, Alan Phipps:
An Embedded Vision Engine (EVE) for automotive vision processing. 49-52 - Josep Maria Margarit
A 10kfps 32×32 integrated test platform for electrical characterization of imagers. 53-56 - Kyeongryeol Bong, Gyeonghoon Kim, Injoon Hong, Hoi-Jun Yoo:
An 1.61mW mixed-signal column processor for BRISK feature extraction in CMOS image sensor. 57-60 - Igor M. Filanovsky
On feedback systems built around cut-inserted ideal transformer. 61-64 - Jeffrey Harrison:
Analytic bounds on amplifier gain-bandwidth product from complex power flow. 65-68 - Qinfeng Zhang, Fengyi Huang:
A study on linear single-loop feedback systems using geometric vectors. 69-72 - Robert D'Angelo, Sameer R. Sonkusale:
A time-mode translinear principle for implementing analog multiplication. 73-76 - Amir Babaie-Fishani, Maarten De Bock, Pieter Rombouts:
Analyzing distortion in ASDMs with loop delay. 77-80
A1L-E: Data Convertors I
- Cencen Gao, Dong Wu, Hui Liu, Nan Xie, Liyang Pan:
An ultra-low-power extended counting ADC For large scale sensor arrays. 81-84 - Kristof Blutman, Jan A. Angevare, Amir Zjajo, Nick van der Meijs:
A 0.1pJ Freeze Vernier time-to-digital converter in 65nm CMOS. 85-88 - Nuno Pereira
Analog-to-Digital Converters with embedded IF mixing using variable reference voltages. 89-92 - James S. Tandon, Takahiro J. Yamaguchi, Satoshi Komatsu, Kunihiro Asada:
A subsampling stochastic coarse-fine ADC with SNR 55.3dB and >5.8TS/s effective sample rate for an on-chip signal analyzer. 93-96 - Fabio Alex Rabuske, Taimur Gibran Rabuske
A sub-ranging 2-Step 7-bit self-calibrated comparator-based binary-search ADC. 97-100
A1L-F: Power Converter Circuits
- Hsiang-Yuan Lee, Tsorng-Juu Liang, Jiann-Fuh Chen, Kai-Hui Chen:
Design and implementation of a bidirectional SEPIC-Zeta DC-DC Converter. 101-104 - Yutaro Minami, Hirotaka Koizumi:
Class DE current driven low di/dt rectifier. 105-108 - Sho Takeuchi, Naoki Yamashita, Hirotaka Koizumi:
A design method for single phase Z-source inverter. 109-112 - Tomoharu Nagashima, Kazuhide Inoue, Xiuqin Wei, Elisenda Bou, Eduard Alarcón, Marian K. Kazimierczuk, Hiroo Sekiya
Analytical design procedure for resonant inductively coupled wireless power transfer system with class-E2 DC-DC converter. 113-116 - T. Ramanathan, R. Ramesh, C. K. Subramaniam
Pseudorandom carrier based subharmonic PWM for cascaded multilevel inverters. 117-120
A1L-G: Audio and Speech Processing
- Tak-Wai Shen, Daniel Pak-Kong Lun
Speech enhancement based on L1 regularization in the cepstral domain. 121-124 - Pranab Kumar Dhar, Tetsuya Shimamura:
A blind LWT-based audio watermarking using fast Walsh Hadamard transform and singular value decomposition. 125-128 - Koji Seto, Tokunbo Ogunfunmi
Packet-loss robust scalable speech coding using the discrete wavelet transform. 129-132 - Mahdi Parchami, Wei-Ping Zhu, Benoît Champagne:
Microphone array based speech spectral amplitude estimators with phase estimation. 133-136 - Sharifa Sultana, Celia Shahnaz
Speech emotion recognition based on entropy of enhanced wavelet coefficients. 137-140
A1L-H: Digital VLSI Circuits
- Masashi Imai, Tomohiro Yoneda:
Multiple-clock multiple-edge-triggered multiple-bit flip-flops for two-phase handshaking asynchronous circuits. 141-144 - Samiran Dasgupta, Devraj Rajagopal:
A 1.8/2.5/3.3V BiCMOS I/O driver with VCC=5V. 145-148 - Yang Lin, Mark Zwolinski
A cost-efficient self-checking register architecture for radiation hardened designs. 149-152 - Rong Zhou, Kwen-Siong Chong, Bah-Hwee Gwee
Synthesis of asynchronous QDI circuits using synchronous coding specifications. 153-156 - Chang-Hung Tsai, Hui-Hsuan Lee, Wan-Ju Yu, Chen-Yi Lee:
A 2 GOPS quad-mean shift processor with early termination for machine learning applications. 157-160
A1L-J: Computer-Aided Network Design I
- Chenglong Xiao, Emmanuel Casseau:
Improving high-level synthesis effectiveness through custom operator identification. 161-164 - Mohamed Ben Hammouda, Philippe Coussy, Loïc Lagadec
A design approach to automatically synthesize ANSI-C assertions during High-Level Synthesis of hardware accelerators. 165-168 - Michael Rathmair, Florian Schupfer, Christian Krieg:
Applied formal methods for hardware Trojan detection. 169-172 - Mehedi Sarwar, James E. Stine
Enhancing the Unified Logical Effort algorithm for branching and load distribution. 173-176 - Basireddy Karunakar Reddy, Srinivas Sabbavarapu
A new VLSI IC design automation methodology with reduced NRE costs and time-to-market using the NPN class Representation and functional symmetry. 177-180 - Long Chen, Tao Xia, Ying Guo, Huailin Liao:
A SAW-less 0.5-2.5 GHz receiver front-end with 80 dB 3rd order harmonic rejection ratio. 181-184 - Raheleh Eslampanah, Lance Linton, Shabbir Ahmed, Robabeh Amirkhanzadeh, Mohammadreza Pourakbar, Jean-Michel Redoute
Active duplexing for Software Defined Radio. 185-188 - Abhishek Kumar
Ground-bounce reduction in narrow-band RF front-ends. 189-192 - Chenxin Zhang, Hemanth Prabhu, Liang Liu
Energy efficient SQRD processor for LTE-A using a group-sort update scheme. 193-196 - Junqing Guan, Xuan Anh Nghiem, Renato Negra:
Iterative characterisation approach using realistic excitation signals for linearisation of transmitters. 197-200
A1L-L: Special Session: FEC for Next Generation Storage and Communication Systems
- Zhiqiang Cui, Zhongfeng Wang, Xinming Huang:
Multilevel error correction scheme for MLC flash memory. 201-204 - Bo Yuan, Keshab K. Parhi
Architectures for polar BP decoders using folding. 205-208 - Chuan Zhang, Xiaohu You, Jin Sha:
Hardware architecture for list successive cancellation polar decoder. 209-212 - Mao-Ruei Li, Hsueh-Chih Chou, Yeong-Luh Ueng
A low-complexity LDPC decoder for NAND flash applications. 213-216
A2L-A: Special Session: Microsystems for Biochemical Sensing
- Scott MacKay, Jie Chen:
Biosensor systems and applications in genomics, proteomics and metabolomics: A review. 217-220 - Yang Choon Lim, Abbas Z. Kouzani, Wei Duan, Xiujuan J. Dai, Akif Kaynak
Design and evaluation of a microcantilever aptasensor. 221-224 - Yushan Zheng, Mohamad Sawan:
A microsystem for magnetic immunoassay towards protein toxins detection. 225-228 - Sahil Shah, Karen S. Anderson, Jennifer Blain Christen, Jennifer Hasler:
Floating gate ISFET for therapeutic drug screening of breast cancer cells. 229-232 - Ghazal Nabovati, Ebrahim Ghafar-Zadeh, Maryam Mirzaei, Giancarlo Ayala-Charca
Fully integrated CMOS capacitive sensor for Lab-on-Chip applications. 233-236
A2L-B: Circuits for Bio Applications II
- Kuan-Yu Lin, Ming-Dou Ker, Chun-Yu Lin
A high-voltage-tolerant stimulator realized in the low-voltage CMOS process for cochlear implant. 237-240 - Mohammad Hossein Maghami
Biphasic, energy-efficient, current-controlled stimulation back-end for retinal visual prosthesis. 241-244 - Mohammed Al-Rawhani, James Beeley, David R. S. Cumming
Power management system for a capsule endoscope using autofluorescence imaging. 245-248 - Panagiotis Kassanos
A CMOS multi-sine signal generator for multi-frequency bioimpedance measurements. 249-252 - Shuang Song
A multiple-channel frontend system with current reuse for fetal monitoring applications. 253-256
A2L-C: Neural Networks and Systems I
- Luis A. Camuñas-Mesa
Event-driven stereo vision with orientation filters. 257-260 - Yilda Irizarry-Valle, Alice Cline Parker:
Astrocyte on neuronal phase synchrony in CMOS. 261-264 - Vasilis N. Thanasoulis, Bernhard Vogginger, Johannes Partzsch
A pulse communication flow ready for accelerated neuromorphic experiments. 265-268 - Federico Corradi
Mapping arbitrary mathematical functions and dynamical systems to neuromorphic VLSI circuits for spike-based neural computation. 269-272 - Ming Gu, Shantanu Chakrabartty:
A bias-scalable current-mode analog support vector machine based on margin propagation. 273-276
A2L-D: Analog Circuit Testing & Verification
- Sotirios P. Pouros, Vassilios D. Vassios
Input stimulus comparison using an adaptive FPGA-based testing system. 277-280 - You Li, Degang Chen:
Efficient analog verification against Trojan states using divide and contraction method. 281-284 - Xiankun Jin, Nan Sun:
Low-cost high-quality constant offset injection for SEIR-based ADC built-in-self-test. 285-288 - Zhiqiang Liu, You Li, Yan Duan, Randall L. Geiger, Degang Chen:
Identification and break of positive feedback loops in Trojan States Vulnerable Circuits. 289-292 - Ricardo Povoa
LC-VCO automatic synthesis using multi-objective evolutionary techniques. 293-296
A2L-E: SAR Converters
- Arindam Sanyal, Nan Sun:
A low frequency-dependence, energy-efficient switching technique for bottom-plate sampled SAR ADC. 297-300 - Ling Du, Shuangyi Wu, Min Jiang, Ning Ning, Qi Yu, Yang Liu:
A 10-bit 100MS/s subrange SAR ADC with time-domain quantization. 301-304 - Anh Trong Huynh, Hoa Thai Duong, Hoang Viet Le, Efstratios Skafidas
Design and implementation of an 11-bit 50-MS/s split SAR ADC in 65 nm CMOS. 305-308 - Xiaoyang Wang, Qiang Li:
A 10-bit 150MS/s SAR ADC with parallel segmented DAC in 65nm CMOS. 309-312 - Nick Martin, Stephen O'Driscoll:
Match enhancement in SAR ADCs by algorithmic unit capacitor assignment. 313-316
A2L-F: Communication Circuits and Systems I
- Cecilia Gimeno, Erick Guerrero, Carlos Sánchez-Azqueta
A double loop continuous-time adaptive equalizer. 317-320 - Gijs Meuleman, Pieter Harpe, Xiongchuan Huang, Arthur H. M. van Roermund:
A 19 µW 20 MHz All-Digital PLL for 2-tone envelope detection radios. 321-324 - Jing Li, Richard Hagelauer, Thomas Mayer, Stefan Tertinek, Christian Wicpalek, Burkhard Neurauter:
An overall gain estimation algorithm for all digital phase locked loops. 325-328 - Matt Bergeron, Alan N. Willson Jr.:
A 1-GHz direct digital frequency synthesizer in an FPGA. 329-332 - Robabeh Amirkhanzadeh, Henrik Sjöland
L-band 180° passive phase shifter employing auto-transformer in an SOS process. 333-336
A2L-G: Image and Video Analysis
- Chun-Rong Huang
Occluded object tracking based on trajectory links in surveillance videos. 337-340 - Lai Wei, Golrokh Mirzaei, Mohammad Wadood Majid, Mohsin M. Jamali, Jeremy Ross
Birds/bats movement tracking with IR camera for wind farm applications. 341-344 - Zhengqiang Yu, Luc Claesen, Yun Pan, Andy Motten, Yimu Wang, Xiaolang Yan:
SoC processor for real-time object labeling in life camera streams with low line level latency. 345-348 - Fanman Meng, Bing Luo, Chao Huang, Liangzhi Tang, Bing Zeng, Nini Rao:
Favorite object extraction using web images. 349-352 - Fanman Meng, Hongliang Li, King Ngi Ngan
Cosegmentation from similar backgrounds. 353-356
A2L-H: VLSI Datapath & Arithmetic Circuits I
- Ye Cheng, Jianhao Hu:
Random error analysis and reduction for stochastic computation based on autocorrelation sequence. 357-360 - Son Bui, James E. Stine
Additional optimizations for parallel squarer units. 361-364 - Jiangyun Zhou, Jianhao Hu, Jienan Chen:
High performance absolute value calculator based on stochastic computing. 365-368 - Pramod Kumar Meher, Sang Yoon Park:
A novel DA-based architecture for efficient computation of inner-product of variable vectors. 369-372 - Keshab K. Parhi
Architectures for IIR digital filters using stochastic computing. 373-376
A2L-J: Computer-Aided Network Design II
- Wei Song
Automatic data path extraction in large-scale register-transfer level designs. 377-380 - Hsing-Han Tseng, Shiou-Wen Wang, Jian-Yu Chen, Chien-Nan Jimmy Liu:
A novel design space reduction method for efficient simulation-based optimization. 381-384 - Augusto Neutzling, Mayler G. A. Martins, Renato P. Ribas, André Inácio Reis:
A constructive approach for threshold logic circuit synthesis. 385-388 - Chao Deng, Yici Cai, Qiang Zhou:
A register clustering algorithm for low power clock tree synthesis. 389-392 - Jin-Tai Yan, Yu-Jen Tseng, Chia-Heng Yen:
Feasible region assignment of routing nets in single-layer routing. 393-396
A2L-K: Error Correction Codes
- Yichao Lu, Guifen Tian, Satoshi Goto:
An efficient decoder architecture for cyclic non-binary LDPC codes. 397-400 - Chuan Zhang, Keshab K. Parhi
Interleaved successive cancellation polar decoders. 401-404 - Leixin Zhou, Jin Sha, Yun Chen, Chuan Zhang, Zhongfeng Wang:
Efficient symbol reliability based decoding for QCNB-LDPC codes. 405-408 - Chih-Wen Yang, Xin-Ru Lee, Chih-Lung Chen, Hsie-Chia Chang, Chen-Yi Lee:
Area-efficient TFM-based stochastic decoder design for non-binary LDPC codes. 409-412 - Chuan Zhang, Xiaohu You, Zhongfeng Wang:
Efficient column-layered decoders for single block-row quasi-cyclic LDPC codes. 413-416
A2L-L: Special Session: 3D Resistive Devices & CMOS Integration
- Jinfeng Kang, Bin Gao, Bing Chen, Peng Huang, Feifei Zhang, Xiaoyan Liu, Hong-Yu Chen, Zizhen Jiang, H.-S. Philip Wong, Shimeng Yu
Scaling and operation characteristics of HfOx based vertical RRAM for 3D cross-point architecture. 417-420 - Shimeng Yu
Design guidelines for 3D RRAM cross-point architecture. 421-424 - Shuang Pi
Device engineering and CMOS integration of nanoscale memristors. 425-427 - Euijun Cha, Jiyong Woo, Daeseok Lee, Sangheon Lee, Hyunsang Hwang:
Selector devices for 3-D cross-point ReRAM. 428-431 - Katrina A. Morgan
The effect of atomic layer deposition temperature on switching properties of HfOx resistive RAM devices. 432-435
A3P-N: Live Demonstrations of Circuits and Systems
- Wei Xu, Xiyan Li, Wuxi Li, Hang Yuan, Guoxing Wang:
Live demonstration: An optimization software and a design case of a novel dual band wireless power and data transmission system. 436 - José M. de la Rosa
Live demonstration: Using SIMULINK S-functions for the efficient modeling and simulation of analog integrated circuits and systems. 437 - Ming-Chun Liang, Cheng-Han Hsieh, Jia-Hua Hong, Shih-Yu Chang Chien, Shuenn-Yuh Lee:
Live demonstration: A wearable wireless ECG acquisition and specification system. 438 - Lutz Nielen
Live demonstration: An associative capacitive network based on nanoscale complementary resistive switches. 439 - Christian Brandli, Raphael Berner, Minhao Yang
Live demonstration: The "DAVIS" Dynamic and Active-Pixel Vision Sensor. 440 - Alexantrou Serb
Live demonstration: A versatile, low-cost platform for testing large ReRAM cross-bar arrays. 441 - Wendi Yang, Kai Yang, Hanjun Jiang, Zhihua Wang, Qingliang Lin, Wen Jia:
Fetal heart rate monitoring system with mobile internet. 443-446 - Stephen J. Carey, David Robert Wallace Barr, Bin Wang, Alexey Lopich, Piotr Dudek:
Live demonstration: A sensor-processor array integrated circuit for high-speed real-time machine vision. 447 - Zhongpai Gao
Information security display system based on temporal psychovisual modulation. 449-452 - Chun-Hsiang Peng, Ching-Hwa Cheng:
A panoramic endoscope design and implementation for Minimally Invasive Surgery. 453-456 - Runchun Wang, Tara Julia Hamilton
An FPGA design framework for large-scale spiking neural networks. 457-460 - Chetan Singh Thakur, James Wright, Tara Julia Hamilton
Live demonstration: FPGA implementation of the CAR model of the cochlea. 461 - Fernando Perez-Peña, Arturo Morgado Estevez
Spike-based VITE control with dynamic vision sensor applied to an arm robot. 463-466 - Richard James Sofatzis, Saeed Afshar, Tara Julia Hamilton
Rotationally invariant vision recognition with neuromorphic transformation and learning networks. 469-472 - Yuki Yanagihara, Toshiya Honda, Takeshi Kumaki, Takeshi Fujino:
Live Demonstration: Hierarchical masked image filtering technology on security-camera for privacy protection. 473
A3P-P: Modeling and Simulation of Nonlinear Circuits and Systems
- Yuma Kawabata, Hisato Fujisaka, Takeshi Kamio:
Probabilistic particle modeling of quantum wave propagation with excitation and refraction. 474-477 - Nobuyuki Hirami, Hisato Fujisaka, Takeshi Kamio:
Probabilistic particle modeling of quantum wave propagation with reflection, transmission, and coupling. 478-481 - Andrew Lewis Fitch, Herbert H. C. Iu, Dongsheng Yu:
Chaos in a memcapacitor based circuit. 482-485 - Zhen Li, Xiangdong Liu, Siu Chung Wong
Period-doubling bifurcation and its boundary study of DFIGWind turbine connected with local interacting unbalanced loads in micro-grid. 486-489
A3P-Q: Nonlinear Circuits, Systems and Networks
- Bharathwaj Muthuswamy, Jovan Jevtic, Herbert H. C. Iu, Chittur Krishnaswamy Subramaniam, Ganesan Kaliyaperumal, V. Sankaranarayanan, K. Sethupathi
Memristor modelling. 490-493 - Most Nahida Akter, A. B. M. Nasiruzzaman, Md. Apel Mahmud
Topological resiliency analysis of the Australian electricity grid with increased penetration of renewable resources. 494-497 - Chunnan Lin, Quanjun Wu, Lan Xiang, Jin Zhou:
Pinning impulsive synchronization in coupled delayed directed dynamical networks. 498-501 - Jing Jin, Bukun Pan, Xiaoming Liu, Jianjun Zhou
Injection-Locking Frequency Divider based dual-modulus prescalers with extended locking range. 502-505 - Tero Tikka, Kari Stadius, Jussi Ryynänen
A 1.2 - 6.4 GHz clock generator with a low-power DCO and programmable multiplier in 40-nm CMOS. 506-509 - Chi-Tsun Cheng
Multi-objective directional sensor placement for wireless sensor networks. 510-513 - Jakub Gronicz, Mika Pulkkinen, Mikail Yücetas, Kari Halonen:
A 2µA temperature compensated mems-based real time clock with ±4 ppm timekeeping accuracy. 514-517
A3P-R: Visual Signal Processing and Analysis
- Ke Gu, Guangtao Zhai, Min Liu, Xiaokang Yang, Wenjun Zhang:
Details preservation inspired blind quality metric of tone mapping methods. 518-521 - Shuai Zhang, Shing-Chow Chan, Bin Liao
A new visual object tracking algorithm using Bayesian Kalman filter. 522-525 - Xilei Cai, Xiang Xie, Guolin Li, Wei Song, Yi Zheng, Zhihua Wang:
A new method of detecting fingertip touch for the projector-camera HCI system. 526-529 - Qingbo Wu, Hongliang Li, King N. Ngan
No reference image quality metric via distortion identification and multi-channel label transfer. 530-533 - Hongyun Gao
Saliency detection based on adaptive DoG and distance transform. 534-537
A3P-S: Visual Signal Coding and Representation
- Maryam Homayouni, Alireza Aminlou, Payman Aflaki, Moncef Gabbouj
Content adaptive depth map resampling scheme in multiview video plus depth. 538-541 - Hao Lv, Ronggang Wang, Yuan Li, Chuang Zhu
A resolution-adaptive interpolation filter for video codec. 542-545 - X. Z. Yao, Qing Wu, Shing-Chow Chan:
An AVS- and object- based approach to scalable coding of plenoptic videos. 546-549 - Fangdong Chen, Jinlei Zhang, Houqiang Li:
Hybrid transform for HEVC-based lossless coding. 550-553 - Tae-jun Jung, Kwang-deok Seo, Yo-Won Jeong, Chang-Ki Kim:
A practical FEC code rate decision scheme based on joint source-channel distortion model. 554-557 - Hetul Sanghvi, Mihir N. Mody, Niraj Nandan, Mahesh Mehendale, Subrangshu Das, Dipan Kumar Mandal, Pavan Shastry:
A 28nm programmable and low power ultra-HD video codec engine. 558-561
A3P-T: Media Processing and Streaming
- Kai Tang, Chao Zhou, Xinggong Zhang, Zongming Guo:
Joint multi-CDN and LT-coding for video transport over HTTP. 562-565 - Donghyeok Ho, Kyuhwi Choi, Hwangjun Song:
Social relation-aware SVC-based video streaming system over P2P network. 566-569 - Po-Hung Wu, Jian-Jiun Ding, Jing-Ming Guo, Pei-Jen Kang, Chang-En Pu:
Banknote reconstruction from fragments using quadratic programming and SIFT points. 570-573 - Hung-Ming Wang, An-Ti Chiang, Kuo-Hao Lee, Jar-Ferr Yang:
A novel view synthesis algorithm based on depth and texture consistency. 574-577 - Alexsandro Cristovão Bonatto
Run-time SoC memory subsystem mapping of heterogeneous clients. 578-581 - Yujing Wu, Jin-Gyun Chung, Myung Hoon Sunwoo:
Design and implementation of CAN data compression algorithm. 582-585 - Chua-Chin Wang, Wen-Je Lu, Tzu-Chao Wu, Chun-Ying Juan:
A CMOS wide-range temperature sensor with process compensation and second-order calibration for Battery Management Systems. 586-589 - Katsuhiko Ueda, Zuiko Rikuhashi, Kentaro Hayashi, Hiroomi Hikawa:
Low-power wiring method in CMOS logics circuits by segmentation coding and pseudo majority voting. 590-593 - Boris Vaisband, Ioannis Savidis, Eby G. Friedman:
Thermal conduction path analysis in 3-D ICs. 594-597 - Kazunari Kato, Yasuhiro Takahashi
Two phase clocking subthreshold adiabatic logic. 598-601 - Kejun Wu, Hoda Pahlevanzadeh, Peng Liu, Qiaoyan Yu:
A new fault injection method for evaluation of combining SEU and SET effects on circuit reliability. 602-605
A3P-V: Power Conversion & Management
- Wei Fu, Ayman A. Fayed
Power conversion schemes in nanometer CMOS mixed-signal SoCs. 606-609 - Waleed Khalil, Jamin J. McCue, Brian Dupaix, Wagdy Gaber, Sami Smaili, Yehia Massoud:
On the design of RF-DACs for random acquisition based reconfigurable receivers. 610-613 - Hongcheng Xu, Matthias Lorenz, Ulrich Bihr, Jens Anders
Wide-band efficiency-enhanced CMOS rectifier. 614-617 - Fu-Sheng Pai, Shyh-Jier Huang, Chen-Wei Ku, Ying-Rong Chen, Bo-Ge Huang, Yu-Chie Lin:
Voltage equalization of lithium iron phosphate batteries cooperating with supercapacitors. 618-621 - Christoph Unterrieder, Michael Lunglmayr, Stefano Marsili, Mario Huemer:
Battery state-of-charge estimation prototype using EMF voltage prediction. 622-625 - Massimo Panella
A data driven circuit model for rechargeable batteries. 626-629
A4L-A: Special Session: Advanced Cell-culturing Platforms
- Ferran Reverter, Themistoklis Prodromakis
Design considerations for a CMOS Lab-on-Chip microheater array to facilitate the in vitro thermal stimulation of neurons. 630-633 - Emily Naviasky, Timir Datta-Chaudhuri
High resolution capacitance sensor array for real-time monitoring of cell viability. 634-637 - Lin Li, Andrew J. Mason:
Development of an integrated CMOS-microfluidic instrumentation array for high throughput membrane protein studies. 638-641 - Tatiana Trantidou, Tatiana Tariq, K. Pinto, Christofer Toumazou, Cesare M. Terracciano, Themistoklis Prodromakis
A lab-on-chip approach for monitoring the electrochemical activity of biorealistic cell cultures. 642-645 - Mohamed Amine Miled, Mohamad Sawan:
Reconfigurable Lab-on-Chip platform for algae cell manipulation. 646-649
A4L-B: Brain Computer Interface Technology
- Xilin Liu
The PennBMBI: A general purpose wireless Brain-Machine-Brain Interface system for unrestrained animals. 650-653 - Chih-Wei Feng, Ting-Kuei Hu, Jui-Chung Chang, Wai-Chi Fang:
A reliable brain computer interface implemented on an FPGA for a mobile dialing system. 654-657 - Jelena Dragas, David Jackel, Felix Franke
High-throughput hardware for real-time spike overlap decomposition in multi-electrode neuronal recording systems. 658-661 - Chi-Hsuan Hsieh, Hao-Ping Chu, Yuan-Hao Huang:
An HMM-based eye movement detection system using EEG brain-computer interface. 662-665 - Yuanqi Hu, Jiandong Li, Pantelis Georgiou
A SAR based calibration scheme for ISFET sensing arrays. 666-669
A4L-C: Sensors I
- Nizar Lajnef, Rigoberto Burgueño, Wassim Borchani, Shantanu Chakrabartty:
Sub-Hz self-powered sensing based on mechanical-buckling driven hot-electron injection. 670-673 - Takamoto Watanabe, Hirofumi Isomura:
All-digital ADC/TDC using TAD architecture for highly-durable time-measurement ASIC. 674-677 - Hadi Heidari
A current-mode CMOS integrated microsystem for current spinning magnetic hall sensors. 678-681 - Jae-Seung Lee, Dong-Hee Yeo, Sang-Soo Lee, Hye-Jung Kwon, Jae-Yoon Sim, Byungsub Kim, Hong-June Park:
A 0.4 V driving multi-touch capacitive sensor with the driving signal frequency set to (n+0.5) times the inverse of the LCD VCOM noise period. 682-685 - Christian Brandli, Lorenz Müller, Tobi Delbrück:
Real-time, high-speed video decompression using a frame- and event-based DAVIS sensor. 686-689
A4L-D: Wireless Circuits
- Sherif Ahmed Saleh Mohamed, Yiannos Manoli:
Design and implementation of an RF CMOS differential LNA for 403MHz applications. 690-693 - Darshak Bhatt, Jayanta Mukherjee, Jean-Michel Redoute
A high isolation linear folded mixer for WiFi applications. 694-697 - Eduardo Ortigueira, Luís Bica Oliveira
Experimental evaluation of wide range injection locking in a CMOS RC oscillator. 698-701 - Ying Guo, Long Chen, Tao Xia, Le Ye, Xing Zhang, Huailin Liao:
A UHF RFID reader transmitter with digital CMOS power amplifier. 702-705 - Yusuke Wachi, Takashi Kawamoto, Akira Maeki, Toru Masuda:
A low-power fully-integrated SP10T-RF-switch-IC. 706-709
A4L-E: Sigma-Delta Converters
- Xiao Liang Tan, Pak Kwong Chan, Uday Dasgupta:
An asynchronous sub-two-step quantizer for continuous-time sigma-delta modulators. 710-713 - Liang Zou, Udo Karthaus, Deepti Sukumaran, Nasser Mehrtash, Horst Wagner:
A 6th order, 700-1100 MHz, 3.6 Gb/s RF bandpass ΣΔ ADC with two-tone SFDR 67.2 dB in 65nm CMOS. 714-717 - Gerardo Molina Salgado, Gordana Jovanovic-Dolecek
Design considerations of bandpass CT ΣΔ modulators for software-defined-radio receivers. 718-721 - Ketan J. Pol, Hans Hegt, Arthur H. M. van Roermund, Sotir Ouzounov:
Limit cycle counting based smart background calibration of continuous time sigma delta ADCs. 722-725 - Shanthi Pavan:
Efficient estimation of noise and signal transfer functions of a continuous-time ΣΔ modulator. 726-729
A4L-F: Communication Circuits and Systems II
- YouZhe Fan, Chi-Ying Tsui
Low-latency MAP demapper architecture for coded modulation with iterative decoding. 730-733 - Guangjie Cai, Alan Pun, David Kwong, K. C. Wang:
A 2.4pJ/bit ASK demodulator with 100% modulation rate for 13.56MHz NFC/RFID applications. 734-737 - Jinesh P. Nair, Kiran Bynam, Young-Jun Hong, Joonseong Kang, Pradeep Dwarakanath, Manoj Choudhary:
Timing synchronization in super-regenerative receivers with a single quench cycle per symbol. 738-741 - Jing Jin, Bukun Pan, Xiaoming Liu, Jianjun Zhou
Digital spur calibration of multi-modulus fractional frequency LO divider utilizing most correlated comparison algorithm. 742-745 - Mahendra Sakare
A high-speed PRBS generator using flip-flops employing feedback for distributed equalization. 746-749
A4L-G: Media Content Recognition and Retrieval
- Joseph Santarcangelo, Xiao-Ping (Steven) Zhang:
Automatic age recommendation system for children's video content. 750-753 - Mohit Shah, Chaitali Chakrabarti, Andreas Spanias:
A multi-modal approach to emotion recognition using undirected topic models. 754-757 - Dongjoo Shin, Injoon Hong, Hoi-Jun Yoo:
An 1.92mW Feature Reuse Engine based on inter-frame similarity for low-power object recognition in video frames. 758-761 - Zuoxun Hou, Hongbo Zhu, Nanning Zheng, Tadashi Shibata:
A single-chip 600-fps real-time action recognition system employing a hardware friendly algorithm. 762-765 - Yu-Hsing Wu, Wei-Lin Ku, Wen-Hsiao Peng
Global image representation using Locality-constrained Linear Coding for large-scale image retrieval. 766-769
A4L-H: ASIC & Specialized VLSI Circuits
- Joan Mauricio
Radiation tolerant SPI-programmable delay line for high energy physics experiments. 770-773 - Victor Adrian, Cui Keer, Bah-Hwee Gwee
A Randomized Modulation scheme for filterless digital Class D audio amplifiers. 774-777 - Aijiao Cui, Wei Liang, Gang Qu:
A low-overhead dynamic watermarking scheme on scan design for easy authentication. 778-781 - Gordon W. Roberts:
Reducing the analog-digital productivity gap using time-mode signal processing. 782-785 - Che-Wei Chang, Man-Rong Chen, Po-Hsiang Hsu, Yi-Chang Lu
A pixel-based depth estimation algorithm and its hardware implementation for 4-D light field data. 786-789
A4L-J: Cross-Disciplinary Design Issues of VLSI and Emerging Technologies
- Ho Chuen Jackson Yeung, Evangeline F. Y. Young, Chiu-sing Choy:
Reducing pin count on cross-referencing Digital Microfluidic Biochip. 790-793 - Sami Smaili, Yehia Massoud:
Analytic modeling of memristor variability for robust memristor systems designs. 794-797 - Yingjie Lao, Keshab K. Parhi
Protecting DSP circuits through obfuscation. 798-801 - Neela Gopi, Jeffrey Draper:
Optimal techniques for assigning inter-tier signals to 3D-vias with path control in a 3DIC. 802-805 - Nahid M. Hossain, Masud H. Chowdhury:
Multilayer graphene nanoribbon floating gate transistor for flash memory. 806-809
A4L-K: Cryptography and Security for Communication Systems
- Moshe Avital, Alexander Fish
Secured Dual Mode Logic (DML) as a countermeasure against Differential Power Analysis. 810-813 - Jheng-Hao Ye, Szu-Han Huang, Ming-Der Shieh:
An efficient countermeasure against power attacks for ECC over GF(p). 814-817 - Kai Liao, Xiaoxin Cui, Nan Liao, Tian Wang, Xiao Zhang, Ying Huang, Dunshan Yu:
High-speed constant-time division module for Elliptic Curve Cryptography based on GF(2m). 818-821 - Kung Chi Cinnati Loi, Sen An, Seok-Bum Ko
FPGA implementation of low latency scalable Elliptic Curve Cryptosystem processor in GF(2m). 822-825 - Câncio Monteiro
An LSI implementation of a bit-parallel cellular multiplier over GF(24) using secure charge-sharing symmetric adiabatic logic. 826-829
A4L-L: Special Session: Resistance Memory
- Matthew J. Marinella:
Emerging resistive switching memory technologies: Overview and current status. 830-833 - Qing Wu, Beiye Liu, Yiran Chen, Hai Li
Bio-inspired computing with resistive memories - models, architectures and applications. 834-837 - Ru Huang, Yimao Cai, Yefan Liu, Wenliang Bai, Yongbian Kuang, Yangyuan Wang:
Resistive switching in organic memory devices for flexible applications. 838-841 - Zhiqiang Wei, Ryutaro Yasuhara, Koji Katayama, Takumi Mikawa, Takeki Ninomiya, Shunsaku Muraoka:
Quantitative method for estimating characteristics of conductive filament in ReRAM. 842-845 - Huaqiang Wu, Xinyi Li, Yue Bai, Ye Zhang, Minghao Wu, Zhiping Yu, He Qian:
Stack engineering for ReRAM devices performance improvement. 846-849 - Marko Noack, Markus Krause, Christian Mayr, Johannes Partzsch
VLSI implementation of a conductance-based multi-synapse using switched-capacitor circuits. 850-853 - Hesham Mostafa, Federico Corradi
A hybrid analog/digital Spike-Timing Dependent Plasticity learning circuit for neuromorphic VLSI multi-neuron architectures. 854-857 - Harshawardhan Ramachandran, Stefan Weber, Syed Ahmed Aamir, Elisabetta Chicca
Neuromorphic circuits for Short-Term Plasticity with recovery control. 858-861 - Runchun Wang, Tara Julia Hamilton
A compact reconfigurable mixed-signal implementation of synaptic plasticity in spiking neurons. 862-865
B1L-B: Wireless Circuit Technology for Bio-applications I
- Ikramullah Shah
Optical wireless receiver for data delivery to retinal implant. 866-869 - Tianyi Liu, Ulrich Bihr, Jens Anders
Performance evaluation of a low power optical wireless link for biomedical data transfer. 870-873 - Jhong-Ting Jian, Yu-Lin Song
A 0.6 V, 1.66mW energy harvester and audio driver for tympanic membrane transducer with wirelessly optical signal and power transfer. 874-877 - Parisa Behnamfar, Reza Molavi, Shahriar Mirabbasi:
Receiver design for CMUT-based super-resolution ultrasound imaging. 878-881 - Yusuke Shiino, Hiroyuki Ito, Taku Fujiwara, Noboru Ishihara, Hisashi Yamanouchi, Hiroki Tanabe, Satoshi Nomura, Toshifumi Konishi, Katsuyuki Machida, Kazuya Masu:
An ultra low power pH-monitoring IC with a duty-cycling wireless FM-transmitter. 882-885
B1L-C: Visual Signal Analysis and Assessment
- Tiecheng Song, Hongliang Li, Bing Zeng, Moncef Gabbouj
Texture classification using joint statistical representation in space-frequency domain with local quantized patterns. 886-889 - Ning Zheng
Incremental GMMSD2 with applications to feature extraction. 890-893 - Xiongkuo Min
Visual attention data for image quality assessment databases. 894-897 - Jinjian Wu, Weisi Lin, Guangming Shi, Long Xu:
Reduced-reference image quality assessment with local binary structural pattern. 898-901 - Simone Zezza, Guido Masera
A novel decoder architecture for error resilient JPEG2000 applications based on MQ arithmetic. 902-905 - Yonggen Liu, Chenchang Zhan, Wing-Hung Ki
Fast-transient-response high-PSR low-dropout regulator based on ultra-fast error amplifier and unity-gain buffer for portable applications. 906-909 - Cristina Azcona, Belén Calvo, Santiago Celma, Nicolás Medrano, Maria Teresa Sanz
Precision CMOS current reference with process and temperature compensation. 910-913 - Yi Huang, Li Zhu
A curvature-compensation technique based on the difference of Si and SiGe junction voltages for bandgap voltage circuits. 914-917 - Edward K. F. Lee:
A low voltage auto-reconfigured power-on-reset/bandgap reference circuit. 918-921 - Yi Huang, Li Zhu
A low temperature coefficient voltage reference utilizing BiCMOS compensation technique. 922-925 - Yeonam Yoon, Kyoungtae Lee
A purely-VCO-based single-loop high-order continuous-time ΣΔ ADC. 926-929 - Chongjun Ding, Yiannos Manoli, Matthias Keller:
A time-domain based multi-bit ADC for application in Delta-Sigma modulators. 930-933 - Yi Zhang, Chia-Hung Chen, Tao He, Xin Meng, Gabor C. Temes:
A continuous-time ΔΣ modulator with a digital technique for excess loop delay compensation. 934-937 - Maarten De Bock, Amir Babaie-Fishani, Pieter Rombouts:
Improved offline calibration for DAC mismatch in low OSR ΣΔ ADCs with distributed feedback. 938-941
B1L-E04 Improved Offline Calibration for DAC Mismatch in Low OSR Sigma-Delta ADCs
- Elbert Bechthum, Georgi I. Radulov, Joost Briaire, Govert Geelen, Arthur H. M. van Roermund:
A novel timing-error based approach for high speed highly linear Mixing-DAC architectures. 942-945 - Wei-Chung Chen, Kuei-Liang Lin, Ke-Horng Chen
A pseudo fixed switching frequency 2kHz/A in optimum on-time control buck converter with predicting correction technique for EMI solution. 946-949 - Kuan-I Wu, Shuo-Hong Hung, Shang-Yu Shieh, Bor-Tsang Hwang, Szu-Yao Hung, Charlie Chung-Ping Chen:
Current-mode adaptively hysteretic control for buck converters with fast transient response and improved output regulation. 950-953 - Zhuochao Sun
A Fixed-frequency hysteretic controlled buck DC-DC converter with improved load regulation. 954-957 - Mahmood J. Azhar, Selçuk Köse
An enhanced pulse width modulator with adaptive duty cycle and frequency control. 958-961 - Lin Cheng
A circuit-oriented geometrical approach in predicting subharmonic oscillation of dc-dc converters with voltage-mode control. 962-965
Digital Filter Design I
- Aimin Jiang
Efficient design of sparse FIR filters with optimized filter length. 966-969 - Wen Bin Ye, Ya Jun Yu:
A polynomial-time algorithm for the design of multiplierless linear-phase FIR filters with low hardware cost. 970-973 - Gang Li, Yong Ching Lim, Chaogeng Huang:
All-pass based robust low complexity structures for implementing recursive digital filters. 974-977 - Soo-Chang Pei, Yun-Chiu Lai:
Closed form variable fractional delay using FFT with transition band trade-off. 978-981 - Takao Hinamoto, Akimitsu Doi, Wu-Sheng Lu:
Jointly optimal error feedforward, high-order error feedback and realization for roundoff noise minimization in IIR digital filters. 982-985
Low Power Circuits I
- Xin Meng, Tao Wang, Gabor C. Temes:
A low-power parasitic-insensitive switched-capacitor integrator for Delta-Sigma ADCs. 986-989 - Babak Mohammadi, Joachim Neves Rodrigues:
A 65 nm single stage 28 fJ/cycle 0.12 to 1.2V level-shifter. 990-993 - Kan Wang
Post-floorplanning power optimization for MSV-driven application specific NoC design. 994-997 - Xinghua Yang, Fei Qiao, Chang Liu, Qi Wei, Huazhong Yang:
Design of multi-stage latency adders using detection and sequence-dependence between successive calculations. 998-1001 - Saravanan Kathiah, Sankaran Aniruddhan:
Replica bias scheme for efficient power utilization in high-frequency CMOS digital circuits. 1002-1005
VLSI for Communications
- Wei-Chang Liu, Fu-Chun Yeh, Chia-Yi Wu, Ting-Chen Wei, Ya-Shiue Huang, Shen-Jui Huang, Ching-Da Chan, Shyh-Jye Jou, Sau-Gee Chen:
An IEEE 802.15.3c/802.11ad compliant SC/OFDM dual-mode baseband receiver for 60 GHz Band. 1006-1009 - Jai Narayan Tripathi
Decoupling network optimization in high speed systems by mixed-integer programming. 1010-1013 - Debora Matos, Márcio Eduardo Kreutz, Cezar Reinbrecht, Luigi Carro, Altamiro Amadeu Susin:
Adaptive multiple switching strategy toward an ideal NoC. 1014-1017 - Dominik Auras, Rainer Leupers, Gerd Ascheid:
Efficient VLSI architectures for matrix inversion in soft-input soft-output MMSE MIMO detectors. 1018-1021 - Jun Lin, Zhiyuan Yan:
Efficient list decoder architecture for polar codes. 1022-1025
Nonlinear Circuits and Systems
- Liyun Zhao, Quanjun Wu, Jin Zhou:
Impulsive consensus for second-order multi-agent systems with a reference velocity and input delays. 1026-1029 - Harald Enzinger, Christian Vogel:
Analytical description of multilevel carrier-based PWM of arbitrary bounded input signals. 1030-1033 - Nikolaus Hammler, Yonina C. Eldar, Boris Murmann
Low-rate identification of memory polynomials. 1034-1037 - Nuwan Ganganath
An ACO-based off-line path planner for nonholonomic mobile robots. 1038-1041 - Kuntal Mandal
Dynamical behaviors of interconnected converters in intermediate bus architecture. 1042-1045
Special Session: Giga-Scale System Design Using Emerging Nonvolatile Memories
- Ken Takeuchi:
Hybrid solid-state storage system with storage class memory and NAND flash memory for big-data application. 1046-1049 - Yiqun Wang, Hongyang Jia, Yongpan Liu, Qing'an Li, Chun Jason Xue
Register allocation for hybrid register architecture in nonvolatile processors. 1050-1053 - Jun-Woo Jang, Sangsu Park, Yoon-Ha Jeong, Hyunsang Hwang:
ReRAM-based synaptic device for neuromorphic computing. 1054-1057 - Shimeng Yu
Orientation classification by a winner-take-all network with oxide RRAM based synaptic devices. 1058-1061 - Shimeng Yu
Design considerations of synaptic device for neuromorphic computing. 1062-1065 - Martin Ziegler, Mirko Hansen, Marina Ignatov, Hermann Kohlstedt:
Building memristive neurons and synapses. 1066-1069 - Massimiliano Di Ventra, Fabio L. Traversa, Fabrizio Bonani
Dynamic computing random access memory: A brain-inspired computing paradigm with memelements. 1070-1073 - Adrien F. Vincent, Jerome Larroque, Weisheng Zhao, Nesrine Ben Romdhane, Olivier Bichler, Christian Gamrat, Jacques-Olivier Klein
Spin-transfer torque magnetic memory as a stochastic memristive synapse. 1074-1077 - Patrick Sheridan, Wen Ma, Wei D. Lu
Pattern recognition with memristor networks. 1078-1081
B2L-B: Wireless Circuit Technology for Bio-applications II
- Seyed Abdollah Mirbozorgi, Hadi Bahrami
A low-power 2.4-GHz receiver for wireless implantable neural stimulators. 1082-1085 - Nan Zheng, Jaeyoung Kim
A low-power reconfigurable CMOS power amplifier for wireless sensor network applications. 1086-1089 - Edward K. F. Lee:
An integrated coil driver with discrete control and power efficient ASK modulation for transcutaneous power transmission. 1090-1093 - Bo Zhao, Huazhong Yang, Yong Lian
A novel quasi-static channel enhancing technique for body channel communication. 1094-1097 - Sherif Ahmed Saleh Mohamed, Yiannos Manoli:
A novel fully integrated low-power CMOS BPSK demodulator for medical implantable receivers. 1098-1101
B2L-C: Visual Signal Processing and Modeling
- Hangfan Liu
Non-local extension of total variation regularization for image restoration. 1102-1105 - Saboya Yang, Jiaying Liu
Segmentation-based scale-invariant nonlocal means super resolution. 1106-1109 - Zhouye Gu, Jianhua Zheng, Nam Ling, Philipp Zhang:
Simplified depth intra mode selection for 3D video compression. 1110-1113 - Zhihai Song, Ruiqin Xiong, Xiaopeng Fan, Siwei Ma, Wen Gao:
Transform domain energy modeling of natural images for wireless SoftCast optimization. 1114-1117 - Hsin-Fang Wu, Chia-Han Lee, V. Srinivasa Somayazulu
Error resilience for key frames in distributed video coding with rate-distortion optimized mode decision. 1118-1121
Nano-Electronics I
- Vita Pi-Ho Hu
Evaluation of Read- and Write-Assist circuits for GeOI FinFET 6T SRAM cells. 1122-1125 - Chua-Chin Wang, Chiang-Hsiang Liao, Sih-Yu Chen:
A single-ended disturb-free 5T loadless SRAM with leakage sensor and read delay compensation using 40 nm CMOS process. 1126-1129 - Ming-Long Fan, Vita Pi-Ho Hu
Investigation and optimization of monolithic 3D logic circuits and SRAM cells considering interlayer coupling. 1130-1133 - Yi-Wei Chen, Hao-Chiao Hong
A fast-locking all-digital phase locked loop in 90nm CMOS for Gigascale systems. 1134-1137 - Manodipan Sahoo
An ABCD parameter based modeling and analysis of crosstalk induced effects in Multilayer Graphene Nano Ribbon interconnects. 1138-1142
ADC II
- Hussein Adel, Marc Sabut, Roger Petigny, Marie-Minerve Louërat:
Split ADC digital background calibration for high speed SHA-less pipeline ADCs. 1143-1146 - Hani Esmaeelzadeh, Mohammad Sharifkhani, Mahdi Shabany:
A low-power 10-Bit 40-MS/s pipeline ADC using extended capacitor sharing. 1147-1150 - Kei Shiraishi, Daisuke Kurose, Masanori Furuta, Tetsuro Itakura:
A power supply noise cancellation scheme for a 2.24-GHz 6-bit current-steering DAC. 1151-1154 - Peijun Wang, Nan Sun:
A random DEM technique with minimal element transition rate for high-speed DACs. 1155-1158 - Matthias Lorenz, Timon Brückner, Rudolf Ritter, Jens Anders
A square root unscented Kalman filter for estimating DAC and loopfilter nonidealities in continuous-time sigma-delta modulators. 1159-1162
Smart Grids, Modelling and Power Converters
- Shyh-Jier Huang, Xian-Zong Liu, Wei-Fu Su, Shih-Chieh Tsai, Chao-Ming Liao:
Application of wolf group hierarchy optimization algorithm to fault section estimation in power systems. 1163-1166 - Shucheng Zhu, Cornelis Jan Kikkert, Nesimi Ertugrul:
A wide bandwidth, on-line impedance measurement method for power systems, based On PLC techniques. 1167-1170 - Mohammed Muthalib, Chika Nwankpa:
Dynamic building model for demand response. 1171-1174 - Nesrine Rebzani, Philippe Marty, Edith Clavel:
Influence of the conductor design on the temperature field in a high voltage gas insulated switchgear. 1175-1178 - Andoni Urtasun
RMS voltage control with harmonic compensation for parallel-connected inverters feeding non-linear loads. 1179-1182
Digital Filter Design II
- Jiajia Chen, Chip-Hong Chang
Design of programmable FIR filters using Canonical Double Based Number Representation. 1183-1186 - Rajib Lochan Das, Mrityunjoy Chakraborty:
A variable step-size zero attracting proportionate normalized least mean square algorithm. 1187-1190 - Md. Zulfiquar Ali Bhotto, M. Omair Ahmad, M. N. S. Swamy:
Orthogonal space time code based partial rank affine projection adaptive filtering algorithm. 1191-1194 - Yue Chen, Dongye Zhang, Zhiping Lin, Xiaoping Lai:
A sequential weighted least squares procedure for design of IIR filters and two-channel IIR filter banks. 1195-1198 - An-Kai Li, Sheau-Fang Lei, Wen-Kai Tsai, Shin-Chi Lai:
Fast algorithm and common structure design of recursive analysis and synthesis quadrature mirror filterbanks for digital radio mondiale. 1199-1202
Low Power Circuits II
- Riadul Islam, Matthew R. Guthaus:
Current-mode clock distribution. 1203-1206 - François Botman, Julien De Vos, Sebastien Bernard, François Stas, Jean-Didier Legat, David Bol:
Bellevue: A 50MHz variable-width SIMD 32bit microcontroller at 0.37V for processing-intensive wireless sensor nodes. 1207-1210 - Mika Kutila, Ari Paasio
Simulations on 130 nm technology 6T SRAM cell for Near-Threshold operation. 1211-1214 - Lih-Yih Chiou, Chi-Ray Huang, Ming-Hung Wu:
A power-efficient pulse-based in-situ timing error predictor for PVT-variation sensitive circuits. 1215-1218 - Sebastian Dietel, Sebastian Höppner, Holger Eisenreich, Georg Ellguth, Stefan Hänzsche, Stephan Henker, René Schüffny, Tim Brauninger, Ulrich Fiedler:
A compact on-chip IR-drop measurement system in 28 nm CMOS technology. 1219-1222
B2L-J: VLSI Programmable, Reconfigurable & Array Architecture
- Chongyan Gu, Julian P. Murphy, Máire O'Neill:
A unique and robust single slice FPGA identification generator. 1223-1226 - Todd E. Schmuland, Mohsin M. Jamali:
Generation of fixed-point VHDL MIMO-OFDM QR pre-processor for Spherical Detectors. 1227-1230 - Shengjia Shao, Shouyi Yin, Leibo Liu
Map-reduce inspired loop parallelization on CGRA. 1231-1234 - Heejun Shim, Soojung Ryu:
Simulation-based memory dependence checker for CGRA-mapped code verification. 1235-1238
Modeling and Simulation of Nonlinear Circuits
- Tze Hon Tan
Remote dynamically reconfigurable platform using NetFPGA. 1239-1242 - Panagiotis Giounanlis
Sigma - Delta inspired control technique for the improvement of MEMS reliability. 1243-1246 - Eoghan O'Riordan, Elena Blokhina
Modelling and analysis of vibration energy harvesters with charge pump conditioning circuits. 1247-1250 - Michael Popp, Tina Thiessen, Christoph Zorn, Wolfgang Mathis
On the functionality of RTD MOBILE circuits - A geometric approach. 1251-1254 - Zbigniew Galias
On zero-order holder discretization of delayed sliding mode control systems. 1255-1258 - Weiran Cai, Ronald Tetzlaff
Beyond series and parallel: Coupling as a third relation in memristive systems. 1259-1262
Special Session: Probing Complex Real-life Systems with Complex Networks
- Michael Small
How is that complex network complex? 1263-1266 - Pei Wang
Identification of important nodes in artificial bio-molecular networks. 1267-1270 - Xiaofan Wang, Xiaoling Wang:
Consensus of edge dynamics on complex networks. 1271-1274 - David M. Walker
Examining overlapping community structures within grain property networks. 1275-1278
DSP Applications
- Wu-Sheng Lu, Takao Hinamoto:
Design of projection matrix for compressive sensing by nonsmooth optimization. 1279-1282 - Sanmati Kamath, Shashank Dabral, Jagadeesh Sankaran, Brian Valentine, Branislav Kisacanin
Implementation details of mid-level vision on the Embedded Vision Engine (EVE). 1283-1287 - Hamidreza Sadreazami, M. Omair Ahmad, M. N. S. Swamy:
Contourlet domain image modeling by using the alpha-stable family of distributions. 1288-1291 - Jian-Feng Gu, Wei-Ping Zhu
Fast and accurate 2-D DOA estimation via sparse L-shaped array. 1292-1295 - Alexandre Mercat, Jean-François Nezan, Daniel Ménard, Jinglin Zhang:
Implementation of a Stereo Matching algorithm onto a Manycore Embedded System. 1296-1299 - Ettore Napoli, Mauro D'Arco
FPGA based system for the generation of noise with programmable power spectrum. 1300-1303 - Simran Singh, Michael Epp, Georg Vallant, Mikko Valkama
A blind frequency response mismatch correction algorithm for 4-channel Time-Interleaved ADC. 1304-1307 - Xin Lou, Ya Jun Yu, Pramod Kumar Meher:
High-speed multiplier block design based on bit-level critical path optimization. 1308-1311 - Yi-Fan Chang, Jian-Jiun Ding, Hao Hu, Wen-Chieh Yang, Kwan-Hwa Lin, Po-Hung Wu:
A real-time detection algorithm for freezing of gait in Parkinson's disease. 1312-1315
Data Convertors II
- Yung-Hui Chung:
Perturbation-based digital background calibration technique for pipelined ADCs. 1316-1319 - Mike Bichan, Dustin Dunwell, Qiwei Wang, Anthony Chan Carusone
A passive resonant clocking network for distribution of a 2.5-GHz clock in a flash ADC. 1320-1323 - Ping Lu, Pietro Andreani:
A 1-1 MASH 2-D vernier time-to-digital converter with 2nd-order noise shaping. 1324-1327 - Yu-Hsuan Kang, Chin-Yu Lin, Tai-Cheng Lee:
A 20-MHz BW 75-dB SFDR shifted-averaging VCO-based ΔΣ modulator. 1328-1331 - Yohei Nakamura, Takashi Oshima
A 1-GS/s 11.5-ENOB time-interleaved ADC with fully digital background calibration. 1332-1335
Data Convertors III
- Manzur Rahman, Long Chen, Nan Sun:
Algorithm and implementation of digital calibration of fast converging Radix-3 SAR ADC. 1336-1339 - João L. A. de Melo, Fábio Querido, Nuno Paulino
A 0.4-V 410-nW opamp-less continuous-time ΣΔ modulator for biomedical applications. 1340-1343 - Blazej Nowacki, Nuno Paulino
A low power 4th order MASH switched-capacitor ΣΔ modulator using ultra incomplete settling. 1344-1347 - Da Feng, Franco Maloberti, Sai-Weng Sin
Jitter-resistant Capacitor Based Sine-Shaped DAC for Continuous-Time Sigma-Delta modulators. 1348-1351 - Yao-Ping Liu, Chao Yuan, Yvonne Lam Ying Hung:
A capacitor constructed bypass window switching scheme for energy-efficient SAR ADC. 1352-1355
Amplifiers and RF Circuits
- María de Rodanas Valero Bernal
Rail-to-rail CMOS complementary input stage with alternating active differential pairs. 1356-1359 - Hugo Cruz
Analysis and design of a 1.3-mW current-reuse RF front-end for the MICS band. 1360-1363 - José María Algueta-Miguel, Antonio J. López-Martín
CMOS op-amps for biomedical applications. 1364-1367 - Gaurav Agrawal, Sankaran Aniruddhan, Radha Krishna Ganti
Multi-band RF time delay element based on frequency translation. 1368-1371 - Eduardo Ortigueira, Taimur Gibran Rabuske
Quadrature relaxation oscillator with FoM of -165 dBc/Hz. 1372-1375 - Ming-Jhe Zeng, Ren-Yuan Huang, Ro-Min Weng:
A 0.8V 8GHz low power sub-harmonic self-oscillating mixer. 1376-1379
Novel Bio-medical Circuits
- Paul Jung-Ho Lee, Denis Guangyin Chen, Amine Bermak
A high voltage zero-static current voltage scaling ADC interface circuit for micro-stimulator. 1380-1383 - Malaykumar Shah, Jayaraj Joseph
Vascular compliance probe with integrated ECG for image-free evaluation of arterial stiffness. 1384-1387 - Ermis Koutsos, Pantelis Georgiou
An analogue instantaneous median frequency tracker for EMG fatigue monitoring. 1388-1391 - Kuen-Chih Lin, Jui-Chieh Liao, Wai-Chi Fang:
A highly integrated biomedical multiprocessor SoC design for a wireless bedside monitoring system. 1392-1395 - Yuning Yang, Andrew J. Mason:
Optimization of nonlinear energy operator based spike detection circuit for high density neural recordings. 1396-1399
Wireless Technology for Bio-applications
- Samar Alsaegh, Sherif Ahmed Saleh Mohamed, Yiannos Manoli:
Design of 1mWCMOS OOK super-regenerative receiver for 402-405MHz medical applications. 1400-1403 - Xing Li, Yan Lu
An adaptive wireless powering and data telemetry system for optic nerve stimulation. 1404-1407 - Fabián Leonardo Cabrera
A CMOS fully-integrated wireless power receiver for autonomous implanted devices. 1408-1411 - Quinn Brogan, Thomas O'Connor, Dong Sam Ha:
Solar and thermal energy harvesting with a wearable jacket. 1412-1415
Nano-Electronics III
- Odysseas Zografos, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
Novel grid-based power routing scheme for regular controllable-polarity FET arrangements. 1416-1419 - Anne Siemon, Stephan Menzel
Simulation of TaOx-based complementary resistive switches by a physics-based memristive model. 1420-1423 - Yuji Obi, Takahide Oya
Novel single-electron information-processing circuits mimicking behavior of ant groups. 1424-1427 - Qingjiang Li, Ali Khiat, Iulia Salaoru
Origin of stochastic resistive switching in devices with phenomenologically identical initial states. 1428-1431 - Aras Pirbadian, Muhammad S. Khairy, Ahmed M. Eltawil
State dependent statistical timing model for voltage scaled circuits. 1432-1435
Computer-Aided Network Design III
- Masashi Shio, Masao Yanagisawa, Nozomu Togawa
Linear and bi-linear interpolation circuits using selector logics and their evaluations. 1436-1439 - Yanfeng Li, Ni Xu, Woogeun Rhee
A 2.5GHz ADPLL with PVT-insensitive ΔΣ dithered time-to-digital conversion by utilizing an ADDLL. 1440-1443 - Quan Zhou, Junying Hu, Qiang Zhou:
An effective iterative density aware detailed placement algorithm. 1444-1447 - Mineo Kaneko, Yutaka Tsuboishi:
Constrained binding and scheduling of triplicated algorithm for fault tolerant datapath synthesis. 1448-1451 - Felipe S. Marranghello, André Inácio Reis, Renato P. Ribas:
CMOS inverter analytical delay model considering all operating regions. 1452-1455
Computer-Aided Network Design IV
- Levent Aksoy
ECHO: A novel method for the multiplierless design of constant array vector multiplication. 1456-1459 - Mika Fujishiro, Masao Yanagisawa, Nozomu Togawa
Scan-based attack on the LED block cipher using scan signatures. 1460-1463 - Ghaith Bany Hamad, Syed Rafay Hasan, Otmane Aït Mohamed, Yvon Savaria:
Abstracting Single Event Transient characteristics variations due to input patterns and fan-out. 1468-1471 - Moo-Kyoung Chung, Jun-Kyoung Kim, Soojung Ryu:
SimParallel: A high performance parallel SystemC simulator using hierarchical multi-threading. 1472-1475
B4P-Q: Circuits & Systems for Communications I
- Yang Xiao, Pengpeng Lan, Dong Wang:
A novel secure MIMO cognitive network. 1476-1479 - Li-Wei Chu, Chun-Yu Lin
ESD protection design for wideband RF applications in 65-nm CMOS process. 1480-1483 - Ilias Sourikopoulos
A decision feedback equalizer with channel-dependent power consumption for 60-GHz receivers. 1484-1487 - Seok Kim, Jung-Myung Kang, Xuefan Jin
A 12.5-Gb/s near-GND transceiver for wire-line UHD video interfaces. 1488-1491 - Gyu-Seob Jeong, Hankyu Chi, Kyungock Kim, Deog-Kyoon Jeong:
A 20-Gb/s 1.27pJ/b low-power optical receiver front-end in 65nm CMOS. 1492-1495 - Raafat Lababidi, Frédéric Le Roy, Ali Mansour, Bernard Jarry, Ali Louzir:
Highly flexible active notch filter for Cognitive Radio. 1496-1499
Circuits & Systems for Communications II
- Nitin Gupta, Tapas Nandy, Paramjeet Singh Sahni, Manish Garg, Jai Narayan Tripathi
Zero power 4.95Gbps HDMI transmitter. 1500-1503 - Ryosuke Fujiwara, Masayuki Miyazaki, Makoto Katagishi:
Low-latency wireless LAN system using polling-based MAC. 1504-1507 - Kuei-Cheng Lin, Hwann-Kaeo Chiou, Po-Chang Wu, Hann-Huei Tsai, Ying-Zong Juang:
5-GHz SiGe linearity power amplifier using integrated feedforward architecture for WLAN applications. 1508-1511 - Mohamed Ibrahim, Bin Yang:
A theoretical study of the statistical and spectral properties of polar transmitter signals. 1512-1515 - Mohamed Hamouda, Georg Fischer
A 20-Gbps low jitter analog clock recovery circuit for ultra-wide band Radio systems. 1516-1519
VLSI Programmable Array and Signal Processing Circuits
- Ramy N. Tadros, Abdelrahman H. Elsayed, Maged Ghoneima, Yehea I. Ismail:
A variation tolerant driving technique for all-digital self-timed 3-level signaling high-speed SerDes transceivers for on-chip networks. 1520-1523 - Ediz Cetin
Reconfiguration network design for SEU recovery in FPGAs. 1524-1527 - Yuki Kamikubo, Minoru Watanabe, Shoji Kawahito:
Image recognition system using an optical Fourier transform on a dynamically reconfigurable vision architecture. 1528-1531
VLSI Datapath & Arithmetic Circuits II
- Anh-Tuan Hoang, Tetsushi Koide, Masaharu Yamamoto, Mutsumi Omori:
Pipeline scanning architecture with computation reduction for rectangle pattern matching in real-time traffic sign detection. 1532-1535 - Masoud Sadeghian, James E. Stine
Optimized cubic chebyshev interpolator for elementary function hardware implementations. 1536-1539 - Chip-Hong Chang
Area-efficient and fast sign detection for four-moduli set RNS {2n -1, 2n, 2n +1, 22n +1}. 1540-1543 - Madhu Vasudevan, Chaitali Chakrabarti:
Image processing using approximate datapath units. 1544-1547 - Victor Adrian, Yin Sun, Joseph Sylvester Chang:
Design of a 5 GS/s fully-digital digital-to-analog converter. 1548-1551
Neural Networks and Systems II
- Zhilu Chen, Jing Wang, Haibo He, Xinming Huang:
A fast deep learning system using GPU. 1552-1555 - Taras Iakymchuk, Alfredo Rosado
An AER handshake-less modular infrastructure PCB with x8 2.5Gbps LVDS serial links. 1556-1559 - Chih-Chieh Hsu, Alice C. Parker:
A biomimetic nanoelectronic neuron with enhanced spike timing. 1560-1563 - Runchun Wang, Tara Julia Hamilton
A generalised conductance-based silicon neuron for large-scale spiking neural networks. 1564-1567 - Gwendal Lecerf, Jean Tomas, Soren Boyn
Silicon neuron dedicated to memristive spiking neural networks. 1568-1571
Neural Networks and Systems III
- Liang Zhou
A 7-transistor-per-cell, high-density analog storage array with 500µV update accuracy and greater than 60dB linearity. 1572-1575 - Przemyslaw Mroszczyk, Piotr Dudek:
The accuracy and scalability of continuous-time Bayesian inference in analogue CMOS circuits. 1576-1579 - Stephen J. Carey, Ákos Zarándy, Piotr Dudek:
Characterization of processing errors on analog fully-programmable cellular sensor-processor arrays. 1580-1583 - Ari Paasio
CheckerBoard binary CNN core. 1584-1587 - Ryusuke Nebashi, Noboru Sakimura, Hiroaki Honjo
A delay circuit with 4-terminal magnetic-random-access-memory device for power-efficient time- domain signal processing. 1588-1591
B5L-A: Special Session: Efficient Comb-Based Decimation Filters for High- Performance Sigma-Delta Converters
- Gerardo Molina Salgado, Gordana Jovanovic-Dolecek
An overview of decimator structures for efficient sigma-delta converters: Trends, design issues and practical solutions. 1592-1595 - Alp Kiliç, Delaram Haghighitalab, Habib Mehrez, Hassan Aboushady
Low-power comb decimation filter for RF Sigma-Delta ADCs. 1596-1599 - Fredric J. Harris:
Reduce energy requirements by coupling a poly-phase pre-filter and cic filter in high-performance Sigma-Delta A/D converters. 1600-1603 - Jeffrey O. Coleman:
Integer-coefficient FIR filter sharpening for equiripple stopbands and maximally flat passbands. 1604-1607
B5L-B: Novel Bio-medical Technology
- Arnaldo Mendez, Mohamad Sawan:
A custom signal processor based neuroprosthesis intended to recover urinary bladder functions. 1608-1611 - Christian Brendler, Naser Pour Aryan, Viola Rieger, Albrecht Rothermel:
Closed loop inverse load modulation power control by magnetic field diminishment in inductively powered biomedical implants. 1612-1615 - Hussein Al-Azzawi, Hong Huang, Satyajayant Misra, Wei Tang
On using compressed sensing for efficient transmission & storage of electric organ discharge. 1616-1619 - Kenji Aono
Monitoring of repeated head impacts using time-dilation based self-powered sensing. 1620-1623
B5L-C: Integrated Power Circuits and Systems
- Yousr Ismail, Chih-Kong Ken Yang:
A compact stacked-device output driver in low-voltage CMOS Technology. 1624-1627 - Inna Vaisband
Computationally efficient clustering of power supplies in heterogeneous real time systems. 1628-1631 - Yingbo Zhao, Yintang Yang, Kaushik Mazumdar, Xinfei Guo
A multi-output on-chip switched-capacitor DC-DC converter for near- and sub-threshold power modes. 1632-1635 - Hugo B. Goncalves, Jorge R. Fernandes
An Efficient RF power harvester for low input power with reduced dead-zone. 1636-1639 - Hao Gao, Marion K. Matters-Kammerer, Pieter Harpe, Dusan M. Milosevic, Arthur H. M. van Roermund, Jean-Paul M. G. Linnartz
A 60-GHz energy harvesting module with on-chip antenna and switch for co-integration with ULP radios in 65-nm CMOS with fully wireless mm-wave power transfer measurement. 1640-1643
Nano-Electronics II
- Omid Kavehei
Highly scalable neuromorphic hardware with 1-bit stochastic nano-synapses. 1648-1651 - Ran Xiao, Chunhong Chen:
Implementation of the conscience mechanism using single-electron transfer in competitive learning. 1652-1655 - Arne Heittmann, Tobias G. Noll:
Variability analysis of a hybrid CMOS/RS nanoelectronic calibration circuit. 1656-1659 - Xifan Tang, Jian Zhang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli:
TSPC Flip-Flop circuit design with three-independent-gate silicon nanowire FETs. 1660-1663
Analog Design Techniques
- Sally Safwat, Rinkle Jain, Dawson Kesling:
A staircase conductance modulation scheme for input-current-shaping in switched-capacitor DC-DC converters. 1664-1667 - Yao Liu, Edoardo Bonizzoni, Franco Maloberti:
A 2+1 multi-bit incremental architecture using Smart-DEM algorithm. 1668-1671 - Hugo Serra
A top-down optimization methodology for SC filter circuit design. 1672-1675 - Josef Dobes, Jan Divin, Jiri Svaton, Frantisek Vejrazka:
Using the sensitivity analysis of the noise spectral density and the sensitivity analysis of the noise figure for practical circuit design. 1676-1679 - Chamith Wijenayake
Hexagonal multi-beam analog RF aperture array. 1680-1683
MIMO System
- Jienan Chen, Lian Huai, Jianhao Hu, Gerald E. Sobelman:
High performance MIMO detector based on bidirectional path preserving trellis search. 1684-1687 - Chung-An Shen, Muhammad S. Khairy, Ahmed M. Eltawil
Low power reduced-complexity error-resilient MIMO detector. 1688-1691 - Ji-Hwan Yoon, Dongyeob Shin, Jongsun Park
A low-complexity composite QR decomposition architecture for MIMO detector. 1692-1695 - Thi Hong Tran, Hiroshi Ochi, Yuhei Nagao:
A 4 × 4 multiplier-divider-less K-best MIMO decoder up to 2.7 Gbps. 1696-1699 - Hemanth Prabhu, Ove Edfors
Hardware efficient approximative matrix inversion for linear pre-coding in massive MIMO. 1700-1703
DSP for Communication
- Qiuzhen Lin
An improved iterative decoding scheme based on error-resistant arithmetic code. 1704-1707 - Chih-Hung Kuo, Ping Ma, Chi-Fang Chang:
Band-selective estimation for IQ-imbalance and carrier frequency offset in OFDM systems. 1708-1711 - Yanjie Peng, Andrew G. Klein
Hybrid DFSF-BP equalization for ATSC DTV receivers. 1712-1715 - Yanjie Peng, Xinming Huang:
Performance comparison of hybrid partial response detectors over frequency-selective fading channels. 1716-1719 - Saman S. Abeysekera:
Efficient estimation of a sequence of frequencies for M-ary CPFSK demodulation. 1720-1723
Low-Power Logic & Architectures
- Masaki Hamamoto, Masanao Yamaoka:
An energy-efficient parallel-processing method based on master-hibernating DVFS. 1724-1727 - Yan Li, Jianhao Hu:
Extensional design for noise-tolerate MRF standard cells via global mapping. 1728-1731 - David E. Bellasi, Riccardo Rovatti
An architecture for low-power compressed sensing and estimation in wireless sensor nodes. 1732-1735 - Hoyoung Kim, Soojung Ryu, Abhishek A. Sinkar, Nam Sung Kim:
Quantitative comparison of the power reduction techniques for samsung reconfigurable processor. 1736-1739
Testing & Other Areas in VLSI
- Gregory J. Y. Lin, Chienbo B. Hsu, James B. Kuo:
Critical-path aware power consumption optimization methodology (CAPCOM) using mixed-VTH cells for low-power SOC designs. 1740-1743 - Nastaran Nemati, Mark C. Reed, Michael R. Frater:
Asynchronous test hardware for Null Convention Logic. 1744-1747 - Thian Fatt Tay, Chip-Hong Chang
A new algorithm for single residue digit error correction in Redundant Residue Number System. 1748-1751 - Reza Ghanaatian, Mahdi Shabany, Mohammad Sharifkhani:
An efficient high-throughput LSI architecture for a synchronization block applied to real-time optical OFDM systems. 1752-1755 - Ching-Wen Lin, Chung-Ho Chen:
Unambiguous I-cache testing using software-based self-testing methodology. 1756-1759 - Ling Kim Loo, Chia Yee Ooi, V. Y. Liew, Yuan Wen Hau
Packet logging mechanism for adaptive online fault detection on Network-on-Chip. 1760-1763
Oscillators and Phase-locked Loops
- Mohammad Alhawari
A clockless, multi-stable, CMOS analog circuit. 1764-1767 - Zhanjun Bai, Xing Zhou, Ralph Mason:
A novel Injection Locked Rotary Traveling Wave Oscillator. 1768-1771 - Florian De Roose, Valentijn De Smedt
Design of a frequency reference based on a PVT-independent transmission line delay. 1772-1775 - Supeng Liu, Yuanjin Zheng, Xiaofeng He:
Design of a wideband low power FMCW synthesizer in 65 nm CMOS for radar applications. 1776-1779 - Takuya Nishimoto, Yoko Uwate, Yasuteru Hosokawa, Yoshifumi Nishio
N-phase synchronization of asymmetric attractors in a ring of coupled chaotic circuits. 1780-1783
Special Session: Analysis, Synchronization & Control of Complex Networks: Theory & Applications
- Yujian Pan, Xiang Li
Towards a graphic tool of structural controllability of temporal networks. 1784-1787 - Russell Jeter
Dynamical networks with on-off stochastic connections: Beyond fast switching. 1788-1791 - Yang Li, Wenwu Yu, Guanghui Wen
Observer design for consensus of general fractional-order multi-agent systems. 1792-1795 - Daniel Alberto Burbano
Consensus and synchronization of complex networks via proportional-integral coupling. 1796-1799 - Tsuyoshi Hasegawa, Tohru Tsuruoka, Masakazu Aono:
Volatile and nonvolatile selective operation of a two-terminal gap-type atomic switch. 1800-1803
C2L-A: Special Session: Applications of Advanced Nolinear System Theory to Smart Grids
- Chika O. Nwankpa, Juan C. Jiménez, Sachi Jayasuriya:
Nonlinear analysis of multi-converter power systems for microgrids. 1804-1807 - Hsiao-Dong Chiang, Tian-Qi Zhao, Jiao-Jiao Deng, Kaoru Koyanagi:
Convergence/divergence analysis of implicit Z-bus power flow for general distribution networks. 1808-1811 - Lingwen Gan, Steven H. Low:
Chordal relaxation of OPF for multiphase radial networks. 1812-1815 - Maxim Markov, Mehdi Saghafi, Ian A. Hiskens, Harry Dankowicz
Continuation techniques for reachability analysis of uncertain power systems. 1816-1819 - Lin-Yu Lu, Chia-Chi Chu
Robust consensus-based droop control for multiple power converters in isolated micro-grids. 1820-1823
C2L-B: Novel Medical Diagnostic Method I
- Julien Ghaye, Chiara Succa, Danilo Demarchi
Quantitative estimation of biological cell surface receptors by segmenting conventional fluorescence microscopy images. 1824-1827 - Ankur Sarker, Hafiz Md. Hasan Babu, Md. Saiful Islam
A novel approach to perform reversible addition/subtraction operations using deoxyribonucleic acid. 1828-1831 - Melpomeni Kalofonou
An ISFET based analogue ratiometric method for DNA methylation detection. 1832-1835 - Pranab Roy, Aatreyi Bal, Mahua Raha Patra, Hafizur Rahaman
Automated two stage detection and analyzer system in multipartitioned Digital Microfluidic Biochips. 1836-1840 - Tang-Hsuan Wang, Po-Tsang Huang, Kuan-Neng Chen
Energy-efficient configurable discrete wavelet transform for neural sensing applications. 1841-1844
C2L-C: Sensors II
- Wongyu Shin, Seungwook Paek, Lee-Sup Kim:
An area-efficient on-chip temperature sensor with nonlinearity compensation using injection-locked oscillator (ILO). 1845-1848 - Timothy York, Viktor Gruev, Debajit Saha, Baranidharan Raman
A 220 × 128 120 mW 60 frames/s current mode polarization imager for in vivo optical neural recording. 1849-1852 - Chetan Singh Thakur, Tara Julia Hamilton
FPGA implementation of the CAR Model of the cochlea. 1853-1856 - Satoshi Yoshizaki, Alexantrou Serb
Octagonal CMOs image sensor with strobed RGB LED illumination for wireless capsule endoscopy. 1857-1860 - Andrew Berkovich, Pamela Abshire:
A low-light SPAD vision array. 1861-1864
C2L-D: Interface Circuits
- Hirokatsu Shirahama, Akira Mochizuki, Yuma Watanabe, Takahiro Hanyu:
Energy-aware current-mode inter-chip link for a dependable GALS NoC platform. 1865-1868 - Yoonsoo Kim, Woo-Rham Bae
A 10-Gb/s 6-Vpp differential modulator driver in 65-nm CMOS. 1869-1872 - Hsi-En Liu, Shih-Che Hung, Chih-Wen Lu, Tsin-Yuan Chang:
A low-power Spread Spectrum Clock Generator with an embeddable half-integer division ratio interpolator. 1873-1876 - Ming Zhang, Nicolas Llaser, X. Wang, D. Ibrahima:
Exploiting a micro Pirani gauge for multifonction. 1877-1880
C2L-E: Amplifiers
- Luis Henrique de Carvalho Ferreira
A 60-dB Gain OTA operating at 0.25-V power supply in 130-nm digital CMOS process. 1881-1884 - Maruf N. Ahmed, Joseph Chong, Dong Sam Ha:
A 100 Gb/s transimpedance amplifier in 65 nm CMOS technology for optical communications. 1885-1888 - Wei Wang, Zushu Yan, Pui-In Mak
Micropower two-stage amplifier employing recycling current-buffer Miller compensation. 1889-1892 - Pinar Basak Basyurt, Devrim Yilmaz Aksin
Sampled-data operational-amplifier with ultra-low supply voltage and sub µW power consumption. 1893-1896 - Cheng-Ta Chan, Oscal T.-C. Chen:
Inductor-less bandwidth-extension technique applied to CMOS differential trans-impedance amplifier. 1897-1900
C2L-F: UWB Communication IC
- Dang Liu, Shuli Geng, Woogeun Rhee
A high efficiency robust IR-UWB receiver design for high data rate CM-range communications. 1901-1904 - Marco Crepaldi
A non-coherent IR-UWB receiver for high sensitivity short distance estimation. 1905-1908 - Vincenzo Chironi, Stefano D'Amico
A SAW-less dual-band RF front-end for IR-UWB receiver in 65nm CMOS. 1909-1912 - Yang-Guo Li, Mohammad Rafiqul Haider, Yehia Massoud:
An efficient orthogonal pulse set generator for high-speed sub-GHz UWB communications. 1913-1916
C2L-G: High-Efficiency Video Coding
- Yonggen Ling
Photo album compression By leveraging temporal-spatial correlations and HEVC. 1917-1920 - Je-Won Kang, Ying Chen, Li Zhang, Marta Karczewicz:
Low complexity Neighboring Block based Disparity Vector Derivation in 3D-HEVC. 1921-1924 - Ruhan A. Conceição
Power efficient and high troughtput multi-size IDCT targeting UHD HEVC decoders. 1925-1928 - Yi-Ching Ting, Tian-Sheuan Chang
Gradient-based PU size selection for HEVC intra prediction. 1929-1932 - Lin Sun
Rate distortion modeling and adaptive rate control scheme for high efficiency video coding (HEVC). 1933-1936
C2L-H: Memory Circuits and Architectures I
- Jingyu Deng, Yun Liang, Guojie Luo, Guangyu Sun:
Rapid design space exploration of two-level unified caches. 1937-1940 - Achiranshu Garg, Tony Tae-Hyoung Kim:
Design of SRAM PUF with improved uniformity and reliability utilizing device aging effect. 1941-1944 - Sumeet S. Kumar, Rene van Leuken:
Improving data cache performance using Persistence Selective Caching. 1945-1948 - ChihYang Huang, Hongchin Lin
High-voltage tolerant circuit design for fully CMOS compatible multiple-time programmable memories. 1949-1952 - Taehui Na
High-performance low-power magnetic tunnel junction based non-volatile flip-flop. 1953-1956
C2L-J: SOC, Multicore & Hardware-Software Codesign I
- Navonil Chatterjee
A spare router based reliable Network-on-Chip design. 1957-1960 - Yuang Zhang, Li Li, Zhonghai Lu, Axel Jantsch
Performance and network power evaluation of tightly mixed SRAM NUCA for 3D Multi-core Network on Chips. 1961-1964 - Edson I. Moreno, Thais Webber
A monitored NoC with runtime path adaptation. 1965-1968 - Harald Kroll, Stefan Zwicky, Reto Odermatt, Lukas Bruderer, Andreas Burg
A signal processor for Gaussian message passing. 1969-1972 - Ruizhe Wu, Dan Zhao:
Load adaptive multi-channel distribution and arbitration in unequal RF interconnected WiNoC. 1973-1976
C2L-K: Circuits and Systems for Energy Harvesting
- Antônio Carlos M. de Queiroz, Mayli Silva de Souza:
Batteryless electrostatic energy harvester and control system. 1977-1980 - Golsa Moayeri Pour, Walter D. Leon-Salas:
Solar energy harvesting with light emitting diodes. 1981-1984 - Gyouho Kim, Adriane Wolfe, Richard Bell, Suyoung Bang, Yoonmyung Lee
Chip-on-mud: Ultra-low power ARM-based oceanic sensing system powered by small-scale benthic microbial fuel cells. 1985-1988 - Cheng-Han Hsieh, Chung-Yen Du, Shuenn-Yuh Lee:
Power management with energy harvesting from a headphone jack. 1989-1992 - Ying-Khai Teh, Philip K. T. Mok
A piezoelectric energy harvesting interface circuit using one-shot pulse transformer boost converter based on water bucket fountain strategy. 1993-1996
C2L-L: Special Session: Complexity in Heterogeneous Systems on Chip: Analysis and Design Techniques
- Dimitri Galayko, Elena Blokhina
Complexity in heterogeneous systems on chips: Dsign and analysis challenges. 1997-2000 - Adem Coskun
The design of low complexity low power pipelined short length Winograd Fourier transforms. 2001-2004 - Yoko Uwate, Yoshifumi Nishio
Effectiveness of artificial neural network with time-varying coupling system. 2005-2008 - Timir Datta-Chaudhuri
System-on-chip considerations for CMOS fluidic and biointerface applications. 2009-2012 - Morgan Madec
Opportunities and challenges for the virtual prototyping of synthetic biological functions. 2013-2016
C2L-M: CAS-FEST Special Session on Modeling of Resistive/memristive Switching Devices
- Shimeng Yu
Overview of resistive switching memory (RRAM) switching mechanism and device modeling. 2017-2020 - Blanka Magyari-Köpe, Liang Zhao, Yoshio Nishi, Katsumasa Kamiya, Moon Young Yang, Kenji Shiraishi:
Ab initio modeling of resistive switching mechanism in binary metal oxides. 2021-2024 - Stephan Menzel:
Modeling and simulation of electrochemical metallization memory cells. 2025-2028 - Stefano Ambrogio, Simone Balatti, Antonio Cubeta, Daniele Ielmini:
Statistical modeling of program and read variability in resistive switching devices. 2029-2032 - Radu Berdan, Ali Khiat, Christos Papavassiliou, Themistoklis Prodromakis
Qualitative SPICE modeling accounting for volatile dynamics of TiO2 memristors. 2033-2036
C3l-A: Special Session: Circuital Aspects of Emergent Application Driven Wireless Power Transfer Systems
- Elisenda Bou-Balust, Raymond Sedwick
Advances in non-radiative resonant inductive coupling wireless Power Transfer: A comparison of alternative circuit and system models driven by emergent applications. 2037-2040 - Vamsi Talla, Joshua R. Smith:
An experimental technique for design of practical Wireless Power Transfer systems. 2041-2044 - Benjamin H. Waters, Brody J. Mahoney, Gunbok Lee, Joshua R. Smith:
Optimal coil size ratios for wireless power transfer applications. 2045-2048 - Pouya Kamalinejad, Kamyar Keikhosravy, Reza Molavi, Shahriar Mirabbasi, Victor C. M. Leung
Efficiency enhancement techniques and a dual-band approach in RF rectifiers for wireless power harvesting. 2049-2052
Novel Medical Diagnostic Method II
- Xin Chen, Sheng Zhong, Yangyang Niu, Siping Chen, Tianfu Wang
A multimodal investigation of in vivo muscle behavior: System design and data analysis. 2053-2056 - Liang Chen, Ruimin Hu, Junjun Jiang
Efficient learning based face hallucination approach via facial standard deviation prior. 2057-2060 - Jianlong Zhang, Dan Wang, Xiang Xie, Guolin Li, Yingke Gu, Zhihua Wang:
A low-complexity intestinal lumen detection method for wireless endoscopy images. 2061-2064 - Theja Ram Pingali
Eye-gesture controlled intelligent wheelchair using Electro-Oculography. 2065-2068 - Hong Chen, Shaojie Su, Zhihua Wang, Xu Zhang:
A wirelessly monitoring system design for Total Hip Replacement surgery. 2069-2072
C3L-C: Neumorphic Circuits & Systems
- Giovanni Rovere, Qiao Ning, Chiara Bartolozzi, Giacomo Indiveri
Ultra low leakage synaptic scaling circuits for implementing homeostatic plasticity in neuromorphic architectures. 2073-2076 - Richard James Sofatzis, Saeed Afshar, Tara Julia Hamilton
The Synaptic Kernel Adaptation Network. 2077-2080 - O. Levent Savkay, Evren Cesur, Nerhun Yildiz
Realization of processing blocks of CNN based CASA system on CPU and FPGA. 2081-2084 - Alexantrou Serb
Memristors as synapse emulators in the context of event-based computation. 2085-2088
C3L-D: Analog Filters
- Siddharth Seth, Boris Murmann
Design and optimization of continuous-time filters using geometric programming. 2089-2092 - John Richard E. Hizon, Esther Rodríguez-Villegas:
A reconfigurable FGMOS based OTA-C filter. 2093-2096 - Gerald Hilber, Alexander Burgstaller, E. H. Stitz, Andreas Rauchenecker, Timm Ostermann, Janos Gila, Martin Schiefer:
Stability analysis and design methodology for an Åkerberg-Mossberg filter. 2097-2100 - Amorn Jiraseree-amornkun
Low-power fine-tuning switched-resistor reconfigurable filter. 2101-2104 - Igor M. Filanovsky
Bessel-Butterworth transitional filters. 2105-2108
C3L-E: Analog Signal Processing Circuits I
- Yinan Wang
Estimation method for nonlinearity mismatch in time-interleaved analog-to-digital converters. 2109-2112 - Pasindu Aluthwala, Neil Weste, Andrew Adams, Torsten Lehmann, Sri Parameswaran
A simple digital architecture for a harmonic-cancelling sine-wave synthesizer. 2113-2116 - Lucian-Vasile Stoica, Valentyn Solomko, Thorsten Baumheinrich, Renato Del Regno, Reece Beigh, Steve Riches, I. White
Design of a high temperature signal conditioning ASIC for engine control systems - HIGHTECS. 2117-2120 - Nan Cui, Milin Zhang, Nader Engheta, Jan Van der Spiegel:
Design of a current mode polarization arithmetic analyzer. 2121-2124 - Moataz Abdelfattah, Gordon W. Roberts, Vamsy P. Chodavarapu:
All-digital Time-Mode elliptic filters based on the operational simulation of LC ladders. 2125-2128
C3L-F: Wireline Communications
- Yen-Long Lee, Soon-Jyh Chang, Rong-Sing Chu, Yen-Chi Chen, Jih Ren Goh, Chung-Ming Huang:
An area- and power-efficient half-rate clock and data recovery circuit. 2129-2132 - Po-Hsuan Chang
A 10Gb/s 44.2 dB adaptive equalizer with Duobinary tracking loop in 0.18µm CMOS. 2133-2136 - Alaa R. Al-Taee, Fei Yuan, Andy Gean Ye:
A new adaptive Decision Feedback Equalizer using hexagon eye-opening monitor for multi Gbps data links. 2137-2140 - Kejun Wu, Peng Liu, Qiaoyan Yu:
A novel signaling technique for high-speed wireline backplane transceiver: Four phase-shifted sinusoid symbol (PSS-4). 2141-2144 - Kanupriya Bhardwaj, Thomas H. Lee:
A 0.96mW, 5.3-6.75GHz, phase-interpolation and quadrature-generation method using parametric energy transfer in 65nm CMOS. 2145-2148
C3L-G: Media Coding and Quality Assessment
- Huan Yang, Weisi Lin, Chenwei Deng, Long Xu:
Study on subjective quality assessment of Digital Compound Images. 2149-2152 - Ming Yang, Jingjing Fu, Yan Lu, Jianfei Cai
An adaptive multi-layer low-latency transmission scheme for H.264 based screen sharing system. 2153-2156 - Dan Miao, Jingjing Fu, Yan Lu, Shipeng Li
High frame rate screen video coding for screen sharing applications. 2157-2160 - Junhui Hou
A novel compression framework for 3D time-varying meshes. 2161-2164 - Youngsam Shin, Jaedon Lee, Won-Jong Lee, Soojung Ryu, Jeongwook Kim:
Full-stream architecture for ray tracing with efficient data transmission. 2165-2168
C3L-H: Memory Circuits and Architectures II
- Le Zhang, Xuanyao Fong
Highly reliable memory-based Physical Unclonable Function using Spin-Transfer Torque MRAM. 2169-2172 - Ravi Patel, Engin Ipek, Eby G. Friedman:
Field driven STT-MRAM cell for reduced switching latency and energy. 2173-2176 - Robert Giterman
4T Gain-Cell with internal-feedback for ultra-low retention power at scaled CMOS nodes. 2177-2180 - Shen-Fu Hsiao, Pu-Cheng Wu:
Design of low-leakage multi-port SRAM for register file in graphics processing unit. 2181-2184 - Hong Zhu, Volkan Kursun
A comprehensive comparison of superior triple-threshold-voltage 7-transistor, 8-transistor, and 9-transistor SRAM cells. 2185-2188
C3L-J: SOC, Multicore & Hardware-Software Codesign II
- Yuchi Zhang, Shouyi Yin, Peng Ouyang, Leibo Liu
A parallel hardware architecture for fast integral image computing. 2189-2192 - Zhenqi Wei, Peilin Liu, Zhencheng Zeng, Jiangwei Xu, Rendong Ying:
Instruction-based high-efficient synchronization in a many-core Network-on-Chip processor. 2193-2196 - Kuan-Chung Chen, Chung-Ho Chen:
An OpenCL runtime system for a heterogeneous many-core virtual platform. 2197-2200 - Hung-Cheng Su, Tsung-Han Wu, Chun-Jen Tsai:
Temporal multithreading architecture design for a Java processor. 2201-2204 - Masab Ahmad, Awais Mehmood Kamboh
Power & throughput optimized lifting architecture for Wavelet Packet Transform. 2205-2208
C3L-K: Complex Networks Analysis and Applications
- Jiajing Wu, Chi Kong Tse
Effective routing algorithms based on node usage probability from a complex network perspective. 2209-2212 - Xiaoke Xu, Michael Small
Uncovering interaction patterns of multi-agent collective motion via complex network analysis. 2213-2216 - Soroush Haeri, Ljiljana Trajkovic
Deflection routing in complex networks. 2217-2220 - Mario di Bernardo
Traffic dynamics and vulnerability in hypercube communication networks. 2221-2224 - Pietro De Lellis
Pinning control design for bounded synchronization of complex networks of nonidentical systems. 2225-2228
C3L-L: Special Session: Unconventional Number Systems for Application-specific Digital Signal Processors
- Dimitrios Schinianakis, Thanos Stouraitis
An RNS barrett modular multiplication architecture. 2229-2232 - Héctor Pettenghi
Method for designing multi-channel RNS architectures to prevent power analysis SCA. 2233-2236 - Amir Kaivani, Seok-Bum Ko
High-speed FFT processors based on redundant number systems. 2237-2240 - Babak Zamanlooy, Mitra Mirhassani:
Area efficient low-sensitivity lumped madaline based on Continuous Valued Number System. 2241-2244
C3L-M: CAS-FEST Special Session on Memristor-based Nonlinear Circuits & Architectures
- Gaurav Gandhi, Varun Aggarwal, Leon O. Chua:
Coherer is the elusive memristor. 2245-2248 - Maheshwar Prasad Sah, Ram Kaji Budhathoki
A mutator-based meminductor emulator circuit. 2249-2252 - Le Zheng, Sangho Shin, Sung-Mo Steve Kang:
Memristors-based Ternary Content Addressable Memory (mTCAM). 2253-2256 - Francesca Puppo, Marie-Agnes Doucey, Massimiliano Di Ventra, Giovanni De Micheli, Sandro Carrara:
Memristor-based devices for sensing. 2257-2260 - Alon Ascoli, Ronald Tetzlaff
Memristor plasticity enables emergence of synchronization in neuromorphic networks. 2261-2264
C4L-M: CAS-FEST Special Session on Analog Memristor Circuits
- Mika Laiho
Analog signal processing on a FPAA/memristor hybrid circuit. 2265-2268 - Reut Wizenberg, Ali Khiat, Radu Berdan, Christos Papavassiliou, Themistoklis Prodromakis
Applications of solid-state memristors in tunable filters. 2269-2272
C5P-N: Image Processing and Compression
- Seyed Mohammad Ali Zeinolabedin
An area- and power-efficient FIFO with error-reduced data compression for image/video processing. 2277-2280 - Jie Chen
A fast adaptive guided filtering algorithm for light field depth interpolation. 2281-2284 - Marzieh Amini
A new blind wavelet domain watermark detector using hidden Markov model. 2285-2288 - Masaaki Fujiyoshi
A near-lossless data hiding method with an improved quantizer. 2289-2292 - Vinit Jakhetiya, Oscar C. Au, Sunil Prasad Jaiswal
Symmetrical predictor structure based integrated lossy, near lossless/lossless coding of images. 2293-2296
C5P-P: Digital Signal Processing
- Shotaro Nishimura, Aloys Mvuma, Takao Hinamoto:
Frequency estimation of three-phase power systems using complex adaptive notch filters. 2297-2300 - Federico Ang, Yoshikazu Miyanaga
Open domain continuous filipino speech recognition with code-switching. 2301-2304 - Jinling Liang, Wei Xing Zheng:
Distributed state estimation for sensor networks with randomly occurring sensor saturations. 2305-2308 - Shi Yan, Li Xu, Qinglin Zhao:
Order evaluation for realization of MIMO multidimensional systems. 2309-2312 - Naoto Sasaoka, Kazumasa Ono, Yoshio Itoh:
Speech enhancement using normalized cumulant-based adaptive algorithm for transient noise. 2313-2316
C5P-Q: Analog Signal Processing Circuits III
- Ming-Wei Hsu, Chern-Lin Chen:
A cost-effective offset cancellation structure for LCD source driver. 2317-2320 - Xinyu Yin, Hongge Li:
An 8-bit QVGA AMOLED driver IC with a polynomial interpolation DAC. 2321-2324 - Fan Yang
Area-efficient capacitor-less LDR with enhanced transient response for SoC in 65-nm CMOS. 2325-2328 - Taek-Joon An, Kyung-Sub Son, Young-Jin Kim, In-Seok Kong, Jin-Ku Kang:
A 8.7mW 5-Gb/s clock and data recovery circuit with 0.18-µm CMOS. 2329-2332 - Li Wang, Rui Ma, Chen Zhang, Zongyu Dong, Fei Lu, Albert Z. Wang, Xin Wang, Jian Liu, Siqiang Fan, He Tang, Baoyong Chi, Liji Wu, Tianling Ren:
Scalable behavior modeling for SCR based ESD protection structures for circuit simulation. 2333-2336
Data Convertors IV
- Xiaodong Liu, Mattias Andersson, Martin Anderson, Lars Sundström
An 11mW continuous time delta-Sigma modulator with 20 MHz bandwidth in 65nm CMOS. 2337-2340 - Arindam Sanyal, Nan Sun:
An enhanced ISI shaping technique for multi-bit ΔΣ DACs. 2341-2344 - Cheng-Hsun Ho, Soon-Jyh Chang, Guan-Ying Huang, Che-Hsun Kuo:
A 3.9-fJ/c.-s. 0.5-V 10-bit 100-kS/s low power SAR ADC with time-based fixed window. 2345-2348 - Yue Hu, Farshad Farahbakhshian, Un-Ku Moon:
Time amplifiers based on phase accumulation. 2349-2352 - Yusaku Hirai, Kenji Ohara, Toshimasa Matsuoka
Extra loop delay compensation for hybrid delta-sigma modulators. 2353-2356
C5P-5: Data Convertors V
- Long Chen, Ji Ma, Nan Sun:
Capacitor mismatch calibration for SAR ADCs based on comparator metastability detection. 2357-2360 - Chixiao Chen, Zemin Feng, Huabin Chen, Mingshuo Wang, Jun Xu, Fan Ye
A low-offset calibration-free comparator with a mismatch-suppressed dynamic preamplifier. 2361-2364 - Guoxian Dai, Chixiao Chen, Shunli Ma, Fan Ye, Junyan Ren:
A 400-MS/s 8-b 2-b/cycle SAR ADC with shared interpolator and alternative comparators. 2365-2368 - Hsuan-Yu Chang, Ching-Yuan Yang:
A high-speed low-power calibrated flash ADC. 2369-2372 - Lei Qiu, Yuanjin Zheng, Di Zhu, Liter Siek
A statistic based time skew calibration method for time-interleaved ADCs. 2373-2376
C5P-T: Circuits for Bio-sensing
- Thanh Trung Nguyen, Philipp Häfliger
A 9.4-bit, 28.8-mV range inverter based readout circuit for implantable pressure bridge piezo-resistive sensor. 2377-2380 - Natalie Muller, Yiannos Manoli, Matthias Kuhl:
A 1.6 nS, 16µW, 30V Gm-C integrator for offset voltage monitoring in neural stimulators. 2381-2384 - Lirong Zheng, Lieuwe B. Leene, Yan Liu, Timothy G. Constandinou
An adaptive 16/64 kHz, 9-bit SAR ADC with peak-aligned sampling for neural spike recording. 2385-2388 - Yongsu Lee, Unsoo Ha, Kiseok Song, Hoi-Jun Yoo:
3.8 mW electrocardiogram (ECG) filtered electrical impedance tomography IC using I/Q homodyne architecture for breast cancer diagnosis. 2389-2392
Information Processing in Bio Applications
- Anh-Tuan Do, Kiat Seng Yeo
A hybrid NEO-based spike detection algorithm for implantable brain-IC interface applications. 2393-2396 - Mehdi Neggazi, Latifa Hamami, Abbes Amira:
Efficient compressive sensing on the shimmer platform for fall detection. 2401-2404 - Corentin Dallet, Saumya Kareem, Izzet Kale:
Real time blood image processing application for malaria diagnosis using mobile phones. 2405-2408 - Salim Lahmiri, Mounir Boukadoum, Antonio Di Ieva
Detrended fluctuation analysis of brain hemisphere magnetic resonnance images to detect cerebral arteriovenous malformations. 2409-2412
C5P-V: Education in Circuits & Systems
- Chi-Un Lei
Teaching introductory circuits and systems: Enhancing learning experience via iterative design process and pre-/post-project learning activities. 2413-2416 - Mahmudur Rahman, Md A. Sattar, Norman G. Gunther, Tokunbo Ogunfunmi
A novel pedagogical method for Integrated Circuit and systems education using the Variational Thermodynamic principle. 2417-2420 - Seungwoo Jung, Ickhyun Song
Systematic methodology for applying Mason's signal flow graph to analysis of feedback circuits. 2421-2424 - Luís Bica Oliveira
The design of a light barrier system as an undergraduate laboratory project. 2425-2428 - Vedat Tavsanoglu:
An analysis of the mortgage account as a discrete-time LTI system. 2429-2432
C6P-N: Power Converters and Wireless Power Transfer
- Shyh-Jier Huang, Chun-Wei Lin, Te-Chun Hung:
Analysis and implementation of LLC inverters for ozone-driven system with constant-current control. 2433-2436 - G. Boopalan, C. K. Subramaniam
Frequency dependence of magnetic flux profile in the presence of metamaterials for wireless power transfer. 2437-2440 - Yam Prasad Siwakoti
A high voltage gain quasi Z-source isolated DC/DC converter. 2441-2444 - Mariusz Bojarski, Dariusz Czarkowski, Francisco de León
Multiphase resonant inverters with common resonant circuit. 2445-2448
C6P-P: Power Management, Modelling and Control
- Chih-Wei Liu, Le-Ren Chang-Chien
Autonomous tuning method for realizing optimal adaptive voltage positioning scheme. 2449-2452 - Seungwoo Jung, Troy D. England
A complementary SiGe HBT on SOI low dropout voltage regulator utilizing a nulling resistor. 2453-2456 - Min Tan, Chenchang Zhan, Wing-Hung Ki
A 4µA quiescent current output-capacitor-free low-dropout regulator with fully differential input stage. 2457-2460
C6P-Q: Circuits & Systems for Communications III
- Elias Bakken, Tor Sverre Lande
Real time UWB radar imaging using single chip transceivers. 2461-2464 - Mohammad Reza Sadeghifar, J. Jacob Wikner
Linear programming design of semi-digital FIR filter and ΣΔ modulator for VDSL2 transmitter. 2465-2468 - Pervez M. Aziz, Hiroshi Kimura, Amaresh V. Malipatil, Shiva Kotagiri, Gordon Chan, Hairong Gao:
Shift register multi-phase clock based downsampled floating tap DFE for serial links. 2469-2472 - Nasir Abdul Quadir
An inductorless linear optical receiver for 20Gbaud/s (40Gb/s) PAM-4 modulation using 28nm CMOS. 2473-2476 - Yang Xiao, Jinfeng Zou, Dong Wang:
The diffserv cognitive network node with Controlled-UDP. 2477-2481
C6P-R: Circuits & Systems for Communications IV
- Xiaofeng He, Yuanjin Zheng, Chengyan Ma, Tianchun Ye
A 95 dB dynamic range automatic gain control circuits and systems for Multi-standard Digital TV tuner. 2482-2485 - Raul Gomez Cid-Fuentes, Albert Cabellos-Aparicio, Eduard Alarcón:
Circuit area optimization in energy temporal sparse scenarios for multiple harvester powered systems. 2486-2489 - Supriya Aggarwal
Reconfigurable CORDIC architectures for multi-mode and multi-trajectory operations. 2490-2494 - Jhonatan Posada, Mauricio Pardo
Radar-based georeferencing system for estimation of changing river-shores. 2495-2498 - Arjuna Madanayake
Directional cyclostationary feature detectors using 2-D IIR RF spiral-antenna beam digital filters. 2499-2502 - Dongxuan Bao, Zhuo Zou, Qian Wang, Majid Baghaei Nejad
A wirelessly-powered UWB sensor tag with time-domain sensor interface. 2503-2506
C6P-S: VLSI for Signal Processing and Communications
- Ziyou Yao, Weifeng He, Liang Hong, Guanghui He, Zhigang Mao:
Area and throughput efficient IDCT/IDST architecture for HEVC standard. 2511-2514 - Tsubasa Mishima, Satoshi Shigemi, Anh-Tuan Hoang, Tetsushi Koide, Toru Tamaki
FPGA implementation of feature extraction for colorectal endoscopic images with NBI magnification. 2515-2518 - Sami Smaili, Yehia Massoud:
Accurate and efficient modeling of random demodulation based compressive sensing systems with a general filter. 2519-2522
SOC, Multicore & Hardware-Software Codesign III
- Wenping Zhu, Leibo Liu
A 65 nm uneven-dual-core SoC based platform for multi-device collaborative computing. 2527-2530 - Marcelo Ruaro
Tool-set for NoC-based MPSoC debugging - A protocol view perspective. 2531-2534 - Masaharu Yamamoto, Anh-Tuan Hoang, Mutsumi Omori, Tetsushi Koide:
Compact hardware oriented number recognition algorithm for real-time speed traffic-sign recognition. 2535-2538 - Jingwei Xu, Ehsan Rohani, Mehnaz Rahman, Gwan Choi:
Signal reconstruction processor design for compressive sensing. 2539-2542
C6P-U: ASIC, Other VLSI Circuits and Testing
- Kuo-Chiang Chang, Shien-Chun Luo, Ching-Ji Huang, Chih-Wei Liu, Yuan-Hua Chu, Shyh-Jye Jou:
An ultra-low voltage hearing aid chip using variable-latency design technique. 2543-2546 - Tsunato Nakai, Megumi Shibatani, Mitsuru Shiozaki, Takaya Kubota, Takeshi Fujino:
Side-channel attack resistant AES cryptographic circuits with ROM reducing address-dependent EM leaks. 2547-2550 - Rakesh Warrier, Hao Liang
Reconfigurable DSP block design for dynamically reconfigurable architecture. 2551-2554 - Sying-Jyan Wang
Fast and accurate statistical static timing analysis. 2555-2558 - Yves Blaquière, Yan Basile-Bellavance, Safa Berrima, Yvon Savaria:
Design and validation of a novel reconfigurable and defect tolerant JTAG scan chain. 2559-2562
C6P-V: Algorithms for Sensory Systems
- Chi-Un Lei
LUOPAN: Light utility-oriented placement of actuator nodes in sensor/actuator networks. 2563-2566 - Xiao-Ping (Steven) Zhang, Ahmed Shaharyar Khwaja, Ji-an Luo, Alon Shalev Housfater, Alagan Anpalagan
Convergence analysis of multiple imputations particle filters for dealing with missing data in nonlinear problems. 2567-2570 - Shuang Xie
Delay-line temperature sensors and VLSI thermal management demonstrated on a 60nm FPGA. 2571-2574 - Jose Luis Alarcon Herrera, Xiang Chen:
Deployment of visual sensor networks using a graph-based approach. 2575-2578 - Muhammad Hassan, Amine Bermak
Gas classification using binary decision tree classifier. 2579-2582 - Ahmed Abdelgawad:
Sand rate measurement in oil pipelines using wireless sensor network. 2583-2587
C7L-M: CAS-FEST Special Session on Computing with Memristors
- Dalibor Biolek
Memristive systems for analog signal processing. 2588-2591 - Siddharth Gaba, Phil Knag, Zhengya Zhang
Memristive devices for stochastic computing. 2592-2595 - Eike Linn:
Memristive nano-crossbar arrays enabling novel computing paradigms. 2596-2599
C8l-A: Special Session: Nonlinearities in Energy Harvesting Systems: Analysis & Applications
- Andrii Dudka, Dimitri Galayko, Elena Blokhina
Smart integrated conditioning electronics for electrostatic vibration energy harvesters. 2600-2603 - Elena Blokhina
Nonlinearities in electrostatic vibration energy harvesters: A review using the example of a charge pump conditioning circuit. 2604-2607 - Cuong Hung Nguyen, Einar Halvorsen:
Harmonic-balance analysis of nonlinear energy harvester models. 2608-2611 - Elisenda Bou-Balust, Abdelali El Aroudi, Peter Fisher, Eduard Alarcón:
Unveiling nonlinear dynamics in resonant inductively coupled wireless power transfer. 2612-2615
C8L-B: Circuits and Systems for Video Technology
- Chia-Wei Chang, Wei-Hsuan Lin, Hsiang-Cheng Yu, Chih-Peng Fan
A high throughput CAVLC architecture design with two-path parallel coefficients procedure for digital cinema 4K resolution H.264/AVC encoding. 2616-2619 - Mihir N. Mody, Hrushikesh Garud, Soyeb Nagori, Dipan Kumar Mandal:
High throughput VLSI architecture for HEVC SAO encoding for ultra HDTV. 2620-2623 - Dieison Silveira
Memory bandwidth reduction for H.264 and HEVC encoders using lossless reference frame coding. 2624-2627 - Pramod Kumar Meher, Basant K. Mohanty
Area-delay efficient architecture for MP algorithm using reconfigurable inner-product circuits. 2628-2631
C8L-C: Spiking Sensing and Processing
- Minhao Yang
Comparison of spike encoding schemes in asynchronous vision sensors: Modeling and design. 2632-2635 - Tobi Delbrück, Vicente Villanueva, Luca Longinotti:
Integration of dynamic vision sensor with inertial measurement unit for electronically stabilized event-based vision. 2636-2639 - Shaista Hussain
Improved margin multi-class classification using dendritic neurons with morphological learning. 2640-2643 - Garrick Orchard
Accelerated frame-free time-encoded multi-step imaging. 2644-2647 - Stefano Caviglia, Maurizio Valle
Asynchronous, event-driven readout of POSFET devices for tactile sensing. 2648-2651
C8L-D: Stability Analysis of Power Systems and Microgrids
- Moussa Reda Mansour, Luís F. C. Alberto, Rodrigo A. Ramos
Determine groups of preventive controls for a set of critical contingencies in voltage stability. 2652-2655 - Panom Parinya, Anawach Sangswang
A study of impact of wind power to power system stability using stochastic stability index. 2656-2659 - Edwin Choque P., Luís Fernando Costa Alberto:
A two-time scale framework for stability analysis of electrical power system. 2660-2663 - Mingfei Wu, Dylan Dah-Chuan Lu
An active damping method for stabilization of cascaded connected two stage converter systems with constant power loads in DC microgrids. 2664-2667 - Cheng Wan
Stability of interacting grid-connected power converters. 2668-2671
C8L-E: Analog Signal Processing Circuits II
- Jen-Chieh Liu, Huan-Ke Chiu, Jia-Hung Peng, Yuan-Hua Chu, Hong-Yi Huang:
A radio-controlled receiver for clocks/watches and alarm applications. 2672-2675 - Shang-Hsien Yang, Yuan-Han Yang, Ke-Horng Chen
A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR. 2676-2679 - Ying-Wei Chou, Meng-Wei Chien, Shin-Chieh Chen, Ke-Horng Chen
A low THD clock-free Class-D audio amplifier with an increased damping resistor and cross offset cancellation technique. 2680-2683 - María R. Valero
PSRR enhancement based on QFG techniques for low-voltage low-power design. 2684-2687 - Herminio Martínez-Garcia
Modified current-mode one-cycle control for linear-assisted DC/DC regulator. 2688-2691 - Toru Yazaki, Norio Chujo, Hiroki Yamashita, Takashi Takemoto, Yong Lee, Yasunobu Matsuoka:
25-Gbps×4 optical transmitter with adjustable asymmetric pre-emphasis in 65-nm CMOS. 2692-2695
CSL-F: Millimeter-wave and Optical Communication Circuits
- Shinsuke Nakano, Hiroaki Katsurai, Minoru Togashi, Hiroshi Koizumi, Masafumi Nogawa:
20.1-mW 8-Gbps UWB-IR millimeter-wave transmitter using an OOK pulse modulator based on CMOS inverters. 2696-2699 - Sagar Ray, Mona Mostafa Hella:
A 2.2GHz-80dBΩ CMOS receiver front-end for short-range optical communication employing DMT/OFDM. 2700-2703 - Keiji Kishine, Hiroshi Inoue, Hiromi Inaba, Makoto Nakamura, Akira Tsuchiya, Hidetoshi Onodera, Hiroaki Katsurai:
A 65-nm CMOS burst-mode CDR based on a GVCO with symmetric loops. 2704-2707 - Lu Chuang, Marion K. Matters-Kammerer, Reza Mahmoudi, Arthur H. M. van Roermund, Peter G. M. Baltus, Ernst Habekotté, Koen van Hartingsveldt, Floris van der Wilt:
A scalable baseband phase shifter with 12 GHz I/Q Mixers in 40-nm CMOS for 60 GHz applications. 2708-2711
C8L-G: Image and Video Processing
- Yu-Ping Chiu, Jin-Jang Leou, Han-Hui Hsiao:
Super-resolution reconstruction for Kinect 3D data. 2712-2715 - Luhong Liang, Peng Luo, Wai Keung Cheung, King Hung Chiu:
Fast single frame super-resolution using perceptual visibility optimization. 2716-2719 - Soo-Chang Pei, Chih-Tsung Shen:
High-dynamic-range parallel multi-scale retinex enhancement with spatially-adaptive prior. 2720-2723 - Qingbo Lu, Zhenbo Lu, Xiaoqing Tao, Houqiang Li:
A new non-local video denoising scheme using low-rank representation and total variation regularization. 2724-2727 - Jing Liu
Spatial error concealment with adaptive linear predictor. 2728-2731
Memory Circuits and Architectures III
- Yu-Min Lin, Yu-Hao Chen, Ming-Han Chung, An-Yeu Wu
High-throughput QC-LDPC decoder with cost-effective early termination scheme for non-volatile memory systems. 2732-2735 - Tomoki Nakagawa, Shintaro Izumi, Shusuke Yoshimoto, Koji Yanagida, Yuki Kitahara, Hiroshi Kawaguchi
A 6T-4C shadow memory using plate line and word line boosting. 2736-2739 - Christoph Keller, Frank K. Gürkaynak, Hubert Kaeslin, Norbert Felber:
Dynamic memory-based physically unclonable function for the generation of unique identifiers and true random numbers. 2740-2743 - Jeevan Sirkunan, Chia Yee Ooi, Nasir Shaikh-Husin, Yuan Wen Hau
Hardware transactional memory on multi-processor FPGA platform. 2744-2747 - Md. Shafiqul Islam, Syed Iftekhar Ali
Improved charge shared scheme for low-energy match line sensing in ternary content addressable memory. 2748-2751
CBL-J: Interconnects, Clock, Noise Immunity & ESO Protection
- Abdelrahman H. Elsayed, Ramy N. Tadros, Maged Ghoneima, Yehea I. Ismail:
Low-power all-digital manchester-encoding-based high-speed serdes transceiver for on-chip networks. 2752-2755 - Muhammad Sanaullah
Analysis of RLC interconnect delay model using second order approximation. 2756-2759 - Ignatius Bezzam, Shoba Krishnan:
A pulsed resonance clocking for energy recovery. 2760-2763 - Khaled Salah
A novel dimensional analysis method for TSV modeling and analysis in three dimensional integrated circuits. 2764-2767 - Chuan Shan, François Anceau, Dimitri Galayko, Eldar Zianbetov:
"Swimming pool"-like distributed architecture for clock generation in large many-core SoC. 2768-2771
C8L-K: Analysis, Implementation and Application of Nonlinear Circuits & Systems
- Adam Cooman
Distortion Contribution Analysis by combining the Best Linear Approximation and noise analysis. 2772-2775 - Sergio Callegari
Achievement of preassigned spectra in the synthesis of band-pass constant-envelope signals by rapidly hopping through discrete frequencies. 2776-2779 - Shaolin Tan
Exploring strategy selection in populations via a continuous evolutionary game dynamics. 2780-2783 - Shihong Ding, Wei Xing Zheng:
New design method of sliding mode controller for a class of nonlinear second-order systems. 2784-2787 - Masatoshi Sato, Hisashi Aomori, Mamoru Tanaka:
Node voltages in nonlinear resistive circuits enable new approach to the minimum cut problem. 2788-2791
C8L-L: Special Session: Towards Practical Homomorphic and Post-Quantum Cryptographic Architectures
- Ciara Moore
Practical homomorphic encryption: A survey. 2792-2795 - Thomas Pöppelmann, Tim Güneysu
Area optimization of lightweight lattice-based encryption on reconfigurable hardware. 2796-2799 - Wei Wang, Zhilu Chen, Xinming Huang:
Accelerating leveled fully homomorphic encryption using GPU. 2800-2803 - Santosh Ghosh:
On the implementation of mceliece with CCA2 indeterminacy by SHA-3. 2804-2807
C8L-M: CAS-FEST Special Session on Materials & Structure Optimization of Resistive Nanodevices
- Byung Joon Choi, Ning Ge, J. Joshua Yang
New materials for memristive switching. 2808-2811 - Ella Gale
The short-term memory (d.c. response) of the memristor demonstrates the causes of the memristor frequency effect. 2812-2815
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-11-04 20:31 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: