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IEEE Transactions on Circuits and Systems I: Regular Papers, Volume 70
Volume 70, Number 1, January 2023
- Hai Helen Li
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MWSCAS Guest Editorial Special Issue Based on the 64th International Midwest Symposium on Circuits and Systems. 1-2 - Haixiang Zhao, Rahul Sarpeshkar, Soumyajit Mandal
A Compact and Power-Efficient Noise Generator for Stochastic Simulations. 3-16 - Meriam Gay Bautista
Superconducting Shuttle-Flux Shift Register for Race Logic and Its Applications. 17-28 - Kevin Pelzers
A 0.0022 mm² 10 bit 20 MS/s SAR ADC With Passive Single-Ended-to-Differential-Converter. 29-39 - Hendrik Wöhrle
Multi-Objective Surrogate-Model-Based Neural Architecture and Physical Design Co-Optimization of Energy Efficient Neural Network Hardware Accelerators. 40-53 - Giacomo Castoro
Phase Noise Analysis of Periodically ON/OFF Switched Oscillators. 54-63 - Ehsan Rahiminejad
A Novel Nociceptor Functional Circuit for Tactile Applications. 64-73 - Mahmood A. Mohammed
Scalable Multi-Stage CMOS OTAs With a Wide CL-Drivability Range Using Low-Frequency Zeros. 74-87 - Xiayu Wang
An Analog SiPM Based Receiver With On-Chip Wideband Amplifier Module for Direct ToF LiDAR Applications. 88-100 - Hossein Rahmanian Kooshkaki
A 36 μW 2.8-3.4 dB Noise Figure Impedance Boosted and Noise Attenuated LNA for NB-IoT. 101-113 - Peishuo Li
A 96-Channel 40nm CMOS Potentiostat for Parallel Experiments on Microbial Electrochemical Systems. 114-127 - Pratik Kumar
Process, Bias, and Temperature Scalable CMOS Analog Computing Circuits for Machine Learning. 128-141 - Zhangcheng Huang
Noise Model of Large-Format Readout Integrated Circuit for Infrared Focal Plane Array. 142-153 - Óscar Pereira-Rial
Ultra-Low-Power Low-Input-Voltage Charge Pump for Micro-Energy Harvesting Applications. 154-165 - Yi Shen
An Energy-Efficient SAR ADC With a Coarse-Fine Bypass Window Technique. 166-175 - Ruoman Yang, Tony Wu, Tzu-Chien Hsueh
A High-Accuracy Single-Photon Time-Interval Measurement in Mega-Hz Detection Rates With Collaborative Variance Reduction: Theoretical Analysis and Realization Methodology. 176-189 - Mohamed Malki
Input-Reflectionless Quasi-Elliptic-Type Single- and Dual-Band Bandpass Filters Based on Passive Channelized Principles. 190-202 - Ismary Lavandera-Hernández, José Raúl Loo-Yau
Frequency-Dependent Design Spaces for Continuous Mode Class-J*/B/J PA. 203-213 - Yiqi Wang
SPCIM: Sparsity-Balanced Practical CIM Accelerator With Optimized Spatial-Temporal Multi-Macro Utilization. 214-227 - Tongda Wu
Reliable and Efficient Parallel Checkpointing Framework for Nonvolatile Processor With Concurrent Peripherals. 228-240 - Yifeng Song
A High-Speed FPGA-Based Hardware Implementation for Leighton-Micali Signature. 241-252 - Hao Sun
An Energy-Efficient Stream-Based FPGA Implementation of Feature Extraction Algorithm for LiDAR Point Clouds With Effective Local-Search. 253-265 - Mohd. Tasleem Khan
Architectural Trade-Off Analysis for Accelerating LSTM Network Using Radix-r OBC Scheme. 266-279 - Shao-Hong Yang
A Highly Stable Physically Unclonable Function Using Algorithm-Based Mismatch Hardening Technique in 28-nm CMOS. 280-289 - Jongkil Park
High Dynamic Range Digital Neuron Core With Time-Embedded Floating-Point Arithmetic. 290-301 - Yongfu Li
A Comprehensive Study on the Design Methodology of Level Shifter Circuits. 302-314 - Prasetiyo
Accelerating Deep Convolutional Neural Networks Using Number Theoretic Transform. 315-326 - Pedro Tauã Lopes Pereira
ReAdapt: A Reconfigurable Datapath for Runtime Energy-Quality Scalable Adaptive Filters. 327-339 - Xueyong Zhang
A Robust Time-Based Multi-Level Sensing Circuit for Resistive Memory. 340-352 - Hongwu Jiang
ENNA: An Efficient Neural Network Accelerator Design Based on ADC-Free Compute-In-Memory Subarrays. 353-363 - Chenyang Zhao
ARBiS: A Hardware-Efficient SRAM CIM CNN Accelerator With Cyclic-Shift Weight Duplication and Parasitic-Capacitance Charge Sharing for AI Edge Application. 364-377 - Junyao Wu
A Triode-Based Analog Gate and Its Application in Chaotic Circuits. 378-387 - Zbigniew Galias
Dynamics of the Hénon Map in the Digital Domain. 388-398 - Limin Hao
Realizable Reduction of Multi-Port RCL Networks by Block Elimination. 399-412 - Shidong Zhai
Stability Conditions for Cluster Synchronization in Directed Networks of Diffusively Coupled Nonlinear Systems. 413-423 - Jinna Li
Consensus of Nonlinear Multiagent Systems With Uncertainties Using Reinforcement Learning Based Sliding Mode Control. 424-434 - Graziano Chesi
LMI-Based Determination of the Peak of the Response of Structured Polytopic Linear Systems. 435-446 - Xiaofeng Zhao, Tao Han
Hierarchical Prescribed-Time Coordination for Multiple Lagrangian Systems With Input-to-Output Redundancy and Matrix-Weighted Networks. 447-459 - Yunxia Song
Stability Analysis of Linear Neutral Delay Systems With Two Delays via Augmented Lyapunov-Krasovskii Functionals. 460-471 - Zhuang Liu
Fixed-Time Sliding Mode Control for DC/DC Buck Converters With Mismatched Uncertainties. 472-480 - Bin Wang, Ramon Costa-Castelló
Modeling and Adaptive Parameter Estimation for a Piezoelectric Cantilever Beam. 481-491 - Alán Rodrigo Díaz Rizo
Anti-Piracy Design of RF Transceivers. 492-505 - Fangyu Mao
A Hybrid Single-Inductor Bipolar Triple-Output DC-DC Converter With High-Quality Positive Outputs for AMOLED Displays. 506-517 - Zhichen Li
Active Disturbance Rejection Formation Tracking Control for Uncertain Nonlinear Multi-Agent Systems With Switching Topology via Dynamic Event-Triggered Extended State Observer. 518-529 - David A. Zambrano Prada
Polynomial Sliding Surfaces to Control a Boost Converter With Constant Power Load. 530-543
Volume 70, Number 2, February 2023
- Jin-Xu Xu
Broadband Doherty Power Amplifier Using Short Ended λ/4 Transmission Lines Based on the Analysis of Negative Characteristic Impedance. 545-555 - Yuan Chun Li
Highly Efficient Filtering Power Amplifier Using Impedance Area-Based Optimization. 556-565 - Ioannis Messaris
High Frequency Response of Non-Volatile Memristors. 566-578 - Jonas Borgmans
The Mismatch Performance of Pseudo Digital Ring Oscillators Used in VCO ADCs: PSRR and CMRR. 579-592 - Basem Abdelaziz Abdelmagid
An Adaptive Fully Integrated Dual-Output Energy Harvesting System With MPPT and Storage Capability. 593-606 - Davide Manente
A Compensation and Calibration Technique for Lumped Hybrid Couplers in Integrated Image-Reject Architectures. 607-617 - Michele Caselli
An Ultra Low-Power Programmable Voltage Reference for Power-Constrained Electronic Systems. 618-630 - Lisheng Chen
A Wideband Balanced Amplifier Using Edge-Coupled Quadrature Couplers in 0.13-μm SiGe HBT Technology. 631-641 - Myungjun Kim
An Output-Capacitorless Analog LDO Featuring Frequency Compensation of Four-Stage Amplifier. 642-654 - Kuang-Wei Cheng
Design and Analysis of a Resistive Frequency-Locked Oscillator With Long-Term Stability Using Double Chopper Stabilization. 655-666 - Alessandro Fava
A Detailed Model of Cyclostationary Noise in Switched-Resistor Circuits. 667-679 - Zi-Qi Zeng
A High Precision Analog Temperature Compensated Crystal Oscillator Using a New Temperature Compensated Multiplier. 680-693 - Juan Ignacio Morales
A Distortion-Free All-Digital Transmitter Based on Noise-Shaped PWM. 694-704 - Marouan Othmani
Parallel Delta-Sigma Modulator-Based Digital Predistortion of Wideband RF Power Amplifiers. 705-718 - Xiao Hu
AC-PM: An Area-Efficient and Configurable Polynomial Multiplier for Lattice Based Cryptography. 719-732 - Saeideh Alinezhad Chamazcoti
Exploring Pareto-Optimal Hybrid Main Memory Configurations Using Different Emerging Memories. 733-746 - Aikata
KaLi: A Crystal for Post-Quantum Security Using Kyber and Dilithium. 747-758 - Xin-Yu Shih
Design and Implementation of Decision-Tree (DT) Online Training Hardware Using Divider-Free GI Calculation and Speeding-Up Double-Root Classifier. 759-771 - Han-Gyeol Mun
Bottleneck-Stationary Compact Model Accelerator With Reduced Requirement on Memory Bandwidth for Edge Applications. 772-782 - Ofek Gur, Tomer Gross, Davide Bellizia
An In-Depth Evaluation of Externally Amplified Coupling (EAC) Attacks - A Concrete Threat for Masked Cryptographic Implementations. 783-796 - Jaehyun Park
Voltage Boosted Fail Detecting Circuit for Selective Write Assist and Cell Current Boosting for High-Density Low-Power SRAM. 797-805 - Sehee Lim
Cross-Coupled Ferroelectric FET-Based Ternary Content Addressable Memory With Energy-Efficient Match Line Scheme. 806-818 - Shih Yu Chang
Theoretical and Algorithmic Study of Inverses of Arbitrary High-Dimensional Multi-Input Multi-Output Linear-Time-Invariant Systems. 819-832 - Vinay Chakravarthi Gogineni
Algorithm and Architecture Design of Random Fourier Features-Based Kernel Adaptive Filters. 833-845 - André M. McDonald
Identification of Nonlinear Discrete Systems From Probability Density Sequences. 846-859 - Runan Guo
Dissipative Sliding-Mode Synchronization Control of Uncertain Complex-Valued Inertial Neural Networks: Non-Reduced-Order Strategy. 860-871 - Jafar Shamsi
Effect of Device Mismatches in Differential Oscillatory Neural Networks. 872-883 - Priyesh Shukla
MC-CIM: Compute-in-Memory With Monte-Carlo Dropouts for Bayesian Edge Intelligence. 884-896 - Jian Kang
Distributed Optimization of Uncertain Multiagent Systems With Disturbances and Actuator Faults via Exosystem Observer-Based Output Regulation. 897-909 - Yu Huo, Ding Wang
Off-Policy Model-Free Learning for Multi-Player Non-Zero-Sum Games With Constrained Inputs. 910-920 - Shaomeng Gu
Generalized Variable Gain ADRC for Nonlinear Systems and Its Application to Delta Parallel Manipulators. 921-930 - Hao Wan, Jin Xu, Hao Zhang, Lei Zhu:
Wideband-Filtering Switches With Ultra-Wide Stopband Using P-I-N Diodes Loaded on Slotline. 931-939 - Alessio Cortiula
A Time-Domain Simulation Framework for the Modeling of Jitter in High-Speed Serial Interfaces. 940-951 - Yuxiang Fu
A DSP-Purposed REconfigurable Acceleration Machine (DREAM) for High Energy Efficiency MIMO Signal Processing. 952-965 - Federico Milano
The Frenet Frame as a Generalization of the Park Transform. 966-976 - Eric J. Carlson
A ±0.5-mV-Minimum-Input DC-DC Converter With Stepwise Adiabatic Gate-Drive and Efficient Timing Control for Thermoelectric Energy Harvesting. 977-990
Volume 70, Number 3, March 2023
- Sudhanva Vasishta
A Single-Step Subranging Relaxation Oscillator-Based Open-Loop Sigma-Delta ADC. 993-1005 - Neha Bajpai
An Ultra-Low Noise Figure and Multi-Band Re-Configurable Low Noise Amplifier. 1006-1016 - Mahin Esmaeilzadeh
A Low-Offset VCO-Based Time-Domain Comparator Using a Phase Frequency Detector With Reduced Dead and Blind Zones. 1017-1029 - Darshan Shetty
Ultra-Low-Power Sub-1 V 29 ppm/°C Voltage Reference and Shared-Resistive Current Reference. 1030-1042 - Viet Nguyen
Exploring Speed Maximization of Frequency-to-Digital Conversion for Ultra-Low-Voltage VCO-Based ADCs. 1043-1056 - Dawei Mai
Optimized MASH-SR Divider Controller for Fractional-N Frequency Synthesizers. 1057-1070 - Hui-Yang Li
24-35 GHz Filtering LNA and Filtering Switch Using Compact Mixed Magnetic-Electric Coupling Circuit in 28-nm Bulk CMOS. 1071-1082 - Shubham Yadav
Hardware Implementations for Voice Activity Detection: Trends, Challenges and Outlook. 1083-1096 - Shashank Alevoor
A 95.2% Efficiency DC-DC Boost Converter Using Peak Current Fast Feedback Control (PFFC) for Improved Load Transient Response. 1097-1109 - Haoyang Shen
A Foreground Mismatch and Memory Harmonic Distortion Calibration Algorithm for TIADC. 1110-1120 - Kyeongmin Park
Real-Time External Compensation System With Error Correction Algorithm for High-Resolution Mobile Displays. 1121-1132 - Shaan Sengupta
A SiPM-Based Gamma Spectrometer With Field-Programmable Energy Binning for Data-Efficient Isotope Analysis. 1133-1146 - An Yang
Double-Ended Superposition Anti-Noise Resistance Monitoring Write Termination Scheme for Reliable Write Operation in STT-MRAM. 1147-1160 - Yi Yang
Modular Modeling of Analog Organic Neuromorphic Circuits: Toward Prototyping of Hardware-Level Spiking Neural Networks. 1161-1174 - Haoran Zhu
Compact, High Power Capacity, and Low Insertion Loss Millimeter-Wave On-Chip Limiting Filter With GaAs PIN Technology. 1175-1188 - Ping-Hung Yin, Chih-Wen Lu
A 216 × 216 Global-Shutter CMOS Image Sensor With Embedded Analog Memory and Automatic Exposure Control for Under-Display Optical Fingerprint Sensing Applications. 1189-1201 - Xiaoping Wu
A 53-78 GHz Complementary Push-Push Frequency Doubler With Implicit Dual Resonance for Output Power Combining. 1202-1213 - Huaiyu Liu
Analysis and Design of VCO-Based Neural Front-End With Mixed Domain Level-Crossing for Fast Artifact Recovery. 1214-1227 - Shaojun Wei
Reconfigurability, Why It Matters in AI Tasks Processing: A Survey of Reconfigurable AI Chips. 1228-1241 - Tian Xia
An Energy-and-Area-Efficient CNN Accelerator for Universal Powers-of-Two Quantization. 1242-1255 - Reid Pinkham
ANSA: Adaptive Near-Sensor Architecture for Dynamic DNN Processing in Compact Form Factors. 1256-1269 - Phap Duong-Ngoc
Area-Efficient Number Theoretic Transform Architecture for Homomorphic Encryption. 1270-1283 - Jiawei Nian
An Efficient Fault-Tolerant Protection Method for L0 BTB. 1284-1297 - Rahul Sharma
Hardware-Efficient and Short Sensing-Time Multicoset-Sampling Based Wideband Spectrum Sensor for Cognitive Radio Network. 1298-1310 - Adrian Kneip
A 7T-NDR Dual-Supply 28-nm FD-SOI Ultra-Low Power SRAM With 0.23-nW/kB Sleep Retention and 0.8 pJ/32b Access at 64 MHz With Forward Back Bias. 1311-1323 - Qiang Lai
Generating Grid Multi-Scroll Attractors in Memristive Neural Networks. 1324-1336 - Zhengguo Huang
Disturbance Utilization-Based Tracking Control for the Fixed-Wing UAV With Disturbance Estimation. 1337-1349 - Qi Luo, Shuai Liu
Privacy-Preserved Distributed Optimization for Multi-Agent Systems With Antagonistic Interactions. 1350-1360 - Jianhui Wang
Fast Finite-Time Event-Triggered Consensus Control for Uncertain Nonlinear Multiagent Systems With Full-State Constraints. 1361-1370 - Liuliu Zhang
Distributed Bipartite Containment Control of High-Order Nonlinear Multi-Agent Systems With Time-Varying Powers. 1371-1380 - Peng Shi
Event-Triggered Quantized Input-Output Finite-Time Synchronization of Markovian Neural Networks. 1381-1391 - Xiao Cai
Secure Aperiodic Sampling Control for Micro-Grids Under Abnormal Deception Cyber Attacks. 1392-1402 - Huizheng Wang
An Efficient Approximate Expectation Propagation Detector With Block-Diagonal Neumann-Series. 1403-1416 - Dongyun Kam
Low-Latency SCL Polar Decoder Architecture Using Overlapped Pruning Operations. 1417-1427
Volume 70, Number 4, April 2023
- Jialin Liu, David J. Allstot
Compressed Sensing Σ-Δ Modulators and a Recovery Algorithm for Multi-Channel Wireless Bio-Signal Acquisition. 1429-1438 - Orazio Aiello
Capacitance-to-Digital Converter for Harvested Systems Down to 0.3 V With No Trimming, Reference, and Voltage Regulation. 1439-1449 - Xu Yan
A Compact 1.0-12.5-GHz LNA MMIC With 1.5-dB NF Based on Multiple Resistive Feedback in 0.15-μm GaAs pHEMT Technology. 1450-1462 - Yunbo Huang
A 3.78-GHz Type-I Sampling PLL With a Fully Passive KPD-Doubled Primary-Secondary S-PD Measuring 39.6-fsRMS Jitter, -260.2-dB FOM, and -70.96-dBc Reference Spur. 1463-1475 - Xu Yan
A 9-to-42-GHz High-Gain Low-Noise Amplifier Using Coupled Interstage Feedback in 0.15-μm GaAs pHEMT Technology. 1476-1488 - Yaolong Hu
A Systematic Approach to Designing Broadband Millimeter-Wave Cascode Common-Source With Inductive Degeneration Low Noise Amplifiers. 1489-1502 - Jingwen Han
A Low Phase Noise Oscillator Employing Weakly Coupled Cavities Using SISL Technology. 1503-1516 - Ehsan Khodarahmi
A 16.5-31 GHz Area-Efficient Tapered Tunable Transmission Line Phase Shifter. 1517-1530 - Longjie Zhong
A 63 μg/√Hz Noise Floor and 14 pJ Power Efficiency Open-Loop MEMS Capacitive Accelerometer Using Closed-Loop Hybrid Dynamic Amplifier. 1531-1541 - Chunyu Hu
Analysis and Design of Broadband Outphasing Power Amplifier Based on Complex Combining Impedance. 1542-1554 - Ahmed Abuelnasr
Delay Mismatch Insensitive Dead Time Generator for High-Voltage Switched-Mode Power Amplifiers. 1555-1565 - Javier Beloso-Legarra
Power-Efficient Single-Stage Class-AB OTA Based on Non-Linear Nested Current Mirrors. 1566-1579 - Hyunjoon Kim
A 1-16b Reconfigurable 80Kb 7T SRAM-Based Digital Near-Memory Computing Macro for Processing Neural Networks. 1580-1590 - Suchang Kim
A CNN Inference Accelerator on FPGA With Compression and Layer-Chaining Techniques for Style Transfer Applications. 1591-1604 - Binyamin Frankel
Energy Efficiency of Opportunistic Refreshing for Gain-Cell Embedded DRAM. 1605-1612 - Zixuan Ou
An Efficient Algorithm-Hardware Co-Design for Radar-Based Fall Detection With Multi-Branch Convolutions. 1613-1624 - Chaolin Rao
An Energy-Efficient Accelerator for Medical Image Reconstruction From Implicit Neural Representation. 1625-1638 - Yan Liu
A Non-Redundant Latch With Key-Node-Upset Obstacle of Beneficial Efficiency for Harsh Environments Applications. 1639-1648 - Ladan Sayadi, Somayeh Timarchi
Two Efficient Approximate Unsigned Multipliers by Developing New Configuration for Approximate 4:2 Compressors. 1649-1659 - Jürgen Maier
The Hidden Behavior of a D-Latch. 1660-1670 - Ricardo Riaza
A Comprehensive Framework for the Thévenin-Norton Theorem Using Homogeneous Circuit Models. 1671-1684 - Luolin Xiong, Yang Tang, Chensheng Liu, Shuai Mao
Meta-Reinforcement Learning-Based Transferable Scheduling Strategy for Energy Management. 1685-1695 - Weizhen Liu
Concurrent Learning Adaptive Command Filtered Backstepping Control for High-Order Strict-Feedback Systems. 1696-1709 - Rui Meng
Dynamic Event-Triggered Control for Nonlinear Stochastic Systems With Unknown Measurement Sensitivity. 1710-1719 - Kaile Chen
Minimal Leader Selection in General Linear Multi-Agent Systems With Switching Topologies: Leveraging Submodularity Ratio. 1720-1732 - Shanrong Lin, Xiwei Liu
Passivity and Control for Multiweighted and Directed Fractional-Order Network Systems. 1733-1746 - Changchun Hua
Event-Based Output Feedback Consensus Control for Multiagent Systems With Unknown Non-Identical Control Directions. 1747-1757 - Zhe Jiang
High Speed DMT for 224 Gb/s and Faster Wireline Transmission. 1758-1771 - Mika Pulkkinen
Outlooks on Transmitter Energy Efficiency and FOM and a -189.7-dBJ/bit ULP DPPM Transmitter. 1772-1785 - Marian K. Kazimierczuk
Accurate Design of Output Filter for DC-DC PWM Buck Converter and Derived Topologies. 1786-1794 - Xiudeng Wang
A Clockless Synergistic Hybrid Energy Harvesting Technique With Simultaneous Energy Injection and Sampling for Piezoelectric and Photovoltaic Energy. 1795-1804 - Jianwen Cao, Ze-kun Zhou
An Integrated Gate Driver Based on SiC MOSFETs Adaptive Multi-Level Control Technique. 1805-1816
Volume 70, Number 5, May 2023
- Kejian Shi
Second-Order Transimpedance Amplifiers in Mixer-First Receivers: Design for Optimum Blocker Tolerance. 1821-1834 - Jiahao Song
A 28 nm 16 Kb Bit-Scalable Charge-Domain Transpose 6T SRAM In-Memory Computing Macro. 1835-1845 - Geon-Ho Park
Low-Power Decibel-Linear Programmable-Gain Amplifier With Complementary Current-Switching Technique. 1846-1855 - Yushen Fu
A 16-Bit 4.0-GS/s Calibration-Free 65 nm DAC Achieving >70 dBc SFDR and < -80 dBc IM3 Up to 1 GHz With Enhanced Constant-Switching-Activity Data-Weighted-Averaging. 1856-1867 - Yutong Zhang
Neuromorphic Circuit Implementation of Operant Conditioning Based on Emotion Generation and Modulation. 1868-1881 - Rafal Kleczek
Single Photon Counting Readout IC With 44 e- rms ENC and 5.5 e- rms Offset Spread With Charge Sensitive Amplifier Active Feedback Discharge. 1882-1892 - Mengting Yan
Design and Analysis of an On-Chip Current-Driven CMOS Parametric Frequency Divider. 1893-1906 - Jincheol Sim
PAM-4 Receiver With 1-Tap DFE Using Clocked Comparator Offset Instead of Threshold Voltages for Improved LSB BER Performance. 1907-1916 - Zhen Gu
28 Gbaud PAM-4 Burst-Mode CDR With Reconfigurable Sampling Scheme. 1917-1927 - Shuang Liu
Triple-Mode Reciprocal Doherty Power Amplifier With Multi-Band Operation and Extended High Efficiency Range. 1928-1939 - Yuhua Liang
A Reconfigurable 12-to-18-Bit Dynamic Zoom ADC With Pole-Optimized Technique. 1940-1948 - Nanda K. Unnikrishnan
InterGrad: Energy-Efficient Training of Convolutional Neural Networks via Interleaved Gradient Scheduling. 1949-1962 - Shanshan Liu
Error-Resilient Data Compression With Tunstall Codes. 1963-1975 - Rémi Garcia
Toward the Multiple Constant Multiplication at Minimal Hardware Cost. 1976-1988 - Hassan Afzali-Kusha
X-NVDLA: Runtime Accuracy Configurable NVDLA Based on Applying Voltage Overscaling to Computing and Memory Units. 1989-2002 - Zhen Gao
A Methodology for the Design of Fault Tolerant Parallel Digital Channelizers on SRAM-FPGAs. 2003-2015 - Yuzong Chen
BP-SCIM: A Reconfigurable 8T SRAM Macro for Bit-Parallel Searching and Computing In-Memory. 2016-2027 - Aurélien Alacchi
Low Latency SEU Detection in FPGA CRAM With In-Memory ECC Checking. 2028-2036 - Erfan Abbasian
Energy-Efficient Single-Ended Read/Write 10T Near-Threshold SRAM. 2037-2047 - Yanan Sun
BC-MVLiM: A Binary-Compatible Multi-Valued Logic-in-Memory Based on Memristive Crossbars. 2048-2061 - Yuqin Dou
ENAP: An Efficient Number-Aware Pruning Framework for Design Space Exploration of Approximate Configurations. 2062-2073 - Janak Sharda
Temporal Frame Filtering for Autonomous Driving Using 3D-Stacked Global Shutter CIS With IWO Buffer Memory and Near-Pixel Compute. 2074-2084 - Sungsoo Cheon
A 2941-TOPS/W Charge-Domain 10T SRAM Compute-in-Memory for Ternary Neural Network. 2085-2097 - Navneet Sharma, Pravindra Kumar
A Novel Method for Authentication Using Chaotic Behaviour of Chua's Oscillator in (n,k) Secret Shared Data Scheme for Secure Communication. 2098-2105 - Mostafizur Rahaman Laskar
A Complexity-Efficient Quantum Architecture and Simulation for Eigen Spectrum Estimation of Vandermonde System in a Large Antenna Array. 2106-2119 - Bo Xu
Dynamic Event-Triggered Reinforcement Learning-Based Consensus Tracking of Nonlinear Multi-Agent Systems. 2120-2132 - Keqi Mei
Design of Adaptive SOSM Controller Subject to Disturbances With Unknown Magnitudes. 2133-2142 - Shuqi Chen
Edge-Based Sender-Receiver Event-Triggered Schemes for Distributed Filtering. 2143-2155 - Tong Liu
Model-Free Adaptive Containment Control for Unknown Multi-Input Multi-Output Nonlinear MASs With Output Saturation. 2156-2166 - Yukan Zheng, Yuan-Xin Li
Adaptive Synchronization for Networked Parabolic PDE Systems With Uncertain Nonlinear Actuator Dynamics. 2167-2178 - Thakshanth Uthayakumar
Scalable Single-Input Behavioral Modeling Architecture for MIMO Systems With Crosstalk. 2179-2188 - Yelzhas Zhaksylyk
Single-Sided Interspiraled Inductive Impedance Matching for Magnetic Resonance Wireless Power Transfer. 2189-2200 - Bo Zhang, Chunxia Dou
Event-Triggered Hierarchical Multi-Mode Management Strategy for Source-Load-Storage in Microgrids. 2201-2214 - Yao Qin
A 50-V 50-MHz High-Noise-Immunity Capacitive-Coupled Level Shifter With Digital Noise Blanker for GaN Drivers. 2215-2227
Volume 70, Number 6, June 2023
- Maurício Banaszeski da Silva
Random Telegraph Noise in Analog CMOS Circuits. 2229-2242 - Mohammad Oveisi
A Study of a Millimeter-Wave Transmitter Architecture Realizing QAM Directly in RF Domain. 2243-2256 - Chi-Wei Huang
A CMOS Synchronized Sample-and-Hold Artifact Blanking Analog Front-End Local Field Potential Acquisition Unit With ±3.6-V Stimulation Artifact Tolerance and Monopolar Electrode-Tissue Impedance Measurement Circuit for Closed-Loop Deep Brain Stimulation SoCs. 2257-2270 - Tuomin Tao
Modeling and Analysis of Spike Signal Sequence for Memristor Crossbar Array in Neuromorphic Chips. 2271-2282 - Andrea Ballo
Very-Low-Voltage Charge Pump Topologies for IoT Applications. 2283-2292 - Xin Xin
A Power-Efficient 13-Tap FIR Filter and an IIR Filter Embedded in a 10-Bit SAR ADC. 2293-2305 - Fabricio Alcalde Bessia
A Sub-Electron-Noise Multi-Channel Cryogenic Skipper-CCD Readout ASIC. 2306-2316 - Keisuke Kawahara
A 0.0058-mm2 Inductor-Less CMOS Active Balun With Gain and Phase Errors Within -0.1 ± 0.2 dB and -0.18 ± 1.17° From DC to 8 GHz. 2317-2330 - Junwei Sun
Generalization and Differentiation Circuit Design Based on Memristor Under Different Emotional Conditions. 2331-2341 - Yi-Ta Chen
S-QRD-ELM: Scalable QR-Decomposition-Based Extreme Learning Machine Engine Supporting Online Class-Incremental Learning for ECG-Based User Identification. 2342-2355 - Liu Liu
A Reconfigurable FeFET Content Addressable Memory for Multi-State Hamming Distance. 2356-2369 - Weiwei Wu
STAR: An STGCN ARchitecture for Skeleton-Based Human Action Recognition. 2370-2383 - Siyu Zhang
An Efficient Accelerator Based on Lightweight Deformable 3D-CNN for Video Super-Resolution. 2384-2397 - Wenjun Tang
FeFET-Based Logic-in-Memory Supporting SA-Free Write-Back and Fully Dynamic Access With Reduced Bitline Charging Activity and Recycled Bitline Charge. 2398-2411 - Bi Wu
MLiM: High-Performance Magnetic Logic in-Memory Scheme With Unipolar Switching SOT-MRAM. 2412-2424 - Mahidhar Puligunta
Squeezing Area of the Versatile GF (2m) GNB Arithmetic Operators. 2425-2438 - Zhuoying Zhao
A Heterogeneous Parallel Non-von Neumann Architecture System for Accurate and Efficient Machine Learning Molecular Dynamics. 2439-2449 - Gianmarco Ottavi
Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode. 2450-2463 - Maxime Schramme
UFBBR: A Unified Frequency and Back-Bias Regulation Unit for Ultralow-Power Microcontrollers in 28-nm FDSOI. 2464-2477 - Guodao Zhang
Efficient Implementation of Spontaneous Calcium Oscillations in the Central Nervous System on Reconfigurable Digital Boards. 2478-2486 - Donghyuk Kim
Agamotto: A Performance Optimization Framework for CNN Accelerator With Row Stationary Dataflow. 2487-2496 - Michael R. Wasef
SoC Reconfigurable Architecture for Implementing Software Trained Recurrent Neural Networks on FPGA. 2497-2510 - Pengbo Liu
Globally Coupled Private Image Encryption Algorithm Based on Infinite Interval Spatiotemporal Chaotic System. 2511-2522 - Huihong Shi
NASA+: Neural Architecture Search and Acceleration for Multiplication-Reduced Hybrid Networks. 2523-2536 - Yingqing Pei
Distributed Nash Equilibrium Seeking for Aggregative Games With Quantization Constraints. 2537-2549 - Deyuan Liu
Time-Varying Formation of Heterogeneous Multiagent Systems via Reinforcement Learning Subject to Switching Topologies. 2550-2560 - Zepeng Ning
Quantization-Uncertainty-Dependent Analysis and Control of Linear Systems With Multi-Input-Multi-Output Quantization. 2561-2572 - Adeel Arif
Finite-Time Tracking of Moving Platform With Single Camera for Quadrotor Autonomous Landing. 2573-2586 - Hao Li
Finite-Time Control of High-Order Nonlinear Random Systems Using State Triggering Signals. 2587-2598 - Lin Chen
A Novel Adaptive Control Scheme for Automotive Electronic Throttle Based on Extremum Seeking. 2599-2611 - Yi Wu
Synthesis Design of Multiband Bandpass Filters Employing Multimode Bandstop Resonators With Star-Like Topology. 2612-2624 - Xiaoxuan Ji, Peng Zhao
Multiple-Receiver Inductive Power Transfer System Based on Multiple-Coil Power Relay Module. 2625-2634
Volume 70, Number 7, July 2023
- Lin Wang
A 10.8-to-37.4 Gb/s Reference-Less FD-Less Single-Loop Quarter-Rate Bang-Bang Clock and Data Recovery Employing Deliberate-Current- Mismatch Wide-Frequency-Acquisition Technique. 2637-2650 - Yixi Tang, Wenjie Feng
Broadband High-Efficiency Dual-Mode Doherty Power Amplifier Using Hybrid F/F-1 Continuous-Mode Technology. 2651-2664 - Christian Hoyer
Entrainment of Mutually Synchronized Spatially Distributed 24 GHz Oscillators. 2665-2678 - Albi Mema
FDSOI-Based Analog Computing for Ultra-Efficient Hamming Distance Similarity Calculation. 2679-2688 - Bayartulga Ishdorj
Offset-Canceling Current-Latched Sense Amplifier With Slow Rise Time Control and Reference Voltage Biasing Techniques. 2689-2699 - Michael Pietzko
Delay Error Shaping in ΔΣ Modulators Using Time-Interleaved High Resolution Quantizers. 2700-2710 - Yanjin Lyu
A Matching Strategy Based on Full-Permutation Bisection for Data Converters. 2711-2721 - Alexander Petrie, Yixin Song
A 0.2-V 10-Bit 5-kHz SAR ADC With Dynamic Bulk Biasing and Ultra-Low-Supply-Voltage Comparator. 2722-2733 - Yoonjae Choi
A 4-GHz Ring-Oscillator-Based Digital Sub-Sampling PLL With Energy-Efficient Dual-Domain Phase Detector. 2734-2743 - Benjamin Coquillas
Ku Band SiGe Power Amplifier With High Output Power and SWR Robustness Up to 120 °C. 2744-2751 - Liying Cai
A Linear-in-Decibel Automatic Gain Control Amplifier With Dual Mode Continuous Gain Tuning. 2752-2761 - Yiming Chen
SAMBA: Single-ADC Multi-Bit Accumulation Compute-in-Memory Using Nonlinearity- Compensated Fully Parallel Analog Adder Tree. 2762-2773 - Weimin Shi
Load Mismatch Compensation of Doherty Power Amplifier Using Dual-Input and Mode Reconfiguration Techniques. 2774-2787 - Mohammad Elmi
An Ultra-Low-Power Non-Uniform Derivative-Based Sampling Scheme With Tunable Accuracy. 2788-2801 - Tenghao Zou
A 6-12 GHz Wideband Low-Noise Amplifier With 0.8-1.5 dB NF and ±0.75 dB Ripple Enabled by the Capacitor Assisting Triple-Winding Transformer. 2802-2813 - Feng Wei
Balanced Filtering Phase Shifters With Low Phase Deviation and High Common-Mode Suppression. 2814-2822 - Nikita Mirchandani
A 254-nW 20-kHz On-Chip RC Oscillator With 21-ppm/°C Minimum Temperature Stability and 10-ppm Long Term Stability. 2823-2833 - Xiangyu Li
Design of a Novel Self-Test-on-Chip Interface ASIC for Capacitive Accelerometers. 2834-2843 - Han-Sol Lee
A Multi-Channel Neural Recording System With Neural Spike Scan and Adaptive Electrode Selection for High-Density Neural Interface. 2844-2857 - Dawit Burusie Abdi
3D SRAM Macro Design in 3D Nanofabric Process Technology. 2858-2867 - Dong Jiang
A Network-on-Chip-Based Annealing Processing Architecture for Large-Scale Fully Connected Ising Model. 2868-2880 - Yunsong Deng
Distributed Estimation and Smoothing for Linear Dynamic Systems Over Sensor Networks. 2881-2890 - Shubham Kumar
Cross-Layer Reliability Modeling of Dual-Port FeFET: Device-Algorithm Interaction. 2891-2903 - Amin Faraji
A New Macromodeling Method Based on Deep Gated Recurrent Unit Regularized With Gaussian Dropout for Nonlinear Circuits. 2904-2915 - Qinghui Hong
Programmable In-Memory Computing Circuit for Solving Combinatorial Matrix Operation in One Step. 2916-2928 - Yuval Bistritz
Routh Zero Location Tests Unhampered by Nonessential Singularities. 2929-2942 - Shuai Mao
Differentially Private Distributed Optimization With an Event-Triggered Mechanism. 2943-2956 - Ye Cao
Prescribed Time Recovery From State Constraint Violation via Approximation-Free Control Approach. 2957-2967 - Kui Ding
Disturbance-Observer-Based Finite-Time Antidisturbance Control for Markov Switched Descriptor Systems With Multi-Disturbances and Intermittent Measurements. 2968-2981 - Yuxiang Hu
Robust Fault Estimation and Fault-Tolerant Control for Discrete-Time Systems Subject to Periodic Disturbances. 2982-2994 - Xiehuan Li
Security-Based Event-Triggered Fuzzy Control for Multiarea Power Systems Under Cross-Layer DoS Attacks. 2995-3004 - Yunlong Wang, Yongfu Wang
Finite-Time Adaptive Neural Network Observer-Based Output Voltage-Tracking Control for DC-DC Boost Converters. 3005-3016 - Frida Strömbeck
A Beyond 100-Gbps Polymer Microwave Fiber Communication Link at D-Band. 3017-3028 - Seungsik Moon
A Scalable Precoding Processor for Large-Scale MU-MIMO Systems. 3029-3039 - Tsung-Heng Tsai
A 180 nA Quiescent Current Digital Control Dual-Mode Buck Converter With a Pulse-Skipping Load Detector for Long-Range Applications. 3040-3048 - Wenyu Peng
The Advances in Conversion Techniques in Triboelectric Energy Harvesting: A Review. 3049-3062
Volume 70, Number 8, August 2023
- Jialin Liu, David J. Allstot
A Chopper-Stabilized Switched-Capacitor Front-End for Peripheral Nervous System Recording. 3065-3074 - Ying Liu
An 82-nW 0.53-pJ/SOP Clock-Free Spiking Neural Network With 40-μs Latency for AIoT Wake-Up Functions Using a Multilevel-Event-Driven Bionic Architecture and Computing-in-Memory Technique. 3075-3088 - Shivendra Singh Parihar
Cryogenic CMOS for Quantum Processing: 5-nm FinFET-Based SRAM Arrays at 10 K. 3089-3102 - Shuyang Li
Analysis and Design of Broadband Balance-Compensated Transformer Baluns for Silicon-Based Millimeter-Wave Circuits. 3103-3116 - Han Zhou
A Wideband and Highly Efficient Circulator Load Modulated Power Amplifier Architecture. 3117-3129 - Quan Xu
Locally Active Memristor-Based Neuromorphic Circuit: Firing Pattern and Hardware Experiment. 3130-3141 - Jing Li
A 20 nW +0.8°C/-0.8°C Inaccuracy (3σ) Leakage-Based CMOS Temperature Sensor With Supply Sensitivity of 0.9°C/V. 3142-3153 - Amin Pourvali Kakhki
An Energy Efficient Coherent IR-UWB Receiver With Non-Coherent-Assisted Synchronization. 3154-3166 - Yuyuan Tian
A Low-Noise and Low-Power Multi-Channel ECG AFE Based on Orthogonal Current-Reuse Amplifier. 3167-3177 - Lang Chen, Lisheng Chen
A 40-GHz Load Modulated Balanced Power Amplifier Using Unequal Power Splitter and Phase Compensation Network in 45-nm SOI CMOS. 3178-3186 - Lianxi Liu
MPPT Multiplexed Hybrid Energy Harvesting Interface With Adaptive Switching Cycle and Single-Cycle Sampling for Wearable Electronics. 3187-3197 - Yanan Sun
CREAM: Computing in ReRAM-Assisted Energy- and Area-Efficient SRAM for Reliable Neural Network Acceleration. 3198-3211 - Samuel Santos Pereira
Scalable Resource Optimized LUT-Based All-Digital Transmitter. 3212-3220 - Yu Wang
Multi-Agent Bifurcation Consensus-Based Multi-Layer UAVs Formation Keeping Control and Its Visual Simulation. 3221-3233 - Naina Gupta
Lightweight Hardware Accelerator for Post-Quantum Digital Signature CRYSTALS-Dilithium. 3234-3243 - Jaehan Park
A Reconfigurable LDO-Assisted Physically Unclonable Function Achieving a Zero-BER With 14% Masking. 3244-3253 - Arnab Bag
CAMiSE: Content Addressable Memory-Integrated Searchable Encryption. 3254-3267 - Yuan Zhang
High-Precision Method and Architecture for Base-2 Softmax Function in DNN Training. 3268-3279 - Jiangli Huang
An Analog Circuit Building Block Generator via Nested Multi-Fidelity Modeling. 3280-3293 - Shanglin Li
Distributed Fault Detection and Dynamic Event-Triggered Consensus for Heterogeneous Multiagent Systems Under Deception Attacks. 3294-3304 - Zengjie Zhang
A Persistent-Excitation-Free Method for System Disturbance Estimation Using Concurrent Learning. 3305-3315 - Chunting Ji
Event-Triggered Control for a Second Order ODE-Heat System Coupling at Intermediate Point. 3316-3326 - Yanyan Ye
Consensus of Networked Fractional-Order Systems With Intermittent Sampled Position Measurements. 3327-3335 - Yewei Yu
Neural Network Adaptive Control of Magnetic Shape Memory Alloy Actuator With Time Delay Based on Composite NARMAX Model. 3336-3346 - Jing Zhao
Observer-Based Discrete-Time Cascaded Control for Lateral Stabilization of Steer-by-Wire Vehicles With Uncertainties and Disturbances. 3347-3358 - Richelle L. Smith
Differential Edge Modulation Signaling for Low-Energy, High-Speed Wireline Communication. 3359-3372 - María Camila Merchán-Riveros
Three Time-Scale Singular Perturbation Hybrid Control and Large-Signal Analysis Stability in AC-Microgrids. 3373-3386 - Subhrashree Pritichhanda
A Sensorless Peak Current-Mode Controlled DC-DC Converter: Design and Robustness Analysis Using Time-Scale Decomposition. 3387-3398 - Mahmoud Hassan Kamel Hmada
An Adaptive Fully Integrated Wide-Range Power Management Unit With Fractional Charge Pump for Micro-Scale Energy Harvesting Applications. 3399-3408
Volume 70, Number 9, September 2023
- Shanthi Pavan
Reciprocity and Inter-Reciprocity: A Tutorial - Part I: Linear Time-Invariant Networks. 3413-3421 - Shanthi Pavan
Reciprocity and Inter-Reciprocity: A Tutorial - Part II: Linear Periodically Time-Varying Networks. 3422-3435 - Benoit Gosselin
Guest Editorial Special Issue on the IEEE International NEWCAS Conference 2022. 3436-3439 - Kota Shiba
Polyomino: A 3D-SRAM-Centric Accelerator for Randomly Pruned Matrix Multiplication With Simple Reordering Algorithm and Efficient Compression Format in 180-nm CMOS. 3440-3450 - Yongqian Du
Single Antenna and No Circulator Full-Duplex With 52 dB Wideband Self-Interference Suppression. 3451-3460 - Fei Yuan
Bi-Directional Gated Ring Oscillator Time Integrator. 3461-3473 - Stefan Reich
In Vitro Study of Artifact-Recovery Using a 32-Channel Neuromodulator Platform. 3474-3483 - Frederik Dreyer
A 5-780-MHz Transceiver ASIC for Multinuclear NMR Spectroscopy in 0.13-μm BiCMOS. 3484-3496 - Zhaoguang Si
Memristor-Assisted Background Calibration for SAR ADCs: A Feasibility Study. 3497-3508 - Raphael Nägele
Analog Multiply-Accumulate Cell With Multi-Bit Resolution for All-Analog AI Inference Accelerators. 3509-3521 - Magali Ozon
Motion Detection and Analysis Using Multimaterial Fiber Sensors. 3522-3533 - Cristian Bocciarelli, Francesco Centurelli
High-Accuracy Low-Cost Generalized Complex Pruned Volterra Models for Nonlinear Calibration. 3534-3544 - Teng-Shen Yang
A 2.4-GHz Ring-VCO-Based Sub-Sampling PLL With a -70-dBc Reference Spur by Adopting a Capacitor-Multiplier-Based Sub-Sampling DLL. 3545-3556 - Dengquan Li
A 7-bit 3.8-GS/s 2-Way Time-Interleaved 4-bit/Cycle SAR ADC 16× Time-Domain Interpolation in 28-nm CMOS. 3557-3566 - Sandeep Tripathi
An 8T PA Attack Resilient NVSRAM for In-Memory-Computing Applications. 3567-3574 - Ling Wang
A 44-μW, 91.3-dB SNDR DT Δ Σ Modulator With Second-Order Noise-Shaping SAR Quantizer. 3575-3583 - Jiahao Zhang
FPGA Implementation for Finite-Time and Fixed-Time Neurodynamic Algorithms in Constrained Optimization Problems. 3584-3597 - Charalampos Eleftheriadis
Optimal Adder-Multiplexer Co-Optimization for Time-Multiplexed Multiplierless Architectures. 3598-3611 - JongHyun Ko
Exploration of Ternary Logic Using T-CMOS for Circuit-Level Design. 3612-3624 - Chenjia Xie, Zhuang Shao
An Efficient CNN Inference Accelerator Based on Intra- and Inter-Channel Feature Map Compression. 3625-3638 - Xingwen Zhou
FPGA Implementation of Non-Commensurate Fractional-Order State-Space Models. 3639-3652 - Shuai Hu
High Throughput and Hardware Efficient Hybrid LDPC Decoder Using Bit-Serial Stochastic Updating. 3653-3664 - Wenxu Zhang
Generalized FRM-Based P-L Band Multi-Channel Channelizers for Array Signal Processing System. 3665-3675 - Jianeng Tang
A Simple Chaotic Model With Complex Chaotic Behaviors and Its Hardware Implementation. 3676-3688 - Wenhao Liu
The Parallel Chaotification Map and Its Application. 3689-3698 - Paul R. Genssler
Modeling and Predicting Transistor Aging Under Workload Dependency Using Machine Learning. 3699-3711 - Hui Peng
H∞ Pinning Synchronization Control for Markovian Intermittent Time-Varying Coupled Neural Networks Under Multiplicative Noises. 3712-3722 - Xindong Si
Sampled-Data-Based Bipartite Leader-Follower Synchronization of Cooperation-Competition Neural Networks via Interval-Scheduled Looped-Functions. 3723-3734 - Yiheng Wei
LMI Stability Condition for Delta Fractional Order Systems With Region Approximation. 3735-3745 - Chaoqun Guo
Non-Singular Fixed-Time Tracking Control of Uncertain Nonlinear Pure-Feedback Systems With Practical State Constraints. 3746-3758 - Xinsong Yang
Non-Weighted L2-Gain Analysis for Synchronization of Switched Nonlinear Time-Delay Systems With Random Injection Attacks. 3759-3769 - Zhen Gao
Efficient Protection of FPGA Implemented LDPC Decoders Against Single Event Upsets (SEUs) on Configuration Memories. 3770-3780 - Sanming Hu
D-Band On-Chip Couplers With Multilayered Slow-Wave Unit Cell in Standard CMOS Process. 3781-3789 - Xuchu Mu
Floating-Domain Integrated GaN Driver Techniques for DC-DC Converters: A Review. 3790-3805 - Fatemeh Nasr Esfahani
Maximum Wireless Power Transmission Using Real-Time Single Iteration Adaptive Impedance Matching. 3806-3817
Volume 70, Number 10, October 2023
- Rundao Lu
A Direct Frequency-Interleaving Continuous-Time Bandpass Delta-Sigma ADC. 3821-3831 - Chaitanya Kumar
Power-Noise Trade-Offs in Continuous-Time Pipelined ADCs and Active Filters. 3832-3842 - Roberto Gómez-García
Flat-Group-Delay RF Planar Filters With Transmission Zeros Using Transversal Circuits. 3843-3856 - Xiangyu Mao
A High-Current Scalable Parallel LDO Scheme With Analog-Digital Merged Control for Small Current-Sharing Mismatch. 3857-3866 - Zehui Kang
A 5-mW 30-GHz Quasi-Rotary Traveling-Wave Oscillator With Extrinsic-Q-Enhanced Transmission Line. 3867-3878 - Naci Pekcokguler
An Ultra-Low-Power Widely-Tunable Complex Band-Pass Filter for RF Spectrum Sensing. 3879-3887 - Jennifer Hasler
A Programmable Adaptive-Q BPF Circuit. 3888-3898 - Qian Li
Design Method of Reconfigurable N-Way Power Divider Based on Reconfigurable Impedance Matching Network. 3899-3907 - Liang Chang
TDPRO: Time-Domain-Based Computing-in Memory Engine for Ultra-Low Power ECG Processor. 3908-3919 - Xiao-Fang Li
Dual-Band Bandpass Filter Based on Suspended Coplanar Waveguide-Microstrip Hybrid. 3920-3929 - Dong Wang
A 2.85-mm2 Wideband RF Transceiver in 40-nm CMOS for IoT Micro-Hub Applications. 3930-3943 - Kaili Zhang, Deming Zhang
A Novel 9T1C-SRAM Compute-In-Memory Macro With Count-Less Pulse-Width Modulation Input and ADC-Less Charge-Integration-Count Output. 3944-3953 - Hiroshi Fuketa
Lookup Table-Based Computing-in-Memory Macro Approximating Dot Products Without Multiplications for Energy-Efficient CNN Inference. 3954-3963 - Hongtu Zhang
WDVR-RAM: A 0.25-1.2 V, 2.6-76 POPS/W Charge-Domain In-Memory-Computing Binarized CNN Accelerator for Dynamic AIoT Workloads. 3964-3977 - Quan Cheng
Reliability Exploration of System-on-Chip With Multi-Bit-Width Accelerator for Multi-Precision Deep Neural Networks. 3978-3991 - Víctor Manuel Bautista
Serial Butterflies for Non-Power-of-Two FFT Architectures in 5G and Beyond. 3992-4003 - Zeynep Kaya
Low-Latency 64-Parallel 4096-Point Memory-Based FFT for 6G. 4004-4014 - Yan Li
DMBF: Design Metrics Balancing Framework for Soft-Error-Tolerant Digital Circuits Through Bayesian Optimization. 4015-4027 - Congyang Liu
A Low-Power Hybrid-Precision Neuromorphic Processor With INT8 Inference and INT16 Online Learning in 40-nm CMOS. 4028-4039 - Raul Murillo
Generating Posit-Based Accelerators With High-Level Synthesis. 4040-4052 - Zhan Zhang
Exploiting Symmetries in the Design and Implementation of Polynomial/Trigonometric Beamformers for Uniform Circular Arrays. 4053-4066 - Chengpei Wu
SPP-CNN: An Efficient Framework for Network Robustness Prediction. 4067-4079 - Shidong Zhai
Leaderless Cluster Consensus of Second-Order General Nonlinear Multiagent Systems Under Directed Topology. 4080-4091 - Xudong Wang
Robust Guaranteed Synchronization for Chaotic Systems With Incremental Quadratic Constraints. 4092-4102 - Shih-Yu Li
An Efficient Image Encryption Algorithm Based on Innovative DES Structure and Hyperchaotic Keys. 4103-4111 - Xianghua Wang
Sensor Fault Tolerant Control for a 3-DOF Helicopter Considering Detectability Loss. 4112-4125 - Kai Zhao
Composite Nonlinear Extended State Observer-Based Trajectory Tracking Control for Quadrotor Under Input Constraints. 4126-4136 - Zhen Wu
Finite-Time State Zonotopes Design for Asynchronously Switched Systems With Application to a Switched Converter. 4137-4145 - Ali Moradi Amani
Discovering Important Nodes of Complex Networks Based on Laplacian Spectra. 4146-4158 - Feng Shu
Event-Triggered Prescribed-Time Tracking Control for Nonlinear Systems With Asynchronous Switching. 4159-4168 - Kunmo Kim
Precursor ISI Cancellation Sliding-Block DFE for High-Speed Wireline Receivers. 4169-4182 - Qiang Wu
A High Precision CV Control Scheme for Low Power AC-DC BUCK Converter Controller. 4183-4193 - Bin Liu
Influence Analysis of Oscillation Harmonics in LCC-HVDC Delivery System Based on Impedance Modeling. 4194-4203 - Bo Zhang, Chunxia Dou
Transmission and Decision-Making Co-Design for Active Support of Region Frequency Regulation Through Distribution Network-Side Resources. 4204-4217
Volume 70, Number 11, November 2023
- Xiaojin Zhao
APCCAS 2022 Guest Editorial Special Issue Based on the 18th Asia Pacific Conference on Circuits and Systems. 4221-4222 - Gang Shi, Xianglong Wang, Yichen Ouyang
A Spatio-Temporal Video Denoising Co-Processor With Adaptive Codec. 4223-4234 - Shiying Zhang, Fukun Su, Yi Wang, Songping Mai, Kong-Pang Pun
A Low-Power Keyword Spotting System With High-Order Passive Switched-Capacitor Bandpass Filters for Analog-MFCC Feature Extraction. 4235-4248 - Leyi Chen, Cong Shi
An 8-T Processing-in-Memory SRAM Cell-Based Pixel-Parallel Array Processor for Vision Chips. 4249-4259 - Kangjie Long
Analysis and Design of Precision-Scalable Computation Array for Efficient Neural Radiance Field Rendering. 4260-4270 - Sikai Chen
A 50Gb/s CMOS Optical Receiver With Si-Photonics PD for High-Speed Low-Latency Chiplet I/O. 4271-4282 - Chenggang Yan
Design of High Hardware Efficiency Approximate Floating-Point FFT Processor. 4283-4294 - Jianwen Luo
HRFF: Hierarchical and Recursive Floorplanning Framework for NoC-Based Scalable Multidie FPGAs. 4295-4308 - Subin Kim, Ian Galton
Adaptive Cancellation of Inter-Symbol Interference in High-Speed Continuous-Time DACs. 4309-4322 - Aurojyoti Das
High-Throughput Nanopore-FET Array Readout IC With 5-MHz Bandwidth and Background Offset/Drift Calibration. 4323-4333 - Daniel S. Truesdell
Modeling and Design of Cold-Start Charge Pumps for Photovoltaic Energy Harvesters. 4334-4345 - Paul Kaesser
Frequency-Domain Analysis of Reconfigured Incremental ΔΣ ADCs on the Example of the Exponential Phase. 4346-4356 - Heng Zhang
SSM-CIM: An Efficient CIM Macro Featuring Single-Step Multi-bit MAC Computation for CNN Edge Inference. 4357-4368 - Junwei Sun
Memristor-Based Neural Network Circuit of Duple-Reward and Duple-Punishment Operant Conditioning With Time Delay. 4369-4379 - Ming-Liang Wei
Impact of Non-Volatile Memory Cells on Spiking Neural Network Annealing Machine With In-Situ Synapse Processing. 4380-4393 - Zhenyi Zhang
A 0.0325-mm² 114-to-147-GHz 6-Bit Passive Vector-Modulated Phase Shifter With MN-Embedded Isolated Power Combiner Achieving <3.7° RMS Phase Error in 65-nm CMOS. 4394-4405 - Jie Yang
Orthogonal Filter Frequency Followed by LNA Linearity Tuning for Efficient Instinctual GaN Receiver Front-End. 4406-4417 - Marco Cavallaro
An Active Resistor for Ultra Low Power Applications. 4418-4425 - Jingyu Weng, Xiaojun Bi
A Continuously-Tunable Optoelectronic Oscillator With Full Locking Range Utilizing Three Frequency Tuning Mechanisms. 4426-4434 - Shuyuan Ye, Zhili Long
Investigation to Dual-Frequency Direct Digital Synthesis and Resonance Frequency Tracking in Power Ultrasonic Generator. 4435-4446 - Milad Ghanbarpour
Digital Hardware Implementation of Morris-Lecar, Izhikevich, and Hodgkin-Huxley Neuron Models With High Accuracy and Low Resources. 4447-4455 - Wenjie Liu
Secure and Efficient Two-Party Quantum Scalar Product Protocol With Application to Privacy-Preserving Matrix Multiplication. 4456-4469 - Kuozhong Zhang
Design of a Compact Superconducting RSFQ Register File. 4470-4477 - Wenzhe Zhao
Optimizing FPGA-Based DNN Accelerator With Shared Exponential Floating-Point Format. 4478-4491 - Hossein Rezaei
High-Throughput Rate-Flexible Combinational Decoders for Multi-Kernel Polar Codes. 4492-4504 - Wenbo Guo
Highly-Efficient Hardware Architecture for CRYSTALS-Kyber With a Novel Conflict-Free Memory Access Pattern. 4505-4515 - Morteza Fayazi
AnGeL: Fully-Automated Analog Circuit Generator Using a Neural Network Assisted Semi-Supervised Learning Approach. 4516-4529 - Mohamad Moner Al Chawa
A Compact Model of Threshold Switching Devices for Efficient Circuit Simulations. 4530-4538 - Jinghan Li
Bumpless Transfer Control for Switched Linear Systems: A Hierarchical Switching Strategy. 4539-4548 - Bin Zhang
Fourier-Based Multi-Agent Formation Control to Track Evolving Closed Boundaries. 4549-4559 - Yan Lei
Semi-Global Bounded Output Regulation of Linear Two-Time-Scale Systems With Input Saturation. 4560-4569 - Guoliang Chen
Controller Synthesis of Aperiodic Sampled-Data Networked Control System With Application to Interleaved Flyback Module Integrated Converter. 4570-4580 - Yasuaki Kuroe
A Sensitivity Analysis Method for a Class of Cyber-Physical Systems and Its Application to Parameter Optimization. 4581-4594 - Yunzhe Yang, Mo Huang
A Level Shifter With Almost Full Immunity to Positive dv/dt for Buck Converters. 4595-4604 - Nunzio Spina
Fully Integrated Galvanic Isolation Interface in GaN Technology. 4605-4614 - Yitong Li
The Intrinsic Communication in Power Systems: A New Perspective to Understand Synchronization Stability. 4615-4626 - Xuliang Wang
A Self-Clocked and Variation-Tolerant Unified Voltage-and-Frequency Regulator for In-Order Executed Digital Loads. 4627-4640 - Qiang Chen
Unknown System Dynamic Estimator-Based Two-Phase Power Reaching Law Control for DC-DC Buck Converter. 4641-4649 - Chenjin Xu
Sensitivity Analysis of Free-Standing Columnar Magnetic Field Energy Harvester for Powering Wireless Monitoring Sensors. 4650-4659 - Peng Xu
A 0.15-μs/V Buck-Boost Symbol-Power-Tracking Supply Modulator With Dual Auxiliary Current Paths and EPP Scheme for 5G NR Power Amplifiers. 4660-4670
Volume 70, Number 12, December 2023
- Weisheng Zhao, Hai Helen Li, Domenico Zito:
Outgoing Editorial. 4675-4677 - Hai Helen Li:
Guest Editorial Special Issue on the International Symposium on Integrated Circuits and Systems - ISICAS 2023. 4678 - Lai Wei
A 12-bit 1GS/s ADC With Background Distortion and Split-ADC-Like Gain Calibration. 4679-4691 - Nardi Utomo
An 85.1% Peak Efficiency, Low Power Class H Audio Amplifier With Full Class H Operation. 4692-4704 - Jack Kee Yong, Wen Xun Lian
A Fully Integrated CMOS Tri-Band Ambient RF Energy Harvesting System for IoT Devices. 4705-4718 - Caolei Pan
A Continuous-Output-Current Buck-Boost Converter Without Right-Half-Plane-Zero (RHPZ). 4719-4728 - Yue Hu, Yuekai Liu
A Two-Channel Time-Interleaved Continuous-Time Third-Order CIFF-Based Delta-Sigma Modulator. 4729-4741 - Xinwei Yu
28-nm CMOS Ultrasound AFE With Split Attenuation for Optimizing Gain-Range, Noise, and Area. 4742-4754 - Chi-Wa U
An 1 V Supply, 740 nW, 8.7 ppm/°C Bandgap Voltage Reference With Segmented Curvature Compensation. 4755-4766 - Mingqiang Guo
A 10b 700 MS/s Single-Channel 1b/Cycle SAR ADC Using a Monotonic-Specific Feedback SAR Logic With Power-Delay-Optimized Unbalanced N/P-MOS Sizing. 4767-4780 - Gaofeng Tan, Xinyu Qin, Yan Liu
A 10MHz-BW 85dB-DR CT 0-4 Mash Delta-Sigma Modulator Achieving +5dBFS MSA. 4781-4792 - Yong-Un Jeong
Single-Ended Receiver-Side Crosstalk Cancellation With Independent Gain and Timing Control for Minimum Residual FEXT. 4793-4803 - Hritom Das
An Efficient and Accurate Memristive Memory for Array-Based Spiking Neural Networks. 4804-4815 - Satyam Shukla
An Efficient Fault-Tolerant Instruction Decoder for RISC-V Based Dual-Core Soft-Processors. 4816-4825 - Jongbeom Kim
T3L: A Practical Implementation of Tri-Transistor Ternary Logic Based on Inkjet-Printed Anti-Ambipolar Transistors and CMOSs of Thin-Film Structure. 4826-4839 - Nima Amirafshar
Carry Disregard Approximate Multipliers. 4840-4853 - Thang Xuan Pham
An Efficient Unified Polynomial Arithmetic Unit for CRYSTALS-Dilithium. 4854-4864 - Lujie Peng
A High Accuracy and Low Power CNN-Based Environmental Sound Classification Processor. 4865-4876 - Leonardo Heitich Brendler
A Proof-of-Concept of a Multiple-Cell Upsets Detection Method for SRAMs in Space Applications. 4877-4887 - Yuxuan Du
An All-Digital, 1.92-7.32 mV/LSB, 0.5-2 GS/s Sample Rate, and 0-Latency Prediction Voltage Sensor With Dynamic PVT Calibration for Droop Detection and AVS System. 4888-4899 - Yuan Cao
A New Reconfigurable True Random Number Generator and Physical Unclonable Function Unified Chip With On-Chip Auto-Calibration. 4900-4913 - Yifan Gong
A Real-Time and Efficient Optical Flow Tracking Accelerator on FPGA Platform. 4914-4927 - Yangyi Zhang
Anti-Aliasing and Anti-Color-Artifact Demosaicing for High-Resolution CMOS Image Sensor. 4928-4937 - Xiangqu Fu
P3 ViT: A CIM-Based High-Utilization Architecture With Dynamic Pruning and Two-Way Ping-Pong Macro for Vision Transformer. 4938-4948 - Junseo Lee
Bayesian Learning Automated SRAM Circuit Design for Power and Performance Optimization. 4949-4961 - Nabasmita Phukan
AFibri-Net: A Lightweight Convolution Neural Network Based Atrial Fibrillation Detector. 4962-4974 - Jaejin Kim
An Output-Capacitor-Free NMOS Digital LDO Using Gate Driving Strength Modulation and Droop Detector. 4975-4985 - Dao-Han Yao
A 6.78-MHz Wireless Power Transfer System With Dual-Output Resonant Current-Mode Regulating Rectifier and Transmission Power Regulation. 4986-4998 - Ya-Ting Hsu, Jia-Rui Huang
An Interleaved Hybrid-Module Step-Up Converter With Reduction of Switching Frequency and Output Ripple. 4999-5008 - Chip-Hong Chang
Guest Editorial Special Issue on the Asian Hardware Oriented Security and Trust Symposium (AsianHOST 2022). 5009-5010 - Chaohui Xu
An Imperceptible Data Augmentation Based Blackbox Clean-Label Backdoor Attack on Deep Neural Networks. 5011-5024 - Yiqiang Zhao, Shijian Pan
Side Channel Security Oriented Evaluation and Protection on Hardware Implementations of Kyber. 5025-5035 - Chutitep Woralert
HARD-Lite: A Lightweight Hardware Anomaly Realtime Detection Framework Targeting Ransomware. 5036-5047 - Pengfei Qiu
PMU-Spill: A New Side Channel for Transient Execution Attacks. 5048-5059 - Tianyu Chen
A Design of High-Efficiency Coherent Sampling Based TRNG With On-Chip Entropy Assurance. 5060-5073 - Tianming Ni
Design of True Random Number Generator Based on Multi-Ring Convergence Oscillator Using Short Pulse Enhanced Randomness. 5074-5085 - Nishanth Basavaraj
Digital Reconstruction in Continuous-Time Pipelined Analog-to-Digital Converters. 5086-5097 - Daniel Widmann
Digital Time-Domain Predistortion of Linear Periodically Time-Varying Effects and Its Application to a 100-GS/s Time-Interleaved CMOS DAC. 5098-5109 - Xi Meng
Analysis and Design of a 15.2-to-18.2-GHz Inverse-Class-F VCO With a Balanced Dual-Core Topology Suppressing the Flicker Noise Upconversion. 5110-5123 - Xu Wang
Enhanced Jitter Analysis and Minimization for Digital PLLs With Mid-Rise TDCs and its Impact on Output Phase Noise. 5124-5137 - Yiming Yu, Yanpeng Wu, Pan Tang, Chenxi Zhao
An 18~30 GHz Vector-Sum Phase Shifter With Two-Stage Transformer-Based Hybrid in 130-nm SiGe BiCMOS. 5138-5151 - Cody J. Ellington
Analysis and Design of Baseband Circuits for Higher-Order Reflection-Mode N-Path Filters. 5152-5165 - Wenjun Tang
Low-Power and Scalable BEOL-Compatible IGZO TFT eDRAM-Based Charge-Domain Computing. 5166-5179 - Yitong Xiong
A 2-20-GHz 360° Variable Gain Phase Shifter MMIC With Reverse-Slope Phase Compensation. 5180-5193 - Zixiao Zhang
Incorporating Directionality in Transversal-Resonator-Based Bandpass Filters With Tunable Transfer Function Characteristics. 5194-5207 - Jie Shi
Design of a Highly Efficient Class-F GaN MMIC Power Amplifier Using a Multi-Function Bias Network and a Harmonic-Isolation L-C Resonator. 5208-5219 - Hiroshi Fuketa
A Cryogenic CMOS Current Integrator and Correlation Double Sampling Circuit for Spin Qubit Readout. 5220-5228 - Kuang-Wei Cheng
An 11 pJ/Bit Multichannel OOK/FSK/QPSK Transmitter With Multi-Phase Injection-Locking and Frequency Multiplication Techniques. 5229-5241 - Baijie Zhang
Dominant-Node Theory and Monitoring-Rescue Method for Eliminating Undesired Operating Points in the Self-Biased Reference Generators. 5242-5253 - Myung Gi Lim, Seung-Woo Lee
Real-Time Compensation in Organic Light-Emitting Diode Television Displays Using Current Sensing Method With Charge Integrators. 5254-5264 - Kourosh Parsaei
Compact Pixelated Microstrip Forward Broadside Coupler Using Binary Particle Swarm Optimization. 5265-5274 - Gennaro Di Meo
Novel Low-Power Floating-Point Divider With Linear Approximation and Minimum Mean Relative Error. 5275-5288 - Mingqiang Huang
An Integer-Only and Group-Vector Systolic Accelerator for Efficiently Mapping Vision Transformer on Edge. 5289-5301 - Xin-Yu Shih
Design and Implementation of Dual-Mode Support Vector Machine (SVM) Trainer and Classifier Chip Architecture for Human Disease Detection Applications. 5302-5315 - Geonhwi Lee
CMOS Clock-Gated Synchronous Up/Down Counter With High-Speed Local Clock Generation and Compact Toggle Flip-Flop. 5316-5327 - Jiaxuan Cai
Low-Complexity Parallel Min-Sum Medium-Density Parity-Check Decoder for McEliece Cryptosystem. 5328-5338 - Hanwen Gong
An Error-Free 64KB ReRAM-Based nvSRAM Integrated to a Microcontroller Unit Supporting Real-Time Program Storage and Restoration. 5339-5351 - Chong-Qiang Ye
Measurement-Based Quantum Sealed-Bid Auction. 5352-5365 - Florian Klemme
Transistor Self-Heating-Aware Synthesis for Reliable Digital Circuit Designs. 5366-5379 - Jiawei Xu, Jiangshan Fan, Baolin Nan
ASLog: An Area-Efficient CNN Accelerator for Per-Channel Logarithmic Post-Training Quantization. 5380-5393 - Bing Hua
Multi-Prior Mixture Distribution and Arithmetic Average Fusion-Based Student's t Filter. 5394-5407 - Yan Yang
Design and Implementation of Grid-Wing Hidden Chaotic Attractors With Only Stable Equilibria. 5408-5420 - Xiaohui Hu, Chen Peng
Extended Dissipative Scalable Control for AC Islanded Microgrids. 5421-5432 - Jingwei Xu
Extremum-Seeking for PWM-Controlled Double-Integrator System via Nonlinear Small-Gain Approach. 5433-5441 - Tianyi Zhou
Distributed Economic MPC for Dynamically Coupled Systems With Stochastic Disturbances. 5442-5455 - Liangjie Sun
On Synchronization Design and State Observer Design of (Singular) Boolean Networks. 5456-5467 - Marzieh Hashemipour-Nazari
Pipelined Architecture for Soft-Decision Iterative Projection Aggregation Decoding for RM Codes. 5468-5481 - Qiaobo Ma
A 10.5 W, 93% Efficient Dual-Path Hybrid (DPH)-Based DC-DC Converter Incorporating a Continuous-Current-Input Switched-Capacitor Stage and Enhanced IL Reduction for 12 V/24 V Inputs. 5482-5495 - Oswaldo López-Santos
Design of Loss-Free Resistors Terminated at a Generic Nonlinear Static Load. 5496-5506 - Chenkang Xue
A 36-55 V Input 0.6-2.5 V Output Bypass-Assist Series-Capacitor Power Converter With 93.1% Peak Efficiency and 1.5 mA-5 A Load Range. 5507-5519 - Amulya Viswambharan
Experimental Verification of Disturbance Observer-Based Backstepping Control for DC-DC Boost Converter. 5520-5533
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