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Krishnendu Chakrabarty
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- affiliation: Arizona State University, USA
- affiliation (former): Duke University, Durham, NC, USA
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2020 – today
- 2024
- [j375]Shiyi Jiang
, Farshad Firouzi
Low-Overhead Clustered Federated Learning for Personalized Stress Monitoring. IEEE Internet Things J. 11(3): 4335-4347 (2024) - [j374]Furkan Nacar, Alperen Cakin, Selma Dilek
Neuron grouping and mapping methods for 2D-mesh NoC-based DNN accelerators. J. Parallel Distributed Comput. 193: 104949 (2024) - [j373]Xing Huang
Control-Logic Synthesis of Fully Programmable Valve Array Using Reinforcement Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(1): 277-290 (2024) - [j372]Ching-Yuan Chen
Mitigating Slow-to-Write Errors in Memristor-Mapped Graph Neural Networks Induced by Adversarial Attacks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(8): 2411-2425 (2024) - [j371]Jayeeta Chaudhuri
DAWN: Efficient Trojan Detection in Analog Circuits Using Circuit Watermarking and Neural Twins. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(10): 2930-2943 (2024) - [j370]Chukwufumnanya Ogbogu
HuNT: Exploiting Heterogeneous PIM Devices to Design a 3-D Manycore Architecture for DNN Training. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(11): 3300-3311 (2024) - [j369]Xueying Wu
Block-Wise Mixed-Precision Quantization: Enabling High Efficiency for Practical ReRAM-Based DNN Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(12): 4558-4571 (2024) - [j368]Tung-Che Liang
Dynamic Adaptation Using Deep Reinforcement Learning for Digital Microfluidic Biochips. ACM Trans. Design Autom. Electr. Syst. 29(2): 24:1-24:24 (2024) - [j367]Renjian Pan
Root-Cause Analysis with Semi-Supervised Co-Training for Integrated Systems. ACM Trans. Design Autom. Electr. Syst. 29(3): 51:1-51:22 (2024) - [j366]Chukwufumnanya Ogbogu
Data Pruning-enabled High Performance and Reliable Graph Neural Network Training on ReRAM-based Processing-in-Memory Accelerators. ACM Trans. Design Autom. Electr. Syst. 29(5): 1-29 (2024) - [j365]Eduardo Ortega
Rowhammer Vulnerability of DRAMs in 3-D Integration. IEEE Trans. Very Large Scale Integr. Syst. 32(5): 967-971 (2024) - [j364]Shao-Chun Hung
Fault Diagnosis for Resistive Random Access Memory and Monolithic Inter-Tier Vias in Monolithic 3-D Integration. IEEE Trans. Very Large Scale Integr. Syst. 32(7): 1336-1349 (2024) - [j363]Jonti Talukdar
ALT-Lock: Logic and Timing Ambiguity-Based IP Obfuscation Against Reverse Engineering. IEEE Trans. Very Large Scale Integr. Syst. 32(8): 1535-1548 (2024) - [c505]Navajit Singh Baban, Jiarui Zhou, Sarani Bhattacharya, Urbi Chatterjee, Sukanta Bhattacharjee, Sanjairaj Vijayavenkataraman, Yong-Ak Song, Debdeep Mukhopadhyay, Krishnendu Chakrabarty, Ramesh Karri:
Physically Unclonable Fingerprints for Authentication. ACNS Workshops (2) 2024: 235-239 - [c504]Wei-Kai Liu, Benjamin Tan, Jason M. Fung, Krishnendu Chakrabarty:
Theoretical Patchability Quantification for IP-Level Hardware Patching Designs. ASPDAC 2024: 951-956 - [c503]Anthony Liardo, Aritra Ray, Farshad Firouzi, Kyle Lafata, Krishnendu Chakrabarty:
Neural Architecture Search for Blood Glucose Prediction in Type-1 Diabetics. BSN 2024: 1-4 - [c502]Xing Huang, Jiaxuan Wang, Zhiwen Yu, Bin Guo, Tsung-Yi Ho, Ulf Schlichtmann, Krishnendu Chakrabarty:
PathDriver-Wash: A Path-Driven Wash Optimization Method for Continuous-Flow Lab-on-a-Chip Systems. DATE 2024: 1-6 - [c501]Jayeeta Chaudhuri, Krishnendu Chakrabarty:
Detection of Stealthy Bitstreams in Cloud FPGAs using Graph Convolutional Networks. ETS 2024: 1-6 - [c500]Aniruddha Datta, Bhanu Vikas Yaganti, Andrew Dove, Arik Peltz, Krishnendu Chakrabarty:
Test-Fleet Optimization Using Machine Learning. ETS 2024: 1-10 - [c499]Dhruv Thapar, Arjun Chaudhuri, Kai Ni, Krishnendu Chakrabarty:
Defect Analysis for FeFETs using a Compact Model. ITC 2024: 96-100 - [c498]Ashish Reddy Bommana, Farshad Firouzi, Chukwufumnanya Ogbogu, Biresh Kumar Joardar, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty:
SEC-CiM: Selective Error Compensation for ReRAM-based Compute-in-Memory*. ITC 2024: 177-186 - [c497]Xuanyi Tan, Dhruv Thapar, Deepesh Sahoo, Arjun Chaudhuri, Sanmitra Banerjee, Krishnendu Chakrabarty, Rubin A. Parekhji:
Safety-Guided Test Generation for Structural Faults. ITC 2024: 233-242 - [c496]Eduardo Ortega, Jonti Talukdar, Woohyun Paik, Fei Su, Rita Chattopadhyay, Krishnendu Chakrabarty:
E-SCOUT: Efficient-Spatial Clustering-based Outlier Detection through Telemetry. ITC 2024: 243-252 - [c495]Xuanyi Tan
ML-TIME: ML-driven Timing Analysis of Integrated Circuits in the Presence of Process Variations and Aging Effects. MLCAD 2024: 30:1-30:9 - [c494]Navajit Singh Baban, Prithwish Basu Roy, Pauline John, Azhar Zam, Sukanta Bhattacharjee, Yong-Ak Song, Ramesh Karri, Krishnendu Chakrabarty:
Attacks and Countermeasures for Digital Microfluidic Biochips - Extended Abstract. SPACE 2024: 1-5 - [c493]Mohit Kumar, Abhik Kumar Khan, Sudip Roy, Krishnendu Chakrabarty, Sukanta Bhattacharjee:
Accelerating Fluid Loading in Sample Preparation with Fully Programmable Valve Arrays. VLSID 2024: 402-407 - [c492]Shao-Chun Hung, Partho Bhoumik, Krishnendu Chakrabarty:
Testing and Fault Diagnosis for Multi-level Resistive Random-Access Memory in Monolithic 3D Integration. VTS 2024: 1-7 - [i29]Jayeeta Chaudhuri, Dhruv Thapar, Arjun Chaudhuri, Farshad Firouzi, Krishnendu Chakrabarty:
SPICED: Syntactical Bug and Trojan Pattern Identification in A/MS Circuits using LLM-Enhanced Detection. CoRR abs/2408.16018 (2024) - [i28]Haotian Lu, Ziang Yin, Partho Bhoumik, Sanmitra Banerjee, Krishnendu Chakrabarty, Jiaqi Gu:
The Unlikely Hero: Nonideality in Analog Photonic Neural Networks as Built-in Defender Against Adversarial Attacks. CoRR abs/2410.01289 (2024) - [i27]Jayeeta Chaudhuri, Hassan Nassar, Dennis R. E. Gnad, Jörg Henkel, Mehdi B. Tahoori, Krishnendu Chakrabarty:
Hacking the Fabric: Targeting Partial Reconfiguration for Fault Injection in FPGA Fabrics. CoRR abs/2410.16497 (2024) - 2023
- [j362]Sanmitra Banerjee
On the Impact of Uncertainties in Silicon-Photonic Neural Networks. IEEE Des. Test 40(2): 82-89 (2023) - [j361]Farshad Firouzi
Fusion of IoT, AI, Edge-Fog-Cloud, and Blockchain: Challenges, Solutions, and a Case Study in Healthcare and Medicine. IEEE Internet Things J. 10(5): 3686-3705 (2023) - [j360]Jin Zhou
Stool Image Analysis for Digital Health Monitoring By Smart Toilets. IEEE Internet Things J. 10(5): 3720-3734 (2023) - [j359]Wei-Kai Liu
Hardware-Supported Patching of Security Bugs in Hardware IP Blocks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(1): 54-67 (2023) - [j358]Renjian Pan
Unsupervised Two-Stage Root-Cause Analysis With Transfer Learning for Integrated Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(2): 497-508 (2023) - [j357]Rana Elnaggar, Jayeeta Chaudhuri
Learning Malicious Circuits in FPGA Bitstreams. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(3): 726-739 (2023) - [j356]Mahmoud Elfar
Deep Reinforcement Learning-Based Approach for Efficient and Reliable Droplet Routing on MEDA Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(4): 1212-1222 (2023) - [j355]Biresh Kumar Joardar
Machine Learning-Based Rowhammer Mitigation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(5): 1393-1405 (2023) - [j354]Xiaoxuan Yang
ESSENCE: Exploiting Structured Stochastic Gradient Pruning for Endurance-Aware ReRAM-Based In-Memory Training Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(7): 2187-2199 (2023) - [j353]Chukwufumnanya Ogbogu
Accelerating Graph Neural Network Training on ReRAM-Based PIM Architectures via Graph and Model Pruning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(8): 2703-2716 (2023) - [j352]Ling Zhang, Zipeng Li
Enhanced Built-In Self-Diagnosis and Self-Repair Techniques for Daisy-Chain Design in MEDA Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(10): 3236-3249 (2023) - [j351]Jayeeta Chaudhuri
Diagnosis of Malicious Bitstreams in Cloud Computing FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3651-3664 (2023) - [j350]Shao-Chun Hung
Transferable Graph Neural Network-Based Delay-Fault Localization for Monolithic 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 4296-4309 (2023) - [j349]Biresh Kumar Joardar
ReaLPrune: ReRAM Crossbar-Aware Lottery Ticket Pruning for CNNs. IEEE Trans. Emerg. Top. Comput. 11(2): 303-317 (2023) - [j348]Arjun Chaudhuri
Built-In Self-Test of High-Density and Realistic ILV Layouts in Monolithic 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 31(3): 296-309 (2023) - [c491]Jayeeta Chaudhuri, Krishnendu Chakrabarty:
Detection and Classification of Malicious Bitstreams for FPGAs in Cloud Computing. ASP-DAC 2023: 91-97 - [c490]Navajit Singh Baban, Sohini Saha
Bio-FP: Biochip Fingerprints for Authentication. BioCAS 2023: 1-5 - [c489]Aritra Ray, Kyle Lafata, Zhaobo Zhang, Ying Xiong, Krishnendu Chakrabarty:
Privacy-preserving Job Scheduler for GPU Sharing. CCGridW 2023: 337-339 - [c488]Farshad Firouzi, Krishnendu Chakrabarty, Naghmeh Karimi, Bahareh J. Farahani, Diana Goehringer
Welcome Message from the Chairs. COINS 2023: 1 - [c487]Biresh Kumar Joardar, Krishnendu Chakrabarty:
Attacking ReRAM-based Architectures using Repeated Writes. DATE 2023: 1-6 - [c486]Jonti Talukdar, Arjun Chaudhuri, Jinwoo Kim, Sung Kyu Lim, Krishnendu Chakrabarty:
Securing Heterogeneous 2.5D ICs Against IP Theft through Dynamic Interposer Obfuscation. DATE 2023: 1-2 - [c485]Chung-Hsuan Tung, Biresh Kumar Joardar, Partha Pratim Pande, Janardhan Rao Doppa, Hai Helen Li, Krishnendu Chakrabarty:
Dynamic Task Remapping for Reliable CNN Training on ReRAM Crossbars. DATE 2023: 1-6 - [c484]Jayeeta Chaudhuri, Krishnendu Chakrabarty:
Criticality Analysis of Ring Oscillators in FPGA Bitstreams *. ETS 2023: 1-4 - [c483]Ching-Yuan Chen, Biresh Kumar Joardar, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty:
Attacking Memristor-Mapped Graph Neural Network by Inducing Slow-to-Write Errors. ETS 2023: 1-4 - [c482]Shao-Chun Hung, Arjun Chaudhuri, Krishnendu Chakrabarty:
Test-Point Insertion for Power-Safe Testing of Monolithic 3D ICs using Reinforcement Learning*. ETS 2023: 1-6 - [c481]Peter Domanski, Aritra Ray, Farshad Firouzi, Kyle Lafata, Krishnendu Chakrabarty, Dirk Pflüger:
Blood Glucose Prediction for Type-1 Diabetics using Deep Reinforcement Learning. ICDH 2023: 339-347 - [c480]Chukwufumnanya Ogbogu, Soumen Mohapatra, Biresh Kumar Joardar, Janardhan Rao Doppa, Deuk Heo, Krishnendu Chakrabarty, Partha Pratim Pande:
Energy-Efficient ReRAM-Based ML Training via Mixed Pruning and Reconfigurable ADC. ISLPED 2023: 1-6 - [c479]Navajit Singh Baban, Ajymurat Orozaliev, Yong-Ak Song, Urbi Chatterjee, Sankalp Bose, Sukanta Bhattacharjee, Ramesh Karri, Krishnendu Chakrabarty:
Biochip-PUF: Physically Unclonable Function for Microfluidic Biochips. ITC 2023: 166-175 - [c478]Shao-Chun Hung, Arjun Chaudhuri, Sanmitra Banerjee, Krishnendu Chakrabarty:
Scan Cell Segmentation Based on Reinforcement Learning for Power-Safe Testing of Monolithic 3D ICs. ITC 2023: 216-225 - [c477]Dhruv Thapar, Simon Thomann, Arjun Chaudhuri, Hussam Amrouch, Krishnendu Chakrabarty:
Analysis and Characterization of Defects in FeFETs. ITC 2023: 256-265 - [c476]Eduardo Ortega, Tyler K. Bletsch, Biresh Kumar Joardar, Jonti Talukdar, Woohyun Paik, Krishnendu Chakrabarty:
Simply-Track-and-Refresh: Efficient and Scalable Rowhammer Mitigation. ITC 2023: 340-349 - [c475]Arjun Chaudhuri, Ching-Yuan Chen, Jonti Talukdar, Krishnendu Chakrabarty:
Functional Test Generation for AI Accelerators using Bayesian Optimization∗. VTS 2023: 1-6 - [c474]Shao-Chun Hung, Arjun Chaudhuri, Sanmitra Banerjee, Krishnendu Chakrabarty:
Special Session: Using Graph Neural Networks for Tier-Level Fault Localization in Monolithic 3D ICs *. VTS 2023: 1-4 - [i26]Amin Shafiee, Sanmitra Banerjee, Krishnendu Chakrabarty, Sudeep Pasricha, Mahdi Nikdast:
Analysis of Optical Loss and Crosstalk Noise in MZI-based Coherent Photonic Neural Networks. CoRR abs/2308.03249 (2023) - [i25]Xueying Wu, Edward Hanson, Nansu Wang, Qilin Zheng, Xiaoxuan Yang, Huanrui Yang, Shiyu Li, Feng Cheng, Partha Pratim Pande, Janardhan Rao Doppa, Krishnendu Chakrabarty, Hai Li:
Block-Wise Mixed-Precision Quantization: Enabling High Efficiency for Practical ReRAM-based DNN Accelerators. CoRR abs/2310.12182 (2023) - [i24]Wei-Kai Liu, Benjamin Tan, Jason M. Fung, Krishnendu Chakrabarty:
Theoretical Patchability Quantification for IP-Level Hardware Patching Designs. CoRR abs/2311.03818 (2023) - 2022
- [j347]Xing Huang
Computer-aided Design Techniques for Flow-based Microfluidic Lab-on-a-chip Systems. ACM Comput. Surv. 54(5): 97:1-97:29 (2022) - [j346]Shiyi Jiang
A Resilient and Hierarchical IoT-Based Solution for Stress Monitoring in Everyday Settings. IEEE Internet Things J. 9(12): 10224-10243 (2022) - [j345]Lingjun Zhu, Arjun Chaudhuri, Sanmitra Banerjee, Gauthaman Murali
Design Automation and Test Solutions for Monolithic 3D ICs. ACM J. Emerg. Technol. Comput. Syst. 18(1): 21:1-21:49 (2022) - [j344]Arjun Chaudhuri, Sanmitra Banerjee, Jinwoo Kim, Heechun Park, Bon Woong Ku, Sukeshwar Kannan, Krishnendu Chakrabarty, Sung Kyu Lim:
Built-in Self-Test and Fault Localization for Inter-Layer Vias in Monolithic 3D ICs. ACM J. Emerg. Technol. Comput. Syst. 18(1): 22:1-22:37 (2022) - [j343]Navajit Singh Baban
Structural Attacks and Defenses for Flow-Based Microfluidic Biochips. IEEE Trans. Biomed. Circuits Syst. 16(6): 1261-1275 (2022) - [j342]Rana Elnaggar
Runtime Malware Detection Using Embedded Trace Buffers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(1): 35-48 (2022) - [j341]Debraj Kundu, Sudip Roy
Mixing Models as Integer Factorization: A Key to Sample Preparation With Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(3): 558-570 (2022) - [j340]Mengyun Liu, Xin Li, Krishnendu Chakrabarty
Knowledge Transfer in Board-Level Functional Fault Diagnosis Enabled by Domain Adaptation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(3): 762-775 (2022) - [j339]Biresh Kumar Joardar
High-Throughput Training of Deep CNNs on ReRAM-Based Heterogeneous Architectures via Optimized Normalization Layers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(5): 1537-1549 (2022) - [j338]Rana Elnaggar
Securing SoCs With FPGAs Against Rowhammer Attacks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(7): 2052-2065 (2022) - [j337]Rana Elnaggar
Accurate and Robust Malware Detection: Running XGBoost on Runtime Data From Performance Counters. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(7): 2066-2079 (2022) - [j336]Renjian Pan, Zhaobo Zhang, Xin Li, Krishnendu Chakrabarty
Unsupervised Two-Stage Root-Cause Analysis for Integrated Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(7): 2170-2184 (2022) - [j335]Ching-Yuan Chen
Efficient Identification of Critical Faults in Memristor-Based Inferencing Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(7): 2301-2314 (2022) - [j334]Arjun Chaudhuri
C-Testing and Efficient Fault Localization for AI Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(7): 2348-2361 (2022) - [j333]Mohamed Ibrahim
Efficient Regulation of Synthetic Biocircuits Using Droplet-Aliquot Operations on MEDA Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(8): 2490-2503 (2022) - [j332]Mahmoud Elfar
Formal Synthesis of Adaptive Droplet Routing for MEDA Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(8): 2504-2517 (2022) - [j331]Chukwufumnanya Ogbogu
Accelerating Large-Scale Graph Neural Network Training on Crossbar Diet. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 3626-3637 (2022) - [j330]Arjun Chaudhuri
Functional Criticality Analysis of Structural Faults in AI Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(12): 5657-5670 (2022) - [j329]Mengyun Liu
Online Fault Detection in ReRAM-Based Computing Systems for Inferencing. IEEE Trans. Very Large Scale Integr. Syst. 30(4): 392-405 (2022) - [c473]Shao-Chun Hung, Sanmitra Banerjee, Arjun Chaudhuri, Krishnendu Chakrabarty:
Graph Neural Network-based Delay-Fault Localization for Monolithic 3D ICs. DATE 2022: 448-453 - [c472]Biresh Kumar Joardar, Tyler K. Bletsch, Krishnendu Chakrabarty:
Learning to Mitigate Rowhammer Attacks. DATE 2022: 564-567 - [c471]Mahmoud Elfar
Adaptive Droplet Routing for MEDA Biochips via Deep Reinforcement Learning. DATE 2022: 640-645 - [c470]Shao-Chun Hung, Sanmitra Banerjee, Arjun Chaudhuri, Krishnendu Chakrabarty:
Graph Neural Network-based Delay-Fault Localization for Monolithic 3D ICs. DATE 2022: 1311-1316 - [c469]Hussam Amrouch, Krishnendu Chakrabarty, Dirk Pflüger, Ilia Polian, Matthias Sauer, Matteo Sonza Reorda
Machine Learning for Test, Diagnosis, Post-Silicon Validation and Yield Optimization. ETS 2022: 1-6 - [c468]Jayeeta Chaudhuri, Krishnendu Chakrabarty:
Detection of Malicious FPGA Bitstreams using CNN-Based Learning. ETS 2022: 1-2 - [c467]Jonti Talukdar
TaintLock: Preventing IP Theft through Lightweight Dynamic Scan Encryption using Taint Bits*. ETS 2022: 1-6 - [c466]Amin Shafiee
LoCI: An Analysis of the Impact of Optical Loss and Crosstalk Noise in Integrated Silicon-Photonic Neural Networks. ACM Great Lakes Symposium on VLSI 2022: 351-355 - [c465]Baleegh Ahmad, Wei-Kai Liu
Don't CWEAT It: Toward CWE Analysis Techniques in Early Stages of Hardware Design. ICCAD 2022: 157:1-157:9 - [c464]Arjun Chaudhuri, Jonti Talukdar, Krishnendu Chakrabarty:
Machine Learning for Testing Machine-Learning Hardware: A Virtuous Cycle. ICCAD 2022: 160:1-160:6 - [c463]Aritra Ray, Jinyuan Jia, Sohini Saha
Deep Neural Network Piration without Accuracy Loss. ICMLA 2022: 1032-1038 - [c462]Arjun Chaudhuri, Sanmitra Banerjee, Krishnendu Chakrabarty:
Structural Test Generation for AI Accelerators using Neural Twins. IOLTS 2022: 1-6 - [c461]Krishnendu Chakrabarty:
EDAML 2022 Invited Speaker 4: Fault Criticality Assessment in AI Accelerators. IPDPS Workshops 2022: 1185 - [c460]Biresh Kumar Joardar, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty:
NoC-enabled 3D Heterogeneous Manycore Systems for Big-Data Applications. ISQED 2022: 1-6 - [c459]Sanmitra Banerjee, Mahdi Nikdast, Sudeep Pasricha, Krishnendu Chakrabarty:
Pruning Coherent Integrated Photonic Neural Networks Using the Lottery Ticket Hypothesis. ISVLSI 2022: 128-133 - [c458]Arjun Chaudhuri, Jonti Talukdar
Probabilistic Fault Grading for AI Accelerators using Neural Twins. ISVLSI 2022: 333-338 - [c457]Shao-Chun Hung, Arjun Chaudhuri, Sanmitra Banerjee, Krishnendu Chakrabarty:
Fault Diagnosis for Resistive Random-Access Memory and Monolithic Inter-tier Vias in Monolithic 3D Integration. ITC 2022: 118-127 - [c456]Jonti Talukdar
Automatic Structural Test Generation for Analog Circuits using Neural Twins. ITC 2022: 145-154 - [c455]Sanmitra Banerjee, Mahdi Nikdast, Sudeep Pasricha, Krishnendu Chakrabarty:
CHAMP: Coherent Hardware-Aware Magnitude Pruning of Integrated Photonic Neural Networks. OFC 2022: 1-3 - [c454]Arjun Chaudhuri, Jonti Talukdar
Special Session: Fault Criticality Assessment in AI Accelerators. VTS 2022: 1-4 - [c453]Renjian Pan, Xin Li, Krishnendu Chakrabarty:
Semi-Supervised Root-Cause Analysis with Co-Training for Integrated Systems. VTS 2022: 1-7 - [i23]Amin Shafiee, Sanmitra Banerjee, Krishnendu Chakrabarty, Sudeep Pasricha, Mahdi Nikdast:
LoCI: An Analysis of the Impact of Optical Loss and Crosstalk Noise in Integrated Silicon-Photonic Neural Networks. CoRR abs/2204.03835 (2022) - [i22]Asif Mirza, Amin Shafiee, Sanmitra Banerjee, Krishnendu Chakrabarty, Sudeep Pasricha, Mahdi Nikdast:
Characterization and Optimization of Integrated Silicon-Photonic Neural Networks under Fabrication-Process Variations. CoRR abs/2204.09153 (2022) - [i21]Sanmitra Banerjee, Mahdi Nikdast, Krishnendu Chakrabarty:
Characterizing Coherent Integrated Photonic Neural Networks under Imperfections. CoRR abs/2207.10835 (2022) - [i20]Baleegh Ahmad, Wei-Kai Liu, Luca Collini
Don't CWEAT It: Toward CWE Analysis Techniques in Early Stages of Hardware Design. CoRR abs/2209.01291 (2022) - [i19]Sukanta Bhattacharjee, Ansuman Banerjee, Krishnendu Chakrabarty, Bhargab B. Bhattacharya:
A Framework for Automated Correctness Checking of Biochemical Protocol Realizations on Digital Microfluidic Biochips. CoRR abs/2211.04719 (2022) - 2021
- [j328]Mohammed Shayan
How Secure Are Checkpoint-Based Defenses in Digital Microfluidic Biochips? IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(1): 143-156 (2021) - [j327]Zhanwei Zhong
Access-Time Minimization for the IJTAG Network Using Data Broadcast and Hardware Parallelism. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(1): 185-198 (2021) - [j326]Renjian Pan, Zhaobo Zhang, Xin Li, Krishnendu Chakrabarty
Black-Box Test-Cost Reduction Based on Bayesian Network Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(2): 386-399 (2021) - [j325]Biresh Kumar Joardar
AccuReD: High Accuracy Training of CNNs on ReRAM/GPU Heterogeneous 3-D Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(5): 971-984 (2021) - [j324]Benjamin Tan
Toward Hardware-Based IP Vulnerability Detection and Post-Deployment Patching in Systems-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(6): 1158-1171 (2021) - [j323]Rana Elnaggar
Security Against Data-Sniffing and Alteration Attacks in IJTAG. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(7): 1301-1314 (2021) - [j322]Mengyun Liu, Fangming Ye, Xin Li, Krishnendu Chakrabarty
Board-Level Functional Fault Identification Using Streaming Data. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(9): 1920-1933 (2021) - [j321]Zhanwei Zhong
Enhancing the Reliability of MEDA Biochips Using IJTAG and Wear Leveling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(10): 2063-2076 (2021) - [j320]Peng Liu
Fault Modeling and Efficient Testing of Memristor-Based Memory. IEEE Trans. Circuits Syst. I Regul. Pap. 68(11): 4444-4455 (2021) - [j319]Biresh Kumar Joardar, Janardhan Rao Doppa, Hai Li, Krishnendu Chakrabarty, Partha Pratim Pande:
Learning to Train CNNs on Faulty ReRAM-based Manycore Accelerators. ACM Trans. Embed. Comput. Syst. 20(5s): 55:1-55:23 (2021) - [j318]Mohammed Shayan
Thwarting Bio-IP Theft Through Dummy-Valve-Based Obfuscation. IEEE Trans. Inf. Forensics Secur. 16: 2076-2089 (2021) - [j317]Sanmitra Banerjee
Variation-Aware Delay Fault Testing for Carbon-Nanotube FET Circuits. IEEE Trans. Very Large Scale Integr. Syst. 29(2): 409-422 (2021) - [j316]Aqeeb Iqbal Arka
Performance and Accuracy Tradeoffs for Training Graph Neural Networks on ReRAM-Based Architectures. IEEE Trans. Very Large Scale Integr. Syst. 29(10): 1743-1756 (2021) - [j315]Shao-Chun Hung
Power Supply Noise-Aware At-Speed Delay Fault Testing of Monolithic 3-D ICs. IEEE Trans. Very Large Scale Integr. Syst. 29(11): 1875-1888 (2021) - [c452]Tung-Che Liang, Krishnendu Chakrabarty, Tatjana Abaffy, Hiroaki Matsunami, Ramesh Karri
Securing Biochemical Samples Using Molecular Barcoding on Digital Microfluidic Biochips. BioCAS 2021: 1-6 - [c451]Ching-Yuan Chen, Krishnendu Chakrabarty:
Pruning of Deep Neural Networks for Fault-Tolerant Memristor-based Accelerators. DAC 2021: 889-894 - [c450]Sanmitra Banerjee, Mahdi Nikdast, Krishnendu Chakrabarty
Modeling Silicon-Photonic Neural Networks under Uncertainties. DATE 2021: 98-101 - [c449]Sanmitra Banerjee, Arjun Chaudhuri, Shao-Chun Hung, Krishnendu Chakrabarty
Advances in Testing and Design-for-Test Solutions for M3D Integrated Circuits. DATE 2021: 152-157 - [c448]Mahmoud Elfar
Formal Synthesis of Adaptive Droplet Routing for MEDA Biochips. DATE 2021: 324-329 - [c447]Ching-Yuan Chen, Krishnendu Chakrabarty
Efficient Identification of Critical Faults in Memristor Crossbars for Deep Neural Networks. DATE 2021: 1074-1077 - [c446]Arjun Chaudhuri, Jonti Talukdar, Jinwook Jung, Gi-Joon Nam, Krishnendu Chakrabarty
Fault-Criticality Assessment for AI Accelerators using Graph Convolutional Networks. DATE 2021: 1596-1599 - [c445]Aqeeb Iqbal Arka
ReGraphX: NoC-enabled 3D Heterogeneous ReRAM Architecture for Training Graph Neural Networks. DATE 2021: 1667-1672 - [c444]Shubham Rai
Perspectives on Emerging Computation-in-Memory Paradigms. DATE 2021: 1925-1934 - [c443]Aqeeb Iqbal Arka, Biresh Kumar Joardar, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty:
DARe: DropLayer-Aware Manycore ReRAM architecture for Training Graph Neural Networks. ICCAD 2021: 1-9 - [c442]Sanmitra Banerjee, Arjun Chaudhuri, Jinwoo Kim, Gauthaman Murali
ParaMitE: Mitigating Parasitic CNFETs in the Presence of Unetched CNTs. ICCAD 2021: 1-9 - [c441]Biresh Kumar Joardar, Aqeeb Iqbal Arka, Janardhan Rao Doppa, Partha Pratim Pande, Hai Li, Krishnendu Chakrabarty:
Heterogeneous Manycore Architectures Enabled by Processing-in-Memory for Deep Learning: From CNNs to GNNs: (ICCAD Special Session Paper). ICCAD 2021: 1-7 - [c440]Xiaoxuan Yang
Multi-Objective Optimization of ReRAM Crossbars for Robust DNN Inferencing under Stochastic Noise. ICCAD 2021: 1-9 - [c439]Tung-Che Liang, Jin Zhou, Yun-Sheng Chan, Tsung-Yi Ho
Parallel Droplet Control in MEDA Biochips using Multi-Agent Reinforcement Learning. ICML 2021: 6588-6599 - [c438]Arjun Chaudhuri, Ching-Yuan Chen, Jonti Talukdar
Efficient Fault-Criticality Analysis for AI Accelerators using a Neural Twin∗. ITC 2021: 73-82 - [c437]Ching-Yuan Chen, Krishnendu Chakrabarty:
On-line Functional Testing of Memristor-mapped Deep Neural Networks using Backdoored Checksums. ITC 2021: 83-92 - [c436]Mengyun Liu, Krishnendu Chakrabarty:
Adaptive Methods for Machine Learning-Based Testing of Integrated Circuits and Boards. ITC 2021: 153-162 - [c435]Jonti Talukdar
A BIST-based Dynamic Obfuscation Scheme for Resilience against Removal and Oracle-guided Attacks*. ITC 2021: 170-179 - [c434]Arjun Chaudhuri, Krishnendu Chakrabarty:
Testing and Fault-Localization Solutions for Monolithic 3D ICs*. ITC-Asia 2021: 1-6 - [c433]Jin Zhou, Nick DeCapite, Jackson McNabb, Jose R. Ruiz
Stool Image Analysis for Precision Health Monitoring by Smart Toilets. MLHC 2021: 709-729 - [c432]Sanmitra Banerjee, Mahdi Nikdast, Krishnendu Chakrabarty:
Optimizing Coherent Integrated Photonic Neural Networks under Random Uncertainties. OFC 2021: 1-3 - [c431]Renjian Pan, Xin Li, Krishnendu Chakrabarty
Unsupervised Root-Cause Analysis with Transfer Learning for Integrated Systems. VTS 2021: 1-6 - [i18]Aqeeb Iqbal Arka, Biresh Kumar Joardar, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty:
ReGraphX: NoC-enabled 3D Heterogeneous ReRAM Architecture for Training Graph Neural Networks. CoRR abs/2102.07959 (2021) - [i17]Ilia Polian, Jens Anders, Steffen Becker, Paolo Bernardi, Krishnendu Chakrabarty, Nourhan Elhamawy, Matthias Sauer, Adit D. Singh, Matteo Sonza Reorda, Stefan Wagner:
Exploring the Mysteries of System-Level Test. CoRR abs/2103.06656 (2021) - [i16]Sanmitra Banerjee, Mahdi Nikdast, Krishnendu Chakrabarty:
Optimizing Coherent Integrated Photonic Neural Networks under Random Uncertainties. CoRR abs/2103.07019 (2021) - [i15]Xiaoxuan Yang, Syrine Belakaria, Biresh Kumar Joardar, Huanrui Yang, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty, Hai Li:
Multi-Objective Optimization of ReRAM Crossbars for Robust DNN Inferencing under Stochastic Noise. CoRR abs/2109.05437 (2021) - [i14]Biresh Kumar Joardar, Janardhan Rao Doppa, Hai Li, Krishnendu Chakrabarty, Partha Pratim Pande:
ReaLPrune: ReRAM Crossbar-aware Lottery Ticket Pruned CNNs. CoRR abs/2111.09272 (2021) - [i13]Sanmitra Banerjee, Mahdi Nikdast, Sudeep Pasricha, Krishnendu Chakrabarty:
CHAMP: Coherent Hardware-Aware Magnitude Pruning of Integrated Photonic Neural Networks. CoRR abs/2112.06098 (2021) - [i12]Sanmitra Banerjee, Mahdi Nikdast, Sudeep Pasricha, Krishnendu Chakrabarty:
Pruning Coherent Integrated Photonic Neural Networks Using the Lottery Ticket Hypothesis. CoRR abs/2112.07485 (2021) - 2020
- [j314]Arjun Chaudhuri
Advances in Design and Test of Monolithic 3-D ICs. IEEE Des. Test 37(4): 92-100 (2020) - [j313]Bing Li
3D-ReG: A 3D ReRAM-based Heterogeneous Architecture for Training Deep Neural Networks. ACM J. Emerg. Technol. Comput. Syst. 16(2): 20:1-20:24 (2020) - [j312]Yunfeng Lu, Huaxi Gu, Xiaoshan Yu, Krishnendu Chakrabarty
Lotus: A New Topology for Large-scale Distributed Machine Learning. ACM J. Emerg. Technol. Comput. Syst. 17(1): 7:1-7:21 (2020) - [j311]Jin Zhou
Sensor-Array Optimization Based on Time-Series Data Analytics for Sanitation-Related Malodor Detection. IEEE Trans. Biomed. Circuits Syst. 14(4): 705-714 (2020) - [j310]Zhanwei Zhong
Hardware Design and Fault-Tolerant Synthesis for Digital Acoustofluidic Biochips. IEEE Trans. Biomed. Circuits Syst. 14(5): 1065-1078 (2020) - [j309]Mohamed Ibrahim
BioCyBig: A Cyberphysical System for Integrative Microfluidics-Driven Analysis of Genomic Association Studies. IEEE Trans. Big Data 6(4): 609-623 (2020) - [j308]Jack Tang
Synthesis of Tamper-Resistant Pin-Constrained Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(1): 171-184 (2020) - [j307]Yasamin Moradi
An Efficient Fault-Tolerant Valve-Based Microfluidic Routing Fabric for Droplet Barcoding in Single-Cell Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(2): 359-372 (2020) - [j306]Shi Jin
Hierarchical Symbol-Based Health-Status Analysis Using Time-Series Data in a Core Router System. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(3): 700-713 (2020) - [j305]Ying Zhang
Software-Based Self-Testing Using Bounded Model Checking for Out-of-Order Superscalar Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(3): 714-727 (2020) - [j304]Jack Tang
Analysis and Design of Tamper-Mitigating Microfluidic Routing Fabrics. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(5): 1003-1016 (2020) - [j303]Xing Huang
Timing-Driven Flow-Channel Network Construction for Continuous-Flow Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(6): 1314-1327 (2020) - [j302]Shi Jin
Self-Learning and Efficient Health-Status Analysis for a Core Router System. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(9): 1935-1948 (2020) - [j301]Chunfeng Liu, Bing Li
Test Generation for Flow-Based Microfluidic Biochips With General Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2530-2543 (2020) - [j300]Tung-Che Liang
Multitarget Sample Preparation Using MEDA Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2682-2695 (2020) - [j299]Abhishek Koneru
An Interlayer Interconnect BIST and Diagnosis Solution for Monolithic 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 3056-3066 (2020) - [j298]Tung-Che Liang
Extending the Lifetime of MEDA Biochips by Selective Sensing on Microelectrodes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 3531-3543 (2020) - [j297]Mohammed Shayan
Toward Secure Checkpointing for Micro-Electrode-Dot-Array Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 4908-4920 (2020) - [j296]Zhanwei Zhong
IJTAG-Based Fault Recovery and Robust Microelectrode-Cell Design for MEDA Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 4921-4934 (2020) - [j295]Mohamed Ibrahim
Molecular Barcoding as a Defense Against Benchtop Biochemical Attacks on DNA Fingerprinting and Information Forensics. IEEE Trans. Inf. Forensics Secur. 15: 3595-3609 (2020) - [j294]Sukanta Bhattacharjee, Jack Tang, Sudip Poddar
Bio-chemical Assay Locking to Thwart Bio-IP Theft. ACM Trans. Design Autom. Electr. Syst. 25(1): 5:1-5:20 (2020) - [j293]Tung-Che Liang
Secure Assay Execution on MEDA Biochips to Thwart Attacks Using Real-Time Sensing. ACM Trans. Design Autom. Electr. Syst. 25(2): 17:1-17:25 (2020) - [j292]Mengyun Liu, Lixue Xia, Yu Wang, Krishnendu Chakrabarty
Algorithmic Fault Detection for RRAM-based Matrix Operations. ACM Trans. Design Autom. Electr. Syst. 25(3): 29:1-29:31 (2020) - [j291]Arunkumar Vijayan, Mehdi B. Tahoori, Krishnendu Chakrabarty
Runtime Identification of Hardware Trojans by Feature Analysis on Gate-Level Unstructured Data and Anomaly Detection. ACM Trans. Design Autom. Electr. Syst. 25(4): 33:1-33:23 (2020) - [j290]Mengyun Liu, Renjian Pan, Fangming Ye, Xin Li, Krishnendu Chakrabarty
Fine-grained Adaptive Testing Based on Quality Prediction. ACM Trans. Design Autom. Electr. Syst. 25(5): 38:1-38:25 (2020) - [j289]Tung-Che Liang
Programmable Daisychaining of Microelectrodes to Secure Bioassay IP in MEDA Biochips. IEEE Trans. Very Large Scale Integr. Syst. 28(5): 1269-1282 (2020) - [j288]Sanmitra Banerjee
Analysis of the Impact of Process Variations and Manufacturing Defects on the Performance of Carbon-Nanotube FETs. IEEE Trans. Very Large Scale Integr. Syst. 28(6): 1513-1526 (2020) - [c430]Zhanwei Zhong, Tung-Che Liang
Reliability-Oriented IEEE Std. 1687 Network Design and Block-Aware High-Level Synthesis for MEDA Biochips. ASP-DAC 2020: 544-549 - [c429]Arjun Chaudhuri, Sanmitra Banerjee, Krishnendu Chakrabarty
NodeRank: Observation-Point Insertion for Fault Localization in Monolithic 3D ICs∗. ATS 2020: 1-6 - [c428]Arjun Chaudhuri, Chunsheng Liu, Xiaoxin Fan, Krishnendu Chakrabarty
C-Testing of AI Accelerators *. ATS 2020: 1-6 - [c427]Shao-Chun Hung, Yi-Chen Lu, Sung Kyu Lim
Power Supply Noise-Aware Scan Test Pattern Reshaping for At-Speed Delay Fault Testing of Monolithic 3D ICs *. ATS 2020: 1-6 - [c426]Ilia Polian, Jens Anders, Steffen Becker, Paolo Bernardi
Exploring the Mysteries of System-Level Test. ATS 2020: 1-6 - [c425]Biresh Kumar Joardar, Nitthilan Kannappan Jayakodi, Janardhan Rao Doppa, Hai Li, Partha Pratim Pande, Krishnendu Chakrabarty
GRAMARCH: A GPU-ReRAM based Heterogeneous Architecture for Neural Image Segmentation. DATE 2020: 228-233 - [c424]Mohammed Shayan, Sukanta Bhattacharjee, Yong-Ak Song, Krishnendu Chakrabarty
Microfluidic Trojan Design in Flow-based Biochips. DATE 2020: 1037-1042 - [c423]Shao-Chun Hung, Krishnendu Chakrabarty
Design of a Reliable Power Delivery Network for Monolithic 3D ICs*. DATE 2020: 1746-1751 - [c422]Ching-Yuan Chen, Ching-Hong Cheng, Jiun-Lang Huang, Krishnendu Chakrabarty
Functional-Like Transition Delay Fault Test-Pattern Generation using a Bayesian-Based Circuit Model. ETS 2020: 1-6 - [c421]Rana Elnaggar, Siyuan Chen, Peilin Song, Krishnendu Chakrabarty
Detection of Rowhammer Attacks in SoCs with FPGAs. ETS 2020: 1-2 - [c420]Jinwoo Kim, Gauthaman Murali
RTL-to-GDS Design Tools for Monolithic 3D ICs. ICCAD 2020: 126:1-126:8 - [c419]Tung-Che Liang, Zhanwei Zhong, Yaas Bigdeli, Tsung-Yi Ho
Adaptive Droplet Routing in Digital Microfluidic Biochips Using Deep Reinforcement Learning. ICML 2020: 6050-6060 - [c418]Arjun Chaudhuri, Jonti Talukdar
Functional Criticality Classification of Structural Faults in AI Accelerators. ITC 2020: 1-5 - [c417]Siyuan Chen, Jinwook Jung, Peilin Song, Krishnendu Chakrabarty
BISTLock: Efficient IP Piracy Protection using BIST. ITC 2020: 1-5 - [c416]Mengyun Liu, Krishnendu Chakrabarty
Online Fault Detection in ReRAM-Based Computing Systems by Monitoring Dynamic Power Consumption. ITC 2020: 1-10 - [c415]Renjian Pan, Zhaobo Zhang, Xin Li, Krishnendu Chakrabarty
Unsupervised Root-Cause Analysis for Integrated Systems. ITC 2020: 1-10 - [c414]Krishnendu Chakrabarty
Hardware Trojan Detection at Run-time using Machine-Learning Techniques. VLSI-DAT 2020: 1 - [c413]Xingyi Wang, Li Jiang, Krishnendu Chakrabarty
LSTM-based Analysis of Temporally- and Spatially-Correlated Signatures for Intermittent Fault Detection. VTS 2020: 1-6 - [i11]Sanmitra Banerjee, Mahdi Nikdast, Krishnendu Chakrabarty:
Modeling Silicon-Photonic Neural Networks under Uncertainties. CoRR abs/2012.10594 (2020)
2010 – 2019
- 2019
- [j287]Jack Tang, Mohamed Ibrahim, Krishnendu Chakrabarty
Randomized Checkpoints: A Practical Defense for Cyber-Physical Microfluidic Systems. IEEE Des. Test 36(1): 5-13 (2019) - [j286]Shi Jin
Anomaly Detection and Health-Status Analysis in a Core Router System. IEEE Des. Test 36(5): 7-17 (2019) - [j285]Zhanwei Zhong
Micro-Electrode-Dot-Array Digital Microfluidic Biochips: Technology, Design Automation, and Test Techniques. IEEE Trans. Biomed. Circuits Syst. 13(2): 292-313 (2019) - [j284]Sudip Poddar
Optimization of Multi-Target Sample Preparation On-Demand With Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(2): 253-266 (2019) - [j283]Jack Tang
Toward Secure and Trustworthy Cyberphysical Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(4): 589-603 (2019) - [j282]Sukanta Bhattacharjee
Efficient Generation of Dilution Gradients With Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(5): 874-887 (2019) - [j281]Mohamed Ibrahim
Synthesis of a Cyberphysical Hybrid Microfluidic Platform for Single-Cell Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(7): 1237-1250 (2019) - [j280]Shi Jin
Changepoint-Based Anomaly Detection for Prognostic Diagnosis in a Core Router System. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(7): 1331-1344 (2019) - [j279]Lixue Xia
Fault-Tolerant Training Enabled by On-Line Fault Detection for RRAM-Based Neural Computing Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(9): 1611-1624 (2019) - [j278]Mohammed Shayan
Security Assessment of Micro-Electrode-Dot-Array Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(10): 1831-1843 (2019) - [j277]Shengcheng Wang
Defect Clustering-Aware Spare-TSV Allocation in 3-D ICs for Yield Enhancement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(10): 1928-1941 (2019) - [j276]Abhishek Koneru
A Design-for-Test Solution Based on Dedicated Test Layers and Test Scheduling for Monolithic 3-D Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(10): 1942-1955 (2019) - [j275]Mohamed Ibrahim
Synthesis of Reconfigurable Flow-Based Biochips for Scalable Single-Cell Screening. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(12): 2255-2270 (2019) - [j274]Manjari Pradhan
Predicting X-Sensitivity of Circuit-Inputs on Test-Coverage: A Machine-Learning Approach. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(12): 2343-2356 (2019) - [j273]Aditya Sridhar, Mohamed Ibrahim, Krishnendu Chakrabarty
Synterface: Efficient Chip-to-World Interfacing for Flow-Based Microfluidic Biochips Using Pin-Count Minimization. ACM Trans. Embed. Comput. Syst. 18(5s): 54:1-54:21 (2019) - [j272]Mohammed Shayan
Bio-Protocol Watermarking on Digital Microfluidic Biochips. IEEE Trans. Inf. Forensics Secur. 14(11): 2901-2915 (2019) - [j271]Kanad Basu, Samah Mohamed Saeed, Christian Pilato, Mohammed Ashraf, Mohammed Thari Nabeel, Krishnendu Chakrabarty
CAD-Base: An Attack Vector into the Electronics Supply Chain. ACM Trans. Design Autom. Electr. Syst. 24(4): 38:1-38:30 (2019) - [j270]Dongjin Lee, Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty
Impact of Electrostatic Coupling on Monolithic 3D-enabled Network on Chip. ACM Trans. Design Autom. Electr. Syst. 24(6): 62:1-62:22 (2019) - [j269]Rana Elnaggar
Hardware Trojan Detection Using Changepoint-Based Anomaly Detection Techniques. IEEE Trans. Very Large Scale Integr. Syst. 27(12): 2706-2719 (2019) - [j268]Mohammed Shayan
Toward Secure Microfluidic Fully Programmable Valve Array Biochips. IEEE Trans. Very Large Scale Integr. Syst. 27(12): 2755-2766 (2019) - [c412]Tung-Che Liang
Execution of provably secure assays on MEDA biochips to thwart attacks. ASP-DAC 2019: 51-57 - [c411]Mengyun Liu, Lixue Xia, Yu Wang, Krishnendu Chakrabarty
Fault tolerance in neuromorphic computing systems. ASP-DAC 2019: 216-223 - [c410]Sohini Saha
Factorization based dilution of biochemical fluids with micro-electrode-dot-array biochips. ASP-DAC 2019: 462-467 - [c409]Tung-Che Liang
Sample preparation for multiple-reactant bioassays on micro-electrode-dot-array biochips. ASP-DAC 2019: 468-473 - [c408]Zhanwei Zhong, Robert Wille, Krishnendu Chakrabarty
Robust sample preparation on digital microfluidic biochips. ASP-DAC 2019: 474-480 - [c407]Zhanwei Zhong, Haodong Zhu, Peiran Zhang, James C. Morizio
Hardware Design and Experimental Demonstrations for Digital Acoustofluidic Biochips. BioCAS 2019: 1-4 - [c406]Jin Zhou, Claire M. Welling, Siddharth Kawadiya
Sensor-Array Optimization Based on Mutual Information for Sanitation-Related Malodor Alerts. BioCAS 2019: 1-4 - [c405]Mohammed Shayan, Sukanta Bhattacharjee, Yong-Ak Song
Security Assessment of Microfluidic Immunoassays. COINS 2019: 217-222 - [c404]Xiaoyi Sun, Krishnendu Chakrabarty
System-level hardware failure prediction using deep learning. DAC 2019: 20 - [c403]Heechun Park, Kyungwook Chang, Bon Woong Ku, Jinwoo Kim, Edward Lee, Daehyun Kim, Arjun Chaudhuri, Sanmitra Banerjee, Saibal Mukhopadhyay, Krishnendu Chakrabarty
RTL-to-GDS Tool Flow and Design-for-Test Solutions for Monolithic 3D ICs. DAC 2019: 101 - [c402]Kanad Basu, Rana Elnaggar, Krishnendu Chakrabarty
PREEMPT: PReempting Malware by Examining Embedded Processor Traces. DAC 2019: 166 - [c401]Rana Elnaggar, Ramesh Karri
Multi-Tenant FPGA-based Reconfigurable Systems: Attacks and Defenses. DATE 2019: 7-12 - [c400]Mohammed Shayan, Sukanta Bhattacharjee, Yong-Ak Song
Desieve the Attacker: Thwarting IP Theft in Sieve-Valve-based Biochips. DATE 2019: 210-215 - [c399]Biresh Kumar Joardar, Bing Li, Janardhan Rao Doppa, Hai Li, Partha Pratim Pande, Krishnendu Chakrabarty
REGENT: A Heterogeneous ReRAM/GPU-based Architecture Enabled by NoC for Training CNNs. DATE 2019: 522-527 - [c398]Mohamed Ibrahim, Bhargab B. Bhattacharya, Krishnendu Chakrabarty
BioScan: Parameter-Space Exploration of Synthetic Biocircuits Using MEDA Biochips∗. DATE 2019: 1519-1524 - [c397]Arjun Chaudhuri, Sanmitra Banerjee, Heechun Park, Bon Woong Ku, Krishnendu Chakrabarty
Built-in Self-Test for Inter-Layer Vias in Monolithic 3D ICs. ETS 2019: 1-6 - [c396]Harshad Dhotre, Stephan Eggersglüß, Krishnendu Chakrabarty
Machine Learning-based Prediction of Test Power. ETS 2019: 1-6 - [c395]Abhishek Koneru, Krishnendu Chakrabarty
Test and Design-for-Testability Solutions for Monolithic 3D Integrated Circuits. ACM Great Lakes Symposium on VLSI 2019: 457-462 - [c394]Mohamed Ibrahim, Maria Gorlatova, Krishnendu Chakrabarty
The Internet of Microfluidic Things: Perspectives on System Architecture and Design Challenges: Invited Paper. ICCAD 2019: 1-8 - [c393]Mohammed Shayan, Sukanta Bhattacharjee, Yong-Ak Song
Can Multi-Layer Microfluidic Design Methods Aid Bio-Intellectual Property Protection? IOLTS 2019: 151-154 - [c392]Arjun Chaudhuri, Mengyun Liu, Krishnendu Chakrabarty
Fault-Tolerant Neuromorphic Computing Systems. ITC 2019: 1-10 - [c391]Arjun Chaudhuri, Bonan Yan, Yiran Chen, Krishnendu Chakrabarty
Hardware Fault Tolerance for Binary RRAM Crossbars. ITC 2019: 1-10 - [c390]Tung-Che Liang, Krishnendu Chakrabarty
Programmable Daisychaining of Microelectrodes for IP Protection in MEDA Biochips. ITC 2019: 1-10 - [c389]Mengyun Liu, Xin Li, Krishnendu Chakrabarty
Knowledge Transfer in Board-Level Functional Fault Identification using Domain Adaptation. ITC 2019: 1-10 - [c388]Zhanwei Zhong, Krishnendu Chakrabarty
Fault Recovery in Micro-Electrode-Dot-Array Digital Microfluidic Biochips Using an IJTAG NetworkBehaviors. ITC 2019: 1-10 - [c387]Zhanwei Zhong, Haodong Zhu, Peiran Zhang, Tony Jun Huang, Krishnendu Chakrabarty
Structural Test and Functional Test for Digital Acoustofluidic Biochips. ITC 2019: 1-10 - [c386]Mohammed Shayan, Sukanta Bhattacharjee, Yong-Ak Song
Security Assessment of Microfluidic Fully-Programmable-Valve-Array Biochips. VLSID 2019: 197-202 - [c385]Abhishek Koneru, Aida Todri-Sanial
Reliable Power Delivery and Analysis of Power-Supply Noise During Testing in Monolithic 3D ICs. VTS 2019: 1-6 - [c384]Mengyun Liu, Fangming Ye, Xin Li, Krishnendu Chakrabarty
Board-Level Functional Fault Identification using Streaming Data. VTS 2019: 1-6 - [c383]Renjian Pan, Zhaobo Zhang, Xin Li, Krishnendu Chakrabarty
Black-Box Test-Coverage Analysis and Test-Cost Reduction Based on a Bayesian Network Model. VTS 2019: 1-6 - [c382]Zhanwei Zhong, Tom B. Wrigglesworth, Eugene M. Chow, Krishnendu Chakrabarty
Test-Cost Reduction for 2.5D ICs Using Microspring Technology for Die Attachment and Rework. VTS 2019: 1-6 - [e2]Farshad Firouzi, Krishnendu Chakrabarty, Bahar J. Farahani, Fangming Ye, Vasilis F. Pavlidis:
Proceedings of the International Conference on Omni-Layer Intelligent Systems, COINS 2019, Crete, Greece, May 5-7, 2019. ACM 2019, ISBN 978-1-4503-6640-3 [contents] - [i10]Krishnendu Chakrabarty, Tsung-Yi Ho
Emerging Hardware Techniques and EDA Methodologies for Neuromorphic Computing (Dagstuhl Seminar 19152). Dagstuhl Reports 9(4): 43-58 (2019) - 2018
- [j267]Lixue Xia
Stuck-at Fault Tolerance in RRAM Computing Systems. IEEE J. Emerg. Sel. Topics Circuits Syst. 8(1): 102-115 (2018) - [j266]Rana Elnaggar, Krishnendu Chakrabarty
Machine Learning for Hardware Security: Opportunities and Risks. J. Electron. Test. 34(2): 183-201 (2018) - [j265]Mohamed Ibrahim
Cyber-Physical Digital-Microfluidic Biochips: Bridging the Gap Between Microfluidics and Microbiology. Proc. IEEE 106(9): 1717-1743 (2018) - [j264]Arunkumar Vijayan
Online Soft-Error Vulnerability Estimation for Memory Arrays and Logic Cores. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(2): 499-511 (2018) - [j263]Zipeng Li
Efficient and Adaptive Error Recovery in a Micro-Electrode-Dot-Array Digital Microfluidic Biochip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(3): 601-614 (2018) - [j262]Vasileios Tenentes
Leakage Current Analysis for Diagnosis of Bridge Defects in Power-Gating Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(4): 883-895 (2018) - [j261]Zipeng Li
Structural and Functional Test Methods for Micro-Electrode-Dot-Array Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(5): 968-981 (2018) - [j260]Arunkumar Vijayan
Fine-Grained Aging-Induced Delay Prediction Based on the Monitoring of Run-Time Stress. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(5): 1064-1075 (2018) - [j259]Jack Tang
Secure Randomized Checkpointing for Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(6): 1119-1132 (2018) - [j258]Arunkumar Vijayan, Saman Kiamehr, Fabian Oboril, Krishnendu Chakrabarty
Workload-Aware Static Aging Monitoring and Mitigation of Timing-Critical Flip-Flops. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10): 2098-2110 (2018) - [j257]Shi Jin, Zhaobo Zhang, Krishnendu Chakrabarty
Toward Predictive Fault Tolerance in a Core-Router System: Anomaly Detection Using Correlation-Based Time-Series Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10): 2111-2124 (2018) - [j256]Farshad Firouzi
Keynote Paper: From EDA to IoT eHealth: Promises, Challenges, and Solutions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(12): 2965-2978 (2018) - [j255]Panagiotis Georgiou, Fotis Vartziotis
Testing 3D-SoCs Using 2-D Time-Division Multiplexing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(12): 3177-3185 (2018) - [j254]Zhanwei Zhong
Adaptive and Roll-Forward Error Recovery in MEDA Biochips Based on Droplet-Aliquot Operations and Predictive Analysis. IEEE Trans. Multi Scale Comput. Syst. 4(4): 577-592 (2018) - [j253]Yunfeng Lu
H2OEIN: A Hierarchical Hybrid Optical/Electrical Interconnection Network for Exascale Computing Systems. IEEE Trans. Multi Scale Comput. Syst. 4(4): 722-733 (2018) - [j252]Shengcheng Wang
Multicast Testing of Interposer-Based 2.5D ICs: Test-Architecture Design and Test Scheduling. ACM Trans. Design Autom. Electr. Syst. 23(3): 35:1-35:25 (2018) - [j251]Shalu, Srijan Kumar, Ananya Singla, Sudip Roy, Krishnendu Chakrabarty
Demand-Driven Single- and Multitarget Mixture Preparation Using Digital Microfluidic Biochips. ACM Trans. Design Autom. Electr. Syst. 23(4): 55:1-55:26 (2018) - [j250]Dongjin Lee, Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty
Performance and Thermal Tradeoffs for Energy-Efficient Monolithic 3D Network-on-Chip. ACM Trans. Design Autom. Electr. Syst. 23(5): 60:1-60:25 (2018) - [j249]Dong Xiang, Krishnendu Chakrabarty
Fault-Tolerant Unicast-Based Multicast for Reliable Network-on-Chip Testing. ACM Trans. Design Autom. Electr. Syst. 23(6): 73:1-73:23 (2018) - [j248]Krishnendu Chakrabarty
Editorial. IEEE Trans. Very Large Scale Integr. Syst. 26(12): 2579-2580 (2018) - [c381]Jack Tang, Mohamed Ibrahim, Krishnendu Chakrabarty
Tamper-resistant pin-constrained digital microfluidic biochips. DAC 2018: 67:1-67:6 - [c380]Chunfeng Liu, Bing Li, Tsung-Yi Ho
Design-for-testability for continuous-flow microfluidic biochips. DAC 2018: 164:1-164:6 - [c379]Sudipta Mondal, Krishnendu Chakrabarty
Pre-assembly testing of interconnects in embedded multi-die interconnect bridge (EMIB) dies. DATE 2018: 373-378 - [c378]Yasamin Moradi, Mohamed Ibrahim, Krishnendu Chakrabarty
Fault-tolerant valve-based microfluidic routing fabric for droplet barcoding in single-cell analysis. DATE 2018: 1484-1487 - [c377]Sumit Sharma
On Designing All-Optical Multipliers Using Mach-Zender Interferometers. DSD 2018: 672-679 - [c376]Sukanta Bhattacharjee, Jack Tang, Mohamed Ibrahim, Krishnendu Chakrabarty
Locking of biochemical assays for digital microfluidic biochips. ETS 2018: 1-6 - [c375]Mengyun Liu, Lixue Xia, Yu Wang, Krishnendu Chakrabarty
Design of fault-tolerant neuromorphic computing systems. ETS 2018: 1-9 - [c374]Yasamin Moradi, Krishnendu Chakrabarty
An efficient fault-tolerant valve-based microfluidic routing fabric for single-cell analysis. ETS 2018: 1-2 - [c373]Shi Jin, Zhaobo Zhang, Krishnendu Chakrabarty
Failure prediction based on anomaly detection for complex core routers. ICCAD 2018: 49 - [c372]Mohammed Shayan, Sukanta Bhattacharjee, Tung-Che Liang
Shadow attacks on MEDA biochips. ICCAD 2018: 73 - [c371]Abhishek Koneru, Aida Todri-Sanial
Power-Supply Noise Analysis for Monolithic 3D ICs Using Electrical and Thermal Co-Simulation. ICECS 2018: 217-220 - [c370]Chunfeng Liu, Bing Li, Bhargab B. Bhattacharya, Krishnendu Chakrabarty
Test generation for microfluidic fully programmable valve arrays (FPVAs) with heuristic acceleration. ICICDT 2018: 97-100 - [c369]Arjun Chaudhuri, Krishnendu Chakrabarty
Analysis of Process Variations, Defects, and Design-Induced Coupling in Memristors. ITC 2018: 1-10 - [c368]Shi Jin, Zhaobo Zhang, Krishnendu Chakrabarty
Self-Learning Health-Status Analysis for a Core Router System. ITC 2018: 1-10 - [c367]Mengyun Liu, Renjian Pan, Fangming Ye, Xin Li, Krishnendu Chakrabarty
Fine-Grained Adaptive Testing Based on Quality Prediction. ITC 2018: 1-10 - [c366]Mengyun Liu, Lixue Xia, Yu Wang, Krishnendu Chakrabarty
Fault Tolerance for RRAM-Based Matrix Operations. ITC 2018: 1-10 - [c365]Ling Zhang, Zipeng Li, Krishnendu Chakrabarty
Built-In Self-Diagnosis and Fault-Tolerant Daisy-Chain Design in MEDA Biochips. ITC 2018: 1-10 - [c364]Zhanwei Zhong, Guoliang Li, Qinfu Yang, Krishnendu Chakrabarty
Access-Time Minimization in the IEEE 1687 Network Using Broadcast and Hardware Parallelism. ITC 2018: 1-10 - [c363]Sourav Das, Kanad Basu, Janardhan Rao Doppa, Partha Pratim Pande, Ramesh Karri
Abetting Planned Obsolescence by Aging 3D Networks-on-Chip. NOCS 2018: 10:1-10:8 - [c362]Oliver Keszöcze
Exact Synthesis of Biomolecular Protocols for Multiple Sample Pathways on Digital Microfluidic Biochips. VLSID 2018: 121-126 - [c361]Shi Jin, Krishnendu Chakrabarty
Data-Driven Resiliency Solutions for Boards and Systems. VLSID 2018: 244-249 - [c360]Krishnendu Chakrabarty
Special session on machine learning for test and diagnosis. VTS 2018: 1 - [c359]Rana Elnaggar, Ramesh Karri
Securing IJTAG against data-integrity attacks. VTS 2018: 1-6 - [c358]Abhishek Koneru, Krishnendu Chakrabarty
An inter-layer interconnect BIST solution for monolithic 3D ICs. VTS 2018: 1-6 - [c357]Zhanwei Zhong, Guoliang Li, Qinfu Yang, Jun Qian, Krishnendu Chakrabarty
Broadcast-based minimization of the overall access time for the IEEE 1687 network. VTS 2018: 1-6 - [p5]Robert Wille, Krishnendu Chakrabarty
Emerging Circuit Technologies: An Overview on the Next Generation of Circuits. Advanced Logic Synthesis 2018: 43-67 - 2017
- [j247]Krishnendu Chakrabarty
Quo Vadis Test? The Past, the Present, and the Future: No Longer a Necessary Evil. IEEE Des. Test 34(3): 93-95 (2017) - [j246]Ran Wang
Tackling Test Challenges for Interposer-Based 2.5-D Integrated Circuits. IEEE Des. Test 34(5): 72-79 (2017) - [j245]Vineeta Shukla
Offline Error Detection in MEDA-Based Digital Microfluidic Biochips Using Oscillation-Based Testing Methodology. J. Electron. Test. 33(5): 621-635 (2017) - [j244]Abhishek Koneru, Sukeshwar Kannan, Krishnendu Chakrabarty
Impact of Electrostatic Coupling and Wafer-Bonding Defects on Delay Testing of Monolithic 3D Integrated Circuits. ACM J. Emerg. Technol. Comput. Syst. 13(4): 54:1-54:23 (2017) - [j243]Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Krishnendu Chakrabarty
Droplet Size-Aware High-Level Synthesis for Micro-Electrode-Dot-Array Digital Microfluidic Biochips. IEEE Trans. Biomed. Circuits Syst. 11(3): 612-626 (2017) - [j242]Zipeng Li
Droplet Size-Aware and Error-Correcting Sample Preparation Using Micro-Electrode-Dot-Array Digital Microfluidic Biochips. IEEE Trans. Biomed. Circuits Syst. 11(6): 1380-1391 (2017) - [j241]Kai Hu, Trung Anh Dinh, Tsung-Yi Ho
Control-Layer Routing and Control-Pin Minimization for Flow-Based Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(1): 55-68 (2017) - [j240]Sukanta Bhattacharjee
Adaptation of Biochemical Protocols to Handle Technology-Change for Digital Microfluidics. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(3): 370-383 (2017) - [j239]Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty
Design-Space Exploration and Optimization of an Energy-Efficient and Reliable 3-D Small-World Network-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(5): 719-732 (2017) - [j238]Mohamed Ibrahim
Synthesis of Cyberphysical Digital-Microfluidic Biochips for Real-Time Quantitative Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(5): 733-746 (2017) - [j237]Ran Wang
ExTest Scheduling and Optimization for 2.5-D SoCs With Wrapped Tiles. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(6): 1030-1042 (2017) - [j236]Ran Wang
Prebond Testing and Test-Path Design for the Silicon Interposer in 2.5-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(8): 1406-1419 (2017) - [j235]Fotis Vartziotis
A Branch-&-Bound Test-Access-Mechanism Optimization Method for Multi-Vdd SoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(11): 1911-1924 (2017) - [j234]Mahmoud Elfar
Synthesis of Error-Recovery Protocols for Micro-Electrode-Dot-Array Digital Microfluidic Biochips. ACM Trans. Embed. Comput. Syst. 16(5s): 127:1-127:22 (2017) - [j233]Sourav Das, Dongjin Lee, Wonje Choi, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty
VFI-Based Power Management to Enhance the Lifetime of High-Performance 3D NoCs. ACM Trans. Design Autom. Electr. Syst. 23(1): 7:1-7:26 (2017) - [j232]Krishnendu Chakrabarty
Editorial. IEEE Trans. Very Large Scale Integr. Syst. 25(1): 1-20 (2017) - [j231]Krishnendu Chakrabarty
Editorial. IEEE Trans. Very Large Scale Integr. Syst. 25(9): 2393 (2017) - [c356]Arunkumar Vijayan, Saman Kiamehr, Fabian Oboril, Krishnendu Chakrabarty
Workload-aware static aging monitoring of timing-critical flip-flops. ASP-DAC 2017: 176-181 - [c355]Oliver Keszöcze
Exact routing for micro-electrode-dot-array digital microfluidic biochips. ASP-DAC 2017: 708-713 - [c354]Wenqin Huangfu, Lixue Xia
Computation-oriented fault-tolerance schemes for RRAM computing systems. ASP-DAC 2017: 794-799 - [c353]Jack Tang, Mohamed Ibrahim, Krishnendu Chakrabarty
Security Implications of Cyberphysical Flow-Based Microfluidic Biochips. ATS 2017: 115-120 - [c352]Sudeep Pasricha, Janardhan Rao Doppa, Krishnendu Chakrabarty
Data analytics enables energy-efficiency and robustness: from mobile to manycores, datacenters, and networks (special session paper). CODES+ISSS 2017: 27:1-27:10 - [c351]Lixue Xia
Fault-Tolerant Training with On-Line Fault Detection for RRAM-Based Neural Computing Systems. DAC 2017: 33:1-33:6 - [c350]Chunfeng Liu, Bing Li, Bhargab B. Bhattacharya, Krishnendu Chakrabarty
Testing microfluidic Fully Programmable Valve Arrays (FPVAs). DATE 2017: 91-96 - [c349]Sebastian Huhn, Stephan Eggersglüß, Krishnendu Chakrabarty
Optimization of retargeting for IEEE 1149.1 TAP controllers with embedded compression. DATE 2017: 578-583 - [c348]Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty
Robust TSV-based 3D NoC design to counteract electromigration and crosstalk noise. DATE 2017: 1366-1371 - [c347]Mohamed Ibrahim, Krishnendu Chakrabarty
CoSyn: Efficient single-cell analysis using a hybrid microfluidic platform. DATE 2017: 1673-1678 - [c346]Mohamed Ibrahim, Krishnendu Chakrabarty
Digital-microfluidic biochips for quantitative analysis: Bridging the Gap between microfluidics and microbiology. DATE 2017: 1787-1792 - [c345]Zhanwei Zhong, Zipeng Li, Krishnendu Chakrabarty
Adaptive error recovery in MEDA biochips based on droplet-aliquot operations and predictive analysis. ICCAD 2017: 615-622 - [c344]Mohamed Ibrahim, Aditya Sridhar, Krishnendu Chakrabarty
Sortex: Efficient timing-driven synthesis of reconfigurable flow-based biochips for scalable single-cell screening. ICCAD 2017: 623-630 - [c343]Kyungwook Chang, Abhishek Koneru, Krishnendu Chakrabarty
Design automation and testing of monolithic 3D ICs: Opportunities, challenges, and solutions: (Invited paper). ICCAD 2017: 805-810 - [c342]Jack Tang, Mohamed Ibrahim, Krishnendu Chakrabarty
Security Trade-Offs in Microfluidic Routing Fabrics. ICCD 2017: 25-32 - [c341]Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty
Monolithic 3D-Enabled High Performance and Energy Efficient Network-on-Chip. ICCD 2017: 233-240 - [c340]Abhishek Koneru, Sukeshwar Kannan, Krishnendu Chakrabarty
A Design-for-Test Solution for Monolithic 3D Integrated Circuits. ICCD 2017: 685-688 - [c339]Zipeng Li, Kelvin Yi-Tse Lai, Krishnendu Chakrabarty
Sample Preparation on Micro-Electrode-Dot-Array Digital Microfluidic Biochips. ISVLSI 2017: 146-151 - [c338]Rana Elnaggar, Krishnendu Chakrabarty
Run-time hardware trojan detection using performance counters. ITC 2017: 1-10 - [c337]Shi Jin, Zhaobo Zhang, Krishnendu Chakrabarty
Changepoint-based anomaly detection in a core router system. ITC 2017: 1-10 - [c336]Shi Jin, Zhaobo Zhang, Krishnendu Chakrabarty
Symbol-based health-status analysis in a core router system. ITC 2017: 1-10 - [c335]Ying Zhang, Krishnendu Chakrabarty
Software-based online self-testing of network-on-chip using bounded model checking. ITC 2017: 1-10 - [c334]Zipeng Li, Jonathon E. Colburn
Test-cost optimization in a scan-compression architecture using support-vector regression. VTS 2017: 1-6 - [i9]Chunfeng Liu, Bing Li, Bhargab B. Bhattacharya, Krishnendu Chakrabarty, Tsung-Yi Ho, Ulf Schlichtmann:
Testing Microfluidic Fully Programmable Valve Arrays (FPVAs). CoRR abs/1705.04996 (2017) - [i8]Shigeru Yamashita, Tsung-Yi Ho
Microfluidic Biochips: Bridging Biochemistry with Computer Science and Engineering (NII Shonan Meeting 2017-1). NII Shonan Meet. Rep. 2017 (2017) - 2016
- [j230]Mohamed Ibrahim, Krishnendu Chakrabarty
Digital-Microfluidic Biochips. Computer 49(6): 8-9 (2016) - [j229]Sk Subidh Ali
Supply-Chain Security of Digital Microfluidic Biochips. Computer 49(8): 36-43 (2016) - [j228]Dong Xiang, Krishnendu Chakrabarty
Multicast-Based Testing and Thermal-Aware Test Scheduling for 3D ICs with a Stacked Network-on-Chip. IEEE Trans. Computers 65(9): 2767-2779 (2016) - [j227]Mukesh Agrawal, Krishnendu Chakrabarty
A Distributed, Reconfigurable, and Reusable BIST Infrastructure for Test and Diagnosis of 3-D-Stacked ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(2): 309-322 (2016) - [j226]Fangming Ye, Zhaobo Zhang, Krishnendu Chakrabarty
Adaptive Board-Level Functional Fault Diagnosis Using Incremental Decision Trees. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(2): 323-336 (2016) - [j225]Kai Hu, Tsung-Yi Ho
Wash Optimization and Analysis for Cross-Contamination Removal Under Physical Constraints in Flow-Based Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(4): 559-572 (2016) - [j224]Fangming Ye, Farshad Firouzi, Yang Yang, Krishnendu Chakrabarty
On-Chip Droop-Induced Circuit Delay Prediction Based on Support-Vector Machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(4): 665-678 (2016) - [j223]Shi Jin, Fangming Ye, Zhaobo Zhang, Krishnendu Chakrabarty
Efficient Board-Level Functional Fault Diagnosis With Missing Syndromes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(6): 985-998 (2016) - [j222]Kai Hu, Bhargab B. Bhattacharya, Krishnendu Chakrabarty
Fault Diagnosis for Leakage and Blockage Defects in Flow-Based Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(7): 1179-1191 (2016) - [j221]Tianjian Li, Feng Xie, Xiaoyao Liang, Qiang Xu
A Novel Test Method for Metallic CNTs in CNFET-Based SRAMs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(7): 1192-1205 (2016) - [j220]Sk Subidh Ali
Security Assessment of Cyberphysical Digital Microfluidic Biochips. IEEE ACM Trans. Comput. Biol. Bioinform. 13(3): 445-458 (2016) - [j219]Zipeng Li, Tsung-Yi Ho
Optimization of 3D Digital Microfluidic Biochips for the Multiplexed Polymerase Chain Reaction. ACM Trans. Design Autom. Electr. Syst. 21(2): 25:1-25:27 (2016) - [j218]Sudip Poddar
Error-Correcting Sample Preparation with Cyberphysical Digital Microfluidic Lab-on-Chip. ACM Trans. Design Autom. Electr. Syst. 22(1): 2:1-2:29 (2016) - [j217]Krishnendu Chakrabarty
Editorial First TVLSI Best AE and Reviewer Awards. IEEE Trans. Very Large Scale Integr. Syst. 24(8): 2613 (2016) - [c333]Mehdi Baradaran Tahoori, Krishnendu Chakrabarty:
Test and Reliability Issues in 2.5D and 3D Integration. ATS 2016: 73 - [c332]Ran Wang, Krishnendu Chakrabarty
Testing of Interposer-Based 2.5D Integrated Circuits: Challenges and Solutions. ATS 2016: 74-79 - [c331]Shengcheng Wang, Ran Wang, Krishnendu Chakrabarty
Multicast Test Architecture and Test Scheduling for Interposer-Based 2.5D ICs. ATS 2016: 86-91 - [c330]Sk Subidh Ali
Microfluidic encryption of on-chip biochemical assays. BioCAS 2016: 152-155 - [c329]Mohamed Ibrahim, Krishnendu Chakrabarty
Cyberphysical adaptation in digital-microfluidic biochips. BioCAS 2016: 444-447 - [c328]Mohamed Ibrahim, Craig Boswell, Krishnendu Chakrabarty
A real-time digital-microfluidic platform for epigenetics. CASES 2016: 10:1-10:10 - [c327]Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Tsung-Yi Ho
High-level synthesis for micro-electrode-dot-array digital microfluidic biochips. DAC 2016: 146:1-146:6 - [c326]Mohamed Ibrahim, Krishnendu Chakrabarty, Kristin Scott:
Integrated and real-time quantitative analysis using cyberphysical digital-microfluidic biochips. DATE 2016: 630-635 - [c325]Ran Wang, Zipeng Li, Sukeshwar Kannan, Krishnendu Chakrabarty:
Pre-bond testing of the silicon interposer in 2.5D ICs. DATE 2016: 978-983 - [c324]Shengcheng Wang, Mehdi Baradaran Tahoori, Krishnendu Chakrabarty:
Thermal-aware TSV repair for electromigration in 3D ICs. DATE 2016: 1291-1296 - [c323]Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty:
Reliability and performance trade-offs for 3D NoC-enabled multicore chips. DATE 2016: 1429-1432 - [c322]Panagiotis Georgiou, Fotios Vartziotis
Two-dimensional time-division multiplexing for 3D-SoCs. ETS 2016: 1-6 - [c321]Abhishek Koneru, Krishnendu Chakrabarty
Analysis of electrostatic coupling in monolithic 3D integrated circuits and its impact on delay testing. ETS 2016: 1-6 - [c320]Ran Wang, Krishnendu Chakrabarty
A design-for-test solution for monolithic 3D integrated circuits. ETS 2016: 1-6 - [c319]Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty
Energy-efficient and reliable 3D network-on-chip (NoC): architectures and optimization algorithms. ICCAD 2016: 57 - [c318]Ran Wang, Sergej Deutsch, Mukesh Agrawal, Krishnendu Chakrabarty
The hype, myths, and realities of testing 3D integrated circuits. ICCAD 2016: 58 - [c317]Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Krishnendu Chakrabarty
Error recovery in a micro-electrode-dot-array digital microfluidic biochip? ICCAD 2016: 105 - [c316]Shi Jin, Zhaobo Zhang, Krishnendu Chakrabarty
Accurate anomaly detection using correlation-based time-series analysis in a core router system. ITC 2016: 1-10 - [c315]Gurunath Kadam
Supply-voltage optimization to account for process variations in high-volume manufacturing testing. ITC 2016: 1-9 - [c314]Tianjian Li, Li Jiang, Xiaoyao Liang, Qiang Xu
Defect tolerance for CNFET-based SRAMs. ITC 2016: 1-9 - [c313]Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Krishnendu Chakrabarty
Built-in self-test for micro-electrode-dot-array digital microfluidic biochips. ITC 2016: 1-10 - [c312]Jack Tang, Ramesh Karri
Securing digital microfluidic biochips by randomizing checkpoints. ITC 2016: 1-8 - [c311]Ran Wang, Krishnendu Chakrabarty
Testing of interposer-based 2.5D integrated circuits. ITC 2016: 1-10 - [c310]Dong Xiang, Krishnendu Chakrabarty
A unified test and fault-tolerant multicast solution for network-on-chip designs. ITC 2016: 1-9 - [c309]Krishnendu Chakrabarty:
The hype, myths, and realities of testing 2.5D/3D integrated circuits. LATS 2016: 1 - [c308]Jaan Raik
Foreword. VLSI-SoC 2016: 1 - [c307]Srinivasa Shashank Nuthakki
Optimization of the IEEE 1687 access network for hybrid access schedules. VTS 2016: 1-6 - [c306]Arunkumar Vijayan, Abhishek Koneru, Mojtaba Ebrahimi, Krishnendu Chakrabarty
Online soft-error vulnerability estimation for memory arrays. VTS 2016: 1-6 - [c305]Ran Wang, Bonita Bhaskaran, Karthikeyan Natarajan, Ayub Abdollahian, Kaushik Narayanun, Krishnendu Chakrabarty
A programmable method for low-power scan shift in SoC integrated circuits. VTS 2016: 1-6 - [i7]Sourav Das, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty:
Design-Space Exploration and Optimization of an Energy-Efficient and Reliable 3D Small-world Network-on-Chip. CoRR abs/1608.06972 (2016) - 2015
- [b11]Qing Duan, Krishnendu Chakrabarty
Data-Driven Optimization and Knowledge Discovery for an Enterprise Information System. Springer 2015, ISBN 978-3-319-18737-2, pp. I-XII, 1-159 - [b10]Yan Luo, Krishnendu Chakrabarty
Hardware/Software Co-Design and Optimization for Cyberphysical Integration in Digital Microfluidic Biochips. Springer 2015, ISBN 978-3-319-09005-4, pp. I-XII, 1-197 - [j216]Paul Pop
Continuous-Flow Biochips: Technology, Physical-Design Methods, and Testing. IEEE Des. Test 32(6): 8-19 (2015) - [j215]Sudip Roy, Partha Pratim Chakrabarti, Krishnendu Chakrabarty
Waste-aware single-target dilution of a biochemical fluid using digital microfluidic biochips. Integr. 51: 194-207 (2015) - [j214]Qing Duan, Jun Zeng, Krishnendu Chakrabarty
Real-Time Production Scheduler for Digital-Print-Service Providers Based on a Dynamic Incremental Evolutionary Algorithm. IEEE Trans Autom. Sci. Eng. 12(2): 701-715 (2015) - [j213]Yan Luo, Bhargab B. Bhattacharya, Tsung-Yi Ho
Design and Optimization of a Cyberphysical Digital-Microfluidic Biochip for the Polymerase Chain Reaction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(1): 29-42 (2015) - [j212]Mukesh Agrawal, Krishnendu Chakrabarty
Reuse-Based Optimization for Prebond and Post-Bond Testing of 3-D-Stacked ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(1): 122-135 (2015) - [j211]Ran Wang, Krishnendu Chakrabarty
Interconnect Testing and Test-Path Scheduling for Interposer-Based 2.5-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(1): 136-149 (2015) - [j210]Qing Duan, Jun Zeng, Krishnendu Chakrabarty
Accurate Predictions of Process-Execution Time and Process Status Based on Support-Vector Regression for Enterprise Information Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(3): 354-366 (2015) - [j209]Fotis Vartziotis
Time-Division Multiplexing for Testing DVFS-Based SoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(4): 668-681 (2015) - [j208]Fangming Ye, Zhaobo Zhang, Krishnendu Chakrabarty
Information-Theoretic Syndrome Evaluation, Statistical Root-Cause Analysis, and Correlation-Based Feature Selection for Guiding Board-Level Fault Diagnosis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(6): 1014-1026 (2015) - [j207]Mukesh Agrawal, Krishnendu Chakrabarty
Test-Cost Modeling and Optimal Test-Flow Selection of 3-D-Stacked ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(9): 1523-1536 (2015) - [j206]Sergej Deutsch, Krishnendu Chakrabarty
Robust Optimization of Test-Access Architectures Under Realistic Scenarios. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(11): 1873-1884 (2015) - [j205]Mohamed Ibrahim, Krishnendu Chakrabarty
Efficient Error Recovery in Cyberphysical Digital-Microfluidic Biochips. IEEE Trans. Multi Scale Comput. Syst. 1(1): 46-58 (2015) - [j204]Qing Duan, Jun Zeng, Krishnendu Chakrabarty
Data-Driven Optimization of Order Admission Policies in a Digital Print Factory. ACM Trans. Design Autom. Electr. Syst. 20(2): 21:1-21:25 (2015) - [j203]Farshad Firouzi, Fangming Ye, Krishnendu Chakrabarty
Aging- and Variation-Aware Delay Monitoring Using Representative Critical Path Selection. ACM Trans. Design Autom. Electr. Syst. 20(3): 39:1-39:23 (2015) - [j202]Sudip Roy, Partha Pratim Chakrabarti, Srijan Kumar, Krishnendu Chakrabarty
Layout-Aware Mixture Preparation of Biochemical Fluids on Application-Specific Digital Microfluidic Biochips. ACM Trans. Design Autom. Electr. Syst. 20(3): 45:1-45:34 (2015) - [j201]Qing Duan, Abhishek Koneru, Jun Zeng, Krishnendu Chakrabarty
Accurate Analysis and Prediction of Enterprise Service-Level Performance. ACM Trans. Design Autom. Electr. Syst. 20(4): 52:1-52:23 (2015) - [j200]Ran Wang, Krishnendu Chakrabarty
Built-In Self-Test and Test Scheduling for Interposer-Based 2.5D IC. ACM Trans. Design Autom. Electr. Syst. 20(4): 58:1-58:24 (2015) - [j199]Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman
Offline Washing Schemes for Residue Removal in Digital Microfluidic Biochips. ACM Trans. Design Autom. Electr. Syst. 21(1): 17:1-17:33 (2015) - [j198]Krishnendu Chakrabarty
Editorial. IEEE Trans. Very Large Scale Integr. Syst. 23(1): 1-17 (2015) - [j197]Brandon Noia, Shreepad Panth, Krishnendu Chakrabarty
Scan Test of Die Logic in 3-D ICs Using TSV Probing. IEEE Trans. Very Large Scale Integr. Syst. 23(2): 317-330 (2015) - [c304]Zipeng Li, Tsung-Yi Ho
Design and optimization of 3D digital microfluidic biochips for the polymerase chain reaction. ASP-DAC 2015: 184-189 - [c303]Fangming Ye, Krishnendu Chakrabarty
Self-learning and adaptive board-level functional fault diagnosis. ASP-DAC 2015: 294-301 - [c302]Sergej Deutsch, Krishnendu Chakrabarty
Software-based test and diagnosis of SoCs using embedded and wide-I/O DRAM. ASP-DAC 2015: 532-537 - [c301]Kai Hu, Mohamed Ibrahim, Liji Chen, Zipeng Li, Krishnendu Chakrabarty
Experimental demonstration of error recovery in an integrated cyberphysical digital-microfluidic platform. BioCAS 2015: 1-4 - [c300]Feng Xie, Xiaoyao Liang, Qiang Xu
Jump test for metallic CNTs in CNFET-based SRAM. DAC 2015: 16:1-16:6 - [c299]Mohamed Ibrahim, Krishnendu Chakrabarty:
Error recovery in digital microfluidics for personalized medicine. DATE 2015: 247-252 - [c298]Chien-Hui Liao, Charles H.-P. Wen, Krishnendu Chakrabarty:
An online thermal-constrained task scheduler for 3D multi-core processors. DATE 2015: 351-356 - [c297]Ismail Emre Araci, Paul Pop
Microfluidic very large-scale integration for biochips: Technology, testing and fault-tolerant design. ETS 2015: 1-8 - [c296]Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho
Testing of digital microfluidic biochips with arbitrary layouts. ETS 2015: 1-2 - [c295]Farshad Firouzi, Fangming Ye, Arunkumar Vijayan, Abhishek Koneru, Krishnendu Chakrabarty
Re-using BIST for circuit aging monitoring. ETS 2015: 1-2 - [c294]Fotios Vartziotis
A branch-&-bound algorithm for TAM optimization in multi-Vdd SoCs. ETS 2015: 1-2 - [c293]Krishnendu Chakrabarty:
Digital Microfluidic Biochips: Towards Functional Diversity, More than Moore, and Cyberphysical Integration. ACM Great Lakes Symposium on VLSI 2015: 1 - [c292]Abhishek Koneru, Arunkumar Vijayan, Krishnendu Chakrabarty
Fine-Grained Aging Prediction Based on the Monitoring of Run-Time Stress Using DfT Infrastructure. ICCAD 2015: 51-58 - [c291]Shengcheng Wang, Mehdi Baradaran Tahoori, Krishnendu Chakrabarty
Defect Clustering-Aware Spare-TSV Allocation for 3D ICs. ICCAD 2015: 307-314 - [c290]Sourav Das, Janardhan Rao Doppa, Daehyun Kim, Partha Pratim Pande, Krishnendu Chakrabarty
Optimizing 3D NoC Design for Energy Efficiency: A Machine Learning Approach. ICCAD 2015: 705-712 - [c289]Oliver Keszöcze
A General and Exact Routing Methodology for Digital Microfluidic Biochips. ICCAD 2015: 874-881 - [c288]Tsung-Yi Ho
Cyber-physical integration in programmable microfluidic biochips. ICCD 2015: 224-227 - [c287]Sk Subidh Ali
Security implications of cyberphysical digital microfluidic biochips. ICCD 2015: 483-486 - [c286]Mehdi Baradaran Tahoori, Abhijit Chatterjee, Krishnendu Chakrabarty
Self-awareness and self-learning for resiliency in real-time systems. IOLTS 2015: 128-131 - [c285]Sergej Deutsch, Krishnendu Chakrabarty
Contactless pre-bond TSV fault diagnosis using duty-cycle detectors and ring oscillators. ITC 2015: 1-10 - [c284]Sergej Deutsch, Krishnendu Chakrabarty
Test and debug solutions for 3D-stacked integrated circuits. ITC 2015: 1-10 - [c283]Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho
A general testing method for digital microfluidic biochips under physical constraints. ITC 2015: 1-8 - [c282]Zipeng Li, Sandeep Kumar Goel, Frank Lee, Krishnendu Chakrabarty
Efficient observation-point insertion for diagnosability enhancement in digital circuits. ITC 2015: 1-10 - [c281]Fotios Vartziotis
Test-access-mechanism optimization for multi-Vdd SoCs. ITC 2015: 1-10 - [c280]Mohamed Ibrahim, Zipeng Li, Krishnendu Chakrabarty
Advances in Design Automation Techniques for Digital-Microfluidic Biochips. SyDe Summer School 2015: 190-223 - [c279]Kai Hu, Bhargab B. Bhattacharya, Krishnendu Chakrabarty
Fault diagnosis for flow-based microfluidic biochips. VTS 2015: 1-6 - [c278]Ran Wang, Guoliang Li, Rui Li, Jun Qian, Krishnendu Chakrabarty
ExTest scheduling for 2.5D system-on-chip integrated circuits. VTS 2015: 1-6 - [i6]Krishnendu Chakrabarty, Tsung-Yi Ho
Design of Microfluidic Biochips (Dagstuhl Seminar 15352). Dagstuhl Reports 5(8): 34-53 (2015) - 2014
- [b9]Brandon Noia, Krishnendu Chakrabarty
Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs. Springer 2014, ISBN 978-3-319-02377-9, pp. I-XVIII, 1-245 - [j196]Fangming Ye, Krishnendu Chakrabarty
Information-Theoretic Framework for Evaluating and Guiding Board-Level Functional-Fault Diagnosis. IEEE Des. Test 31(3): 65-75 (2014) - [j195]Wei-Cheng Lien
Efficient LFSR Reseeding Based on Internal-Response Feedback. J. Electron. Test. 30(6): 673-685 (2014) - [j194]Sudip Roy, Bhargab B. Bhattacharya, Sarmishtha Ghoshal, Krishnendu Chakrabarty
High-throughput dilution engine for sample preparation on digital microfluidic biochips. IET Comput. Digit. Tech. 8(4): 163-171 (2014) - [j193]Krishnendu Chakrabarty, Mukesh Agrawal, Sergej Deutsch, Brandon Noia, Ran Wang, Fangming Ye:
Test and Design-for-Testability Solutions for 3D Integrated Circuits. Inf. Media Technol. 9(4): 386-403 (2014) - [j192]Krishnendu Chakrabarty
Test and Design-for-Testability Solutions for 3D Integrated Circuits. IPSJ Trans. Syst. LSI Des. Methodol. 7: 56-73 (2014) - [j191]Sudip Roy, Bhargab B. Bhattacharya, Sarmishtha Ghoshal, Krishnendu Chakrabarty
Theory and analysis of generalized mixing and dilution of biochemical fluids using digital microfluidic biochips. ACM J. Emerg. Technol. Comput. Syst. 11(1): 2:1-2:33 (2014) - [j190]Sudip Roy, Bhargab B. Bhattacharya, Sarmishtha Ghoshal, Krishnendu Chakrabarty
An Optimal Two-Mixer Dilution Engine with Digital Microfluidics for Low-Power Applications. J. Low Power Electron. 10(3): 506-518 (2014) - [j189]Michael Richter, Krishnendu Chakrabarty
Optimization of Test Pin-Count, Test Scheduling, and Test Access for NoC-Based Multicore SoCs. IEEE Trans. Computers 63(3): 691-702 (2014) - [j188]Yi-Ling Hsieh, Tsung-Yi Ho
Biochip Synthesis and Dynamic Error Recovery for Sample Preparation Using Digital Microfluidics. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(2): 183-196 (2014) - [j187]Fangming Ye, Zhaobo Zhang, Krishnendu Chakrabarty
Board-Level Functional Fault Diagnosis Using Multikernel Support Vector Machines and Incremental Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(2): 279-290 (2014) - [j186]Brandon Noia, Krishnendu Chakrabarty
Retiming for Delay Recovery After DfT Insertion on Interdie Paths in 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(3): 464-475 (2014) - [j185]Sergej Deutsch, Krishnendu Chakrabarty
Contactless Pre-Bond TSV Test and Diagnosis Using Ring Oscillators and Multiple Voltage Levels. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(5): 774-785 (2014) - [j184]Yan Luo, Krishnendu Chakrabarty
Biochemistry Synthesis on a Cyberphysical Digital Microfluidics Platform Under Completion-Time Uncertainties in Fluidic Operations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(6): 903-916 (2014) - [j183]Mukesh Agrawal, Michael Richter, Krishnendu Chakrabarty
Test-Delivery Optimization in Manycore SOCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(7): 1067-1080 (2014) - [j182]Debasis Mitra, Sudip Roy, Sukanta Bhattacharjee, Krishnendu Chakrabarty
On-Chip Sample Preparation for Multiple Targets Using Digital Microfluidics. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(8): 1131-1144 (2014) - [j181]Ran Wang, Zhaobo Zhang, Xrysovalantis Kavousianos, Yiorgos Tsiatouhas
Built-In Self-Test, Diagnosis, and Repair of MultiMode Power Switches. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(8): 1231-1244 (2014) - [j180]Ran Wang, Krishnendu Chakrabarty
Scan-Based Testing of Post-Bond Silicon Interposer Interconnects in 2.5-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(9): 1410-1423 (2014) - [j179]Kai Hu, Feiqiao Yu
Testing of Flow-Based Microfluidic Biochips: Fault Modeling, Test Generation, and Experimental Demonstration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(10): 1463-1475 (2014) - [j178]Zhaobo Zhang, Xrysovalantis Kavousianos, Krishnendu Chakrabarty
Static Power Reduction Using Variation-Tolerant and Reconfigurable Multi-Mode Power Switches. IEEE Trans. Very Large Scale Integr. Syst. 22(1): 13-26 (2014) - [j177]S. Saqib Khursheed, Kan Shi, Bashir M. Al-Hashimi, Peter R. Wilson, Krishnendu Chakrabarty
Delay Test for Diagnosis of Power Switches. IEEE Trans. Very Large Scale Integr. Syst. 22(2): 197-206 (2014) - [j176]Chun-Yi Kuo, Chi-Jih Shih, Yi-Chang Lu
Testing of TSV-Induced Small Delay Faults for 3-D Integrated Circuits. IEEE Trans. Very Large Scale Integr. Syst. 22(3): 667-674 (2014) - [c277]Kai Hu, Tsung-Yi Ho
Wash optimization for cross-contamination removal in flow-based microfluidic biochips. ASP-DAC 2014: 244-249 - [c276]Farshad Firouzi, Fangming Ye, Saman Kiamehr, Krishnendu Chakrabarty
Adaptive Mitigation of Parameter Variations. ATS 2014: 51-56 - [c275]Zipeng Li, Trung Anh Dinh, Tsung-Yi Ho
Reliability-Driven Pipelined Scan-Like Testing of Digital Microfluidic Biochips. ATS 2014: 57-62 - [c274]Kai Hu, Trung Anh Dinh, Tsung-Yi Ho
Control-layer optimization for flow-based mVLSI microfluidic biochips. CASES 2014: 16:1-16:10 - [c273]Sudip Roy, Srijan Kumar, Partha Pratim Chakrabarti, Bhargab B. Bhattacharya, Krishnendu Chakrabarty
Demand-Driven Mixture Preparation and Droplet Streaming using Digital Microfluidic Biochips. DAC 2014: 144:1-144:6 - [c272]Fotis Vartziotis, Xrysovalantis Kavousianos, Krishnendu Chakrabarty, Rubin A. Parekhji, Arvind Jain:
Multi-site test optimization for multi-Vdd SoCs using space- and time- division multiplexing. DATE 2014: 1-6 - [c271]Xrysovalantis Kavousianos, Krishnendu Chakrabarty
Recent advances in single- and multi-site test optimization for DVS-based SoCs. DTIS 2014: 1-6 - [c270]Wei-Cheng Lien
Output-bit selection with X-avoidance using multiple counters for test-response compaction. ETS 2014: 1-6 - [c269]Krishnendu Chakrabarty
Design automation for biochemistry synthesis on a digital microfluidic lab-on-a-chip. ICCAD 2014: 286-288 - [c268]Ran Wang, Krishnendu Chakrabarty
Built-in self-test for interposer-based 2.5D ICs. ICCD 2014: 181-188 - [c267]Farshad Firouzi, Fangming Ye, Krishnendu Chakrabarty
Chip Health Monitoring Using Machine Learning. ISVLSI 2014: 280-283 - [c266]Mukesh Agrawal, Krishnendu Chakrabarty
A distributed, reconfigurable, and reusable bist infrastructure for 3D-stacked ICs. ITC 2014: 1-10 - [c265]Sergej Deutsch, Krishnendu Chakrabarty
Massive signal tracing using on-chip DRAM for in-system silicon debug. ITC 2014: 1-10 - [c264]Fangming Ye, Zhaobo Zhang, Krishnendu Chakrabarty
Knowledge discovery and knowledge transfer in board-level functional fault diagnosis. ITC 2014: 1-10 - [c263]Wei-Cheng Lien
Output selection for test response compaction based on multiple counters. VLSI-DAT 2014: 1-4 - [c262]Krishnendu Chakrabarty, Tsung-Yi Ho
Tutorial T5: Microfluidic Biochips: Connecting VLSI and Embedded Systems to the Life Sciences. VLSID 2014: 11-12 - [c261]Sukanta Bhattacharjee, Ansuman Banerjee, Krishnendu Chakrabarty
Correctness Checking of Bio-chemical Protocol Realizations on a Digital Microfluidic Biochip. VLSID 2014: 504-509 - [c260]Mukesh Agrawal, Krishnendu Chakrabarty
Test-time optimization in NOC-based manycore SOCs using multicast routing. VTS 2014: 1-6 - [c259]Kai Hu, Tsung-Yi Ho
Test generation and design-for-testability for flow-based mVLSI microfluidic biochips. VTS 2014: 1-6 - [c258]Ran Wang, Krishnendu Chakrabarty
At-speed interconnect testing and test-path optimization for 2.5D ICs. VTS 2014: 1-6 - [c257]Fangming Ye, Farshad Firouzi, Yang Yang, Krishnendu Chakrabarty
On-chip voltage-droop prediction using support-vector machines. VTS 2014: 1-6 - [p4]Sandeep Kumar Goel, Krishnendu Chakrabarty:
Circuit Topology-Based Test Pattern Generation for Small-Delay Defects. Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits 2014: 161-184 - [e1]Sandeep Kumar Goel, Krishnendu Chakrabarty:
Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits. CRC Press 2014, ISBN 978-1-439-82941-7 [contents] - 2013
- [j175]Fang Bao, Ke Peng, Mahmut Yilmaz, Krishnendu Chakrabarty
Efficient Pattern Generation for Small-Delay Defects Using Selection of Critical Faults. J. Electron. Test. 29(1): 35-48 (2013) - [j174]Krishnendu Chakrabarty, Urmila Kar
Control of Chaos in Current Controlled DC Drives. J. Circuits Syst. Comput. 22(5) (2013) - [j173]Yan Luo, Krishnendu Chakrabarty
Error Recovery in Cyberphysical Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(1): 59-72 (2013) - [j172]Wei-Cheng Lien
Counter-Based Output Selection for Test Response Compaction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(1): 152-164 (2013) - [j171]Brandon Noia, Krishnendu Chakrabarty
Pre-Bond Probing of Through-Silicon Vias in 3-D Stacked ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(4): 547-558 (2013) - [j170]Fangming Ye, Zhaobo Zhang, Krishnendu Chakrabarty
Board-Level Functional Fault Diagnosis Using Artificial Neural Networks, Support-Vector Machines, and Weighted-Majority Voting. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(5): 723-736 (2013) - [j169]Yan Luo, Krishnendu Chakrabarty
Design of Pin-Constrained General-Purpose Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(9): 1307-1320 (2013) - [j168]Naghmeh Karimi, Krishnendu Chakrabarty
Detection, Diagnosis, and Recovery From Clock-Domain Crossing Failures in Multiclock SoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(9): 1395-1408 (2013) - [j167]Fang Bao, Ke Peng, Mohammad Tehranipoor, Krishnendu Chakrabarty
Generation of Effective 1-Detect TDF Patterns for Detecting Small-Delay Defects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(10): 1583-1594 (2013) - [j166]Yan Luo, Krishnendu Chakrabarty
Real-Time Error Recovery in Cyberphysical Digital-Microfluidic Biochips Using a Compact Dictionary. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(12): 1839-1852 (2013) - [j165]Dong Xiang, Jianbo Li, Krishnendu Chakrabarty
Test compaction for small-delay defects using an effective path selection scheme. ACM Trans. Design Autom. Electr. Syst. 18(3): 44:1-44:23 (2013) - [j164]Ke Peng, Mahmut Yilmaz, Krishnendu Chakrabarty
Crosstalk- and Process Variations-Aware High-Quality Tests for Small-Delay Defects. IEEE Trans. Very Large Scale Integr. Syst. 21(6): 1129-1142 (2013) - [c256]Zhenqian Zhang, Brandon Noia, Krishnendu Chakrabarty
Face-to-face bus design with built-in self-test in 3D ICs. 3DIC 2013: 1-7 - [c255]Chi-Jih Shih, Shih-An Hsieh, Yi-Chang Lu
Test Generation of Path Delay Faults Induced by Defects in Power TSV. Asian Test Symposium 2013: 43-48 - [c254]Fangming Ye, Shi Jin, Zhaobo Zhang, Krishnendu Chakrabarty
Handling Missing Syndromes in Board-Level Functional-Fault Diagnosis. Asian Test Symposium 2013: 73-78 - [c253]Wei-Cheng Lien
A New LFSR Reseeding Scheme via Internal Response Feedback. Asian Test Symposium 2013: 97-102 - [c252]Ran Wang, Krishnendu Chakrabarty
Post-bond Testing of the Silicon Interposer and Micro-bumps in 2.5D ICs. Asian Test Symposium 2013: 147-152 - [c251]Yan Luo, Krishnendu Chakrabarty
Design of cyberphysical digital microfluidic biochips under completion-time uncertainties in fluidic operations. DAC 2013: 44:1-44:7 - [c250]Li Jiang, Fangming Ye, Qiang Xu
On effective and efficient in-field TSV repair for stacked 3D ICs. DAC 2013: 74:1-74:6 - [c249]Kai Hu, Bang-Ning Hsu, Andrew Madison, Krishnendu Chakrabarty
Fault detection, real-time error recovery, and experimental demonstration for digital microfluidic biochips. DATE 2013: 559-564 - [c248]Xrysovalantis Kavousianos, Krishnendu Chakrabarty
Testing for SoCs with advanced static and dynamic power-management capabilities. DATE 2013: 737-742 - [c247]Sergej Deutsch, Krishnendu Chakrabarty
Non-invasive pre-bond TSV test using ring oscillators and multiple voltage levels. DATE 2013: 1065-1070 - [c246]Srijan Kumar, Sudip Roy, Partha Pratim Chakrabarti, Bhargab B. Bhattacharya, Krishnendu Chakrabarty
Efficient mixture preparation on digital microfluidic biochips. DDECS 2013: 205-210 - [c245]Sergej Deutsch, Krishnendu Chakrabarty
Robust optimization of test-architecture designs for core-based SoCs. ETS 2013: 1-6 - [c244]Fangming Ye, Zhaobo Zhang, Krishnendu Chakrabarty
Information-theoretic syndrome and root-cause analysis for guiding board-level fault diagnosis. ETS 2013: 1-6 - [c243]Yan Luo, Bhargab B. Bhattacharya, Tsung-Yi Ho
Optimization of polymerase chain reaction on a cyberphysical digital microfluidic biochip. ICCAD 2013: 622-629 - [c242]Sukanta Bhattacharjee, Ansuman Banerjee, Tsung-Yi Ho
On Producing Linear Dilution Gradient of a Sample with a Digital Microfluidic Biochip. ISED 2013: 77-81 - [c241]Sudip Roy, Bhargab B. Bhattacharya, Sarmishtha Ghoshal, Krishnendu Chakrabarty
Optimal Two-Mixer Scheduling in Dilution Engine on a Digital Microfluidic Biochip. ISED 2013: 82-86 - [c240]Sudip Roy, Partha Pratim Chakrabarti, Srijan Kumar, Bhargab B. Bhattacharya, Krishnendu Chakrabarty
Routing-aware resource allocation for mixture preparation in digital microfluidic biochips. ISVLSI 2013: 165-170 - [c239]Mukesh Agrawal, Krishnendu Chakrabarty
A graph-theoretic approach for minimizing the number of wrapper cells for pre-bond testing of 3D-stacked ICs. ITC 2013: 1-10 - [c238]Sergej Deutsch, Krishnendu Chakrabarty
Uncertainty-aware robust optimization of test-access architectures for 3D stacked ICs. ITC 2013: 1-10 - [c237]Farshad Firouzi, Fangming Ye, Krishnendu Chakrabarty
Representative critical-path selection for aging-induced delay monitoring. ITC 2013: 1-10 - [c236]Sudip Roy, Bhargab B. Bhattacharya, Sarmishtha Ghoshal, Krishnendu Chakrabarty
On-Chip Dilution from Multiple Concentrations of a Sample Fluid Using Digital Microfluidics. VDAT 2013: 274-283 - [c235]Dong Xiang, Gang Liu, Krishnendu Chakrabarty
Thermal-aware test scheduling for NOC-based 3D integrated circuits. VLSI-SoC 2013: 96-101 - [c234]Mukesh Agrawal, Krishnendu Chakrabarty
Test-cost optimization and test-flow selection for 3D-stacked ICs. VTS 2013: 1-6 - [c233]Kai Hu, Tsung-Yi Ho
Testing of flow-based microfluidic biochips. VTS 2013: 1-6 - [c232]Brandon Noia, Krishnendu Chakrabarty
Post-DfT-insertion retiming for delay recovery on inter-die paths in 3D ICs. VTS 2013: 1-6 - [i5]Sukanta Bhattacharjee, Ansuman Banerjee, Tsung-Yi Ho, Krishnendu Chakrabarty, Bhargab B. Bhattacharya:
Algorithms for Producing Linear Dilution Gradient with Digital Microfluidics. CoRR abs/1307.1251 (2013) - 2012
- [b8]Yang Zhao, Krishnendu Chakrabarty
Design and Testing of Digital Microfluidic Biochips. Springer 2012, ISBN 978-1-4614-0369-2, pp. I-XI, 1-202 - [j163]Krishnendu Chakrabarty
The Quest for High-Yield IC Manufacturing. IEEE Des. Test Comput. 29(1): 4 (2012) - [j162]Krishnendu Chakrabarty
Standards, Interoperability, and Innovation in a Disaggregated IC Industry. IEEE Des. Test Comput. 29(2): 4 (2012) - [j161]Krishnendu Chakrabarty
Looking ahead at the role of electronic design automation in synthetic biology [From the EIC]. IEEE Des. Test Comput. 29(3): 4 (2012) - [j160]Krishnendu Chakrabarty
Electronic Design Methods and Technologies for Green Buildings. IEEE Des. Test Comput. 29(4): 4 (2012) - [j159]Krishnendu Chakrabarty
Towards more digital content in wireless systems [From the EiC]. IEEE Des. Test Comput. 29(6): 4 (2012) - [j158]Brandon Noia, Krishnendu Chakrabarty
Optimization Methods for Post-Bond Testing of 3D Stacked ICs. J. Electron. Test. 28(1): 103-120 (2012) - [j157]Yang Zhao, Krishnendu Chakrabarty
Testing of Low-cost Digital Microfluidic Biochips with Non-Regular Array Layouts. J. Electron. Test. 28(2): 243-255 (2012) - [j156]Sudip Roy, Debasis Mitra, Bhargab B. Bhattacharya, Krishnendu Chakrabarty
Congestion-aware layout design for high-throughput digital microfluidic biochips. ACM J. Emerg. Technol. Comput. Syst. 8(3): 17:1-17:23 (2012) - [j155]Yang Zhao, Krishnendu Chakrabarty
Simultaneous Optimization of Droplet Routing and Control-Pin Mapping to Electrodes in Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(2): 242-254 (2012) - [j154]Hongxia Fang, Krishnendu Chakrabarty
Reproduction and Detection of Board-Level Functional Failure. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(4): 630-643 (2012) - [j153]Yang Zhao, Krishnendu Chakrabarty
Cross-Contamination Avoidance for Droplet Routing in Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(6): 817-830 (2012) - [j152]Hongxia Fang, Krishnendu Chakrabarty
Diagnosis of Board-Level Functional Failures Under Uncertainty Using Dempster-Shafer Theory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(10): 1586-1599 (2012) - [j151]Yi-Ling Hsieh, Tsung-Yi Ho
A Reagent-Saving Mixing Algorithm for Preparing Multiple-Target Biochemical Samples Using Digital Microfluidics. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(11): 1656-1669 (2012) - [j150]Xrysovalantis Kavousianos, Krishnendu Chakrabarty
Test Schedule Optimization for Multicore SoCs: Handling Dynamic Voltage Scaling and Multiple Voltage Islands. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(11): 1754-1766 (2012) - [j149]Zhaobo Zhang, Zhanglei Wang, Xinli Gu, Krishnendu Chakrabarty
Physical-Defect Modeling and Optimization for Fault-Insertion Test. IEEE Trans. Very Large Scale Integr. Syst. 20(4): 723-736 (2012) - [j148]Yang Zhao, Krishnendu Chakrabarty
Optimization Techniques for the Synchronization of Concurrent Fluidic Operations in Pin-Constrained Digital Microfluidic Biochips. IEEE Trans. Very Large Scale Integr. Syst. 20(6): 1132-1145 (2012) - [j147]Li Jiang, Qiang Xu
Integrated Test-Architecture Optimization and Thermal-Aware Test Scheduling for 3-D SoCs Under Pre-Bond Test-Pin-Count Constraint. IEEE Trans. Very Large Scale Integr. Syst. 20(9): 1621-1633 (2012) - [j146]Hongxia Fang, Krishnendu Chakrabarty
Functional Test-Sequence Grading at Register-Transfer Level. IEEE Trans. Very Large Scale Integr. Syst. 20(10): 1890-1894 (2012) - [c231]Sergej Deutsch, Krishnendu Chakrabarty
TSV Stress-Aware ATPG for 3D Stacked ICs. Asian Test Symposium 2012: 31-36 - [c230]Fangming Ye, Zhaobo Zhang, Krishnendu Chakrabarty
Adaptive Board-Level Functional Fault Diagnosis Using Decision Trees. Asian Test Symposium 2012: 202-207 - [c229]Fangming Ye, Zhaobo Zhang, Krishnendu Chakrabarty
Board-Level Functional Fault Diagnosis Using Learning Based on Incremental Support-Vector Machines. Asian Test Symposium 2012: 208-213 - [c228]Stephan Eggersglüß, Mahmut Yilmaz, Krishnendu Chakrabarty
Robust Timing-Aware Test Generation Using Pseudo-Boolean Optimization. Asian Test Symposium 2012: 290-295 - [c227]Valerio Guarnieri, Franco Fummi, Krishnendu Chakrabarty
Reduced-Complexity Transition-Fault Test Generation for Non-scan Circuits through High-Level Mutant Injection. Asian Test Symposium 2012: 302-307 - [c226]Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman
On-Line Error Detection in Digital Microfluidic Biochips. Asian Test Symposium 2012: 332-337 - [c225]Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman
Automated path planning for washing in digital microfluidic biochips. CASE 2012: 115-120 - [c224]Yan Luo, Krishnendu Chakrabarty
Design of pin-constrained general-purpose digital microfluidic biochips. DAC 2012: 18-25 - [c223]Fangming Ye, Krishnendu Chakrabarty
TSV open defects in 3D integrated circuits: characterization, test, and optimal spare allocation. DAC 2012: 1024-1030 - [c222]Naghmeh Karimi, Krishnendu Chakrabarty
Test generation for clock-domain crossing faults in integrated circuits. DATE 2012: 406-411 - [c221]Michael Richter, Krishnendu Chakrabarty
Test pin count reduction for NoC-based Test delivery in multicore SOCs. DATE 2012: 787-792 - [c220]Yan Luo, Krishnendu Chakrabarty, Tsung-Yi Ho
A cyberphysical synthesis approach for error recovery in digital microfluidic biochips. DATE 2012: 1239-1244 - [c219]Xinli Gu, Jeff Rearick, Bill Eklow, Martin Keim, Jun Qian, Artur Jutman
Re-using chip level DFT at board level. ETS 2012: 1 - [c218]Xrysovalantis Kavousianos, Krishnendu Chakrabarty
Time-division multiplexing for testing SoCs with DVS and multiple voltage islands. ETS 2012: 1-6 - [c217]Zhaobo Zhang, Xinli Gu, Yaohui Xie, Zhiyuan Wang, Zhanglei Wang, Krishnendu Chakrabarty
Diagnostic system based on support-vector machines for board-level functional diagnosis. ETS 2012: 1-6 - [c216]Yan Luo, Krishnendu Chakrabarty
Dictionary-based error recovery in cyberphysical digital-microfluidic biochips. ICCAD 2012: 369-376 - [c215]Yi-Ling Hsieh, Tsung-Yi Ho
Design methodology for sample preparation on digital microfluidic biochips. ICCD 2012: 189-194 - [c214]Wei-Cheng Lien
Accumulator-based output selection for test response compaction. ISCAS 2012: 2313-2316 - [c213]Sudip Roy, Bhargab B. Bhattacharya, Sarmishtha Ghoshal, Krishnendu Chakrabarty
Low-Cost Dilution Engine for Sample Preparation in Digital Microfluidic Biochips. ISED 2012: 203-207 - [c212]Debasis Mitra, Sudip Roy, Krishnendu Chakrabarty
On-Chip Sample Preparation with Multiple Dilutions Using Digital Microfluidics. ISVLSI 2012: 314-319 - [c211]Mukesh Agrawal, Michael Richter, Krishnendu Chakrabarty
A dynamic programming solution for optimizing test delivery in multicore SOCs. ITC 2012: 1-10 - [c210]Brandon Noia, Shreepad Panth, Krishnendu Chakrabarty
Scan test of die logic in 3D ICs using TSV probing. ITC 2012: 1-8 - [c209]Chih-Yao Hsu, Chun-Yi Kuo, James Chien-Mo Li, Krishnendu Chakrabarty
3D IC test scheduling using simulated annealing. VLSI-DAT 2012: 1-4 - [c208]Masoud Zamani, Mehdi Baradaran Tahoori, Krishnendu Chakrabarty
Ping-pong test: Compact test vector generation for reversible circuits. VTS 2012: 164-169 - 2011
- [b7]Anuja Banerjee, Krishnendu Chakrabarty:
Test Infrastructure Design - for Digital, Mixed-Signal and Hierarchical SOCs. LAP Lambert Academic Publishing 2011, ISBN 978-3-8433-7359-3, pp. 1-165 - [b6]Mohammad Tehranipoor, Ke Peng, Krishnendu Chakrabarty:
Test and Diagnosis for Small-Delay Defects. Springer 2011, ISBN 978-1-4419-8296-4, pp. I-XVIII, 1-212 - [j145]Mahmut Yilmaz, Mohammad Tehranipoor, Krishnendu Chakrabarty
A Metric to Target Small-Delay Defects in Industrial Circuits. IEEE Des. Test Comput. 28(2): 52-61 (2011) - [j144]Yang Zhao, Krishnendu Chakrabarty
Fault Diagnosis in Lab-on-Chip Using Digital Microfluidic Logic Gates. J. Electron. Test. 27(1): 69-83 (2011) - [j143]Haralampos-G. D. Stratigopoulos, Krishnendu Chakrabarty
Guest Editorial. J. Electron. Test. 27(3): 223 (2011) - [j142]Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman
Test Planning in Digital Microfluidic Biochips Using Efficient Eulerization Techniques. J. Electron. Test. 27(5): 657-671 (2011) - [j141]Brandon Noia, Krishnendu Chakrabarty
Test-wrapper optimisation for embedded cores in through-silicon via-based three-dimensional system on chips. IET Comput. Digit. Tech. 5(3): 186-197 (2011) - [j140]Tong Zhou, Romit Roy Choudhury, Peng Ning, Krishnendu Chakrabarty
P2DAP - Sybil Attacks Detection in Vehicular Ad Hoc Networks. IEEE J. Sel. Areas Commun. 29(3): 582-594 (2011) - [j139]Xrysovalantis Kavousianos, Krishnendu Chakrabarty
Generation of Compact Stuck-At Test Sets Targeting Unmodeled Defects. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(5): 787-791 (2011) - [j138]Yang Zhao, Tao Xu, Krishnendu Chakrabarty
Broadcast Electrode-Addressing and Scheduling Methods for Pin-Constrained Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(7): 986-999 (2011) - [j137]Brandon Noia, Krishnendu Chakrabarty
Test-Architecture Optimization and Test Scheduling for TSV-Based 3-D Stacked ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(11): 1705-1718 (2011) - [j136]Zhen Chen, Krishnendu Chakrabarty
MVP: Minimum-Violations Partitioning for Reducing Capture Power in At-Speed Delay-Fault Testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(11): 1762-1767 (2011) - [j135]Xrysovalantis Kavousianos, Vasileios Tenentes
Defect-Oriented LFSR Reseeding to Target Unmodeled Defects Using Stuck-at Test Sets. IEEE Trans. Very Large Scale Integr. Syst. 19(12): 2330-2335 (2011) - [c207]Brandon Noia, Krishnendu Chakrabarty
Pre-bond testing of die logic and TSVs in high performance 3D-SICs. 3DIC 2011: 1-5 - [c206]Uzair Shah Syed, Krishnendu Chakrabarty
3D-Scalable Adaptive Scan (3D-SAS). 3DIC 2011: 1-6 - [c205]Hongxia Fang, Zhiyuan Wang, Xinli Gu, Krishnendu Chakrabarty
Deterministic test for the reproduction and detection of board-level functional failures. ASP-DAC 2011: 491-496 - [c204]Naghmeh Karimi, Zhiqiu Kong, Krishnendu Chakrabarty
Testing of Clock-Domain Crossing Faults in Multi-core System-on-Chip. Asian Test Symposium 2011: 7-14 - [c203]Xrysovalantis Kavousianos, Krishnendu Chakrabarty
Test Scheduling for Multicore SoCs with Dynamic Voltage Scaling and Multiple Voltage Islands. Asian Test Symposium 2011: 33-39 - [c202]Fang Bao, Ke Peng, Krishnendu Chakrabarty
On Generation of 1-Detect TDF Pattern Set with Significantly Increased SDD Coverage. Asian Test Symposium 2011: 120-125 - [c201]Brandon Noia, Krishnendu Chakrabarty
Identification of Defective TSVs in Pre-Bond Testing of 3D ICs. Asian Test Symposium 2011: 187-194 - [c200]Shida Zhong, S. Saqib Khursheed, Bashir M. Al-Hashimi, Sudhakar M. Reddy, Krishnendu Chakrabarty
Analysis of Resistive Bridge Defect Delay Behavior in the Presence of Process Variation. Asian Test Symposium 2011: 389-394 - [c199]Brandon Noia, Krishnendu Chakrabarty
Testing and Design-for-Testability Techniques for 3D Integrated Circuits. Asian Test Symposium 2011: 474-479 - [c198]Tsung-Yi Ho
Digital microfluidic biochips: recent research and emerging challenges. CODES+ISSS 2011: 335-344 - [c197]Krishnendu Chakrabarty, Paul Pop, Tsung-Yi Ho
Digital microfluidic biochips: functional diversity, more than moore, and cyberphysical systems. CODES+ISSS 2011: 377-378 - [c196]Sudip Roy, Bhargab B. Bhattacharya, Krishnendu Chakrabarty:
Waste-aware dilution and mixing of biochemical samples with digital microfluidic biochips. DATE 2011: 1059-1064 - [c195]Krishnendu Chakrabarty:
Testing and design-for-testability solutions for 3D integrated circuits. DDECS 2011: 5 - [c194]Zhaobo Zhang, Xrysovalantis Kavousianos, Yan Luo, Yiorgos Tsiatouhas
Signature Analysis for Testing, Diagnosis, and Repair of Multi-mode Power Switches. ETS 2011: 13-18 - [c193]Fang Bao, Ke Peng, Mahmut Yilmaz, Krishnendu Chakrabarty
Critical Fault-Based Pattern Generation for Screening SDDs. ETS 2011: 177-182 - [c192]Hongxia Fang, Zhiyuan Wang, Xinli Gu, Krishnendu Chakrabarty
Ranking of Suspect Faulty Blocks Using Dataflow Analysis and Dempster-Shafer Theory for the Diagnosis of Board-Level Functional Failures. ETS 2011: 195-200 - [c191]Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman
On residue removal in digital microfluidic biochips. ACM Great Lakes Symposium on VLSI 2011: 391-394 - [c190]Krishnendu Chakrabarty
The role of EDA in digital print automation and infrastructure optimization. ICCAD 2011: 158-161 - [c189]Tsung-Wei Huang, Tsung-Yi Ho
Reliability-oriented broadcast electrode-addressing for pin-constrained digital microfluidic biochips. ICCAD 2011: 448-455 - [c188]Zhaobo Zhang, Xrysovalantis Kavousianos, Yiorgos Tsiatouhas
A BIST scheme for testing and repair of multi-mode power switches. IOLTS 2011: 115-120 - [c187]Yang Zhao, Krishnendu Chakrabarty
Co-optimization of droplet routing and pin assignment in disposable digital microfluidic biochips. ISPD 2011: 69-76 - [c186]Brandon Noia, Krishnendu Chakrabarty
Pre-bond probing of TSVs in 3D stacked ICs. ITC 2011: 1-10 - [c185]Zhaobo Zhang, Krishnendu Chakrabarty
Smart diagnosis: Efficient board-level diagnosis and repair using artificial neural networks. ITC 2011: 1-9 - [c184]Krishnendu Chakrabarty:
Design and optimization methods for digital microfluidic biochips: A vision for functional diversity and more than moore. SoCC 2011: 5 - [c183]Sudip Roy, Bhargab B. Bhattacharya, Partha Pratim Chakrabarti, Krishnendu Chakrabarty
Layout-Aware Solution Preparation for Biochemical Analysis on a Digital Microfluidic Biochip. VLSI Design 2011: 171-176 - [c182]Zhaobo Zhang, Xrysovalantis Kavousianos, Krishnendu Chakrabarty
A Robust and Reconfigurable Multi-mode Power Gating Architecture. VLSI Design 2011: 280-285 - 2010
- [b5]Krishnendu Chakrabarty, Tao Xu:
Digital Microfluidic Biochips - Design Automation and Optimization. CRC Press 2010, ISBN 978-1-4398-1915-9, pp. I-XIII, 1-199 - [j134]Hongxia Fang, Krishnendu Chakrabarty
RTL DFT Techniques to Enhance Defect Coverage for Functional Test Sequences. J. Electron. Test. 26(2): 151-164 (2010) - [j133]Harshavardhan Sabbineni, Krishnendu Chakrabarty
An Energy-Efficient Data Delivery Scheme for Delay-Sensitive Traffic in Wireless Sensor Networks. Int. J. Distributed Sens. Networks 6(1) (2010) - [j132]Harshavardhan Sabbineni, Krishnendu Chakrabarty
Datacollection in Event-Driven Wireless Sensor Networks with Mobile Sinks. Int. J. Distributed Sens. Networks 6(1) (2010) - [j131]Krishnendu Chakrabarty
Editorial. ACM J. Emerg. Technol. Comput. Syst. 6(1): 1:1-1:2 (2010) - [j130]Yang Zhao, Tao Xu, Krishnendu Chakrabarty
Integrated control-path design and error recovery in the synthesis of digital microfluidic lab-on-chip. ACM J. Emerg. Technol. Comput. Syst. 6(3): 11:1-11:28 (2010) - [j129]Xiaoxia Wu, Yibo Chen, Krishnendu Chakrabarty
Test-access mechanism optimization for core-based three-dimensional SOCs. Microelectron. J. 41(10): 601-615 (2010) - [j128]Yang Zhao, Krishnendu Chakrabarty
Digital Microfluidic Logic Gates and Their Application to Built-in Self-Test of Lab-on-Chip. IEEE Trans. Biomed. Circuits Syst. 4(4): 250-262 (2010) - [j127]Tao Xu, Krishnendu Chakrabarty
Defect-Tolerant Design and Optimization of a Digital Microfluidic Biochip for Protein Crystallization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(4): 552-565 (2010) - [j126]Mahmut Yilmaz, Krishnendu Chakrabarty
Test-Pattern Selection for Screening Small-Delay Defects in Very-Deep Submicrometer Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(5): 760-773 (2010) - [j125]Krishnendu Chakrabarty
Design Tools for Digital Microfluidic Biochips: Toward Functional Diversification and More Than Moore. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(7): 1001-1017 (2010) - [j124]S. Saqib Khursheed, Bashir M. Al-Hashimi, Krishnendu Chakrabarty
Gate-Sizing-Based Single Vdd Test for Bridge Defects in Multivoltage Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(9): 1409-1421 (2010) - [j123]Sudip Roy, Bhargab B. Bhattacharya, Krishnendu Chakrabarty
Optimization of Dilution and Mixing of Biochemical Samples Using Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(11): 1696-1708 (2010) - [j122]Krishnendu Chakrabarty:
Design Automation and Test Solutions for Digital Microfluidic Biochips. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(1): 4-17 (2010) - [c181]Yang Zhao, Krishnendu Chakrabarty
Testing of Low-Cost Digital Microfluidic Biochips with Non-regular Array Layouts. Asian Test Symposium 2010: 27-32 - [c180]Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman
Testing of Digital Microfluidic Biochips Using Improved Eulerization Techniques and the Chinese Postman Problem. Asian Test Symposium 2010: 111-116 - [c179]Xrysovalantis Kavousianos, Krishnendu Chakrabarty
Defect Coverage-Driven Window-Based Test Compression. Asian Test Symposium 2010: 141-146 - [c178]Sandeep Kumar Goel, Krishnendu Chakrabarty
Circuit Topology-Based Test Pattern Generation for Small-Delay Defects. Asian Test Symposium 2010: 307-312 - [c177]Ke Peng, Mahmut Yilmaz, Krishnendu Chakrabarty
A Noise-Aware Hybrid Method for SDD Pattern Grading and Selection. Asian Test Symposium 2010: 331-336 - [c176]Hongxia Fang, Zhiyuan Wang, Xinli Gu, Krishnendu Chakrabarty
Mimicking of Functional State Space with Structural Tests for the Diagnosis of Board-Level Functional Failures. Asian Test Symposium 2010: 421-428 - [c175]Zhaobo Zhang, Zhanglei Wang, Xinli Gu, Krishnendu Chakrabarty
Optimization and Selection of Diagnosis-Oriented Fault-Insertion Points for System Test. Asian Test Symposium 2010: 429-432 - [c174]Yang Zhao, Krishnendu Chakrabarty
Synchronization of washing operations with droplet routing for cross-contamination avoidance in digital microfluidic biochips. DAC 2010: 635-640 - [c173]S. Balatsouka, Vasileios Tenentes
Defect aware X-filling for low-power scan testing. DATE 2010: 873-878 - [c172]Ke Peng, Mahmut Yilmaz, Mohammad Tehranipoor, Krishnendu Chakrabarty:
High-quality pattern selection for screening small-delay defects considering process variations and crosstalk. DATE 2010: 1426-1431 - [c171]Rishad A. Shafik, Bashir M. Al-Hashimi, Krishnendu Chakrabarty
Soft error-aware design optimization of low power and time-constrained embedded systems. DATE 2010: 1462-1467 - [c170]Brandon Noia, Sandeep Kumar Goel, Krishnendu Chakrabarty
Test-architecture optimization for TSV-based 3D stacked ICs. ETS 2010: 24-29 - [c169]Zhen Chen, Krishnendu Chakrabarty
MVP: Capture-power reduction with minimum-violations partitioning for delay testing. ICCAD 2010: 149-154 - [c168]Yibo Chen, Dimin Niu, Yuan Xie, Krishnendu Chakrabarty
Cost-effective integration of three-dimensional (3D) ICs emphasizing testing cost analysis. ICCAD 2010: 471-476 - [c167]Tsung-Yi Ho
Digital microfluidic biochips: A vision for functional diversity and more than moore. ICCAD 2010: 578-585 - [c166]Krishnendu Chakrabarty
Digital Microfluidic Biochips: A Vision for Functional Diversity and More Than Moore. ISVLSI 2010: 3-4 - [c165]Krishnendu Chakrabarty
Digital Microfluidic Biochips: A Vision for Functional Diversity and More than Moore. ISVLSI (Selected papers) 2010: 263-285 - [c164]Brandon Noia, Krishnendu Chakrabarty
Optimization methods for post-bond die-internal/external testing in 3D stacked ICs. ITC 2010: 193-201 - [c163]Zhaobo Zhang, Zhanglei Wang, Xinli Gu, Krishnendu Chakrabarty
Board-level fault diagnosis using an error-flow dictionary. ITC 2010: 485-494 - [c162]Alodeep Sanyal, Krishnendu Chakrabarty
RT-level design-for-testability and expansion of functional test sequences for enhanced defect coverage. ITC 2010: 625-634 - [c161]Yang Zhao, Ryan Sturmer, Krishnendu Chakrabarty
Synchronization of Concurrently-Implemented Fluidic Operations in Pin-Constrained Digital Microfluidic Biochips. VLSI Design 2010: 69-74 - [c160]Krishnendu Chakrabarty
Digital Microfluidic Biochips: A Vision for Functional Diversity and More than Moore. VLSI Design 2010: 452-457 - [c159]Ke Peng, Jason Thibodeau, Mahmut Yilmaz, Krishnendu Chakrabarty
A novel hybrid method for SDD pattern grading and selection. VTS 2010: 45-50 - [c158]Yang Zhao, Krishnendu Chakrabarty
Pin-count-aware online testing of digital microfluidic biochips. VTS 2010: 111-116 - [c157]Zhaobo Zhang, Zhanglei Wang, Xinli Gu, Krishnendu Chakrabarty
Board-level fault diagnosis using Bayesian inference. VTS 2010: 244-249
2000 – 2009
- 2009
- [j121]Hsien-Hsin S. Lee, Krishnendu Chakrabarty
Test Challenges for 3D Integrated Circuits. IEEE Des. Test Comput. 26(5): 26-35 (2009) - [j120]Bipul C. Paul, Krishnendu Chakrabarty:
Advances in nanoelectronics circuits and systems [Editorial]. IET Comput. Digit. Tech. 3(6): 551-552 (2009) - [j119]Vincent Mao, V. Thusu, Chris Dwyer, Krishnendu Chakrabarty
Connecting fabrication defects to fault models and SPICE simulations for DNA self-assembled nanoelectronics. IET Comput. Digit. Tech. 3(6): 553-569 (2009) - [j118]Yang Zhao, Krishnendu Chakrabarty
On-Line Testing of Lab-on-Chip Using Reconfigurable Digital-Microfluidic Compactors. Int. J. Parallel Program. 37(4): 370-388 (2009) - [j117]Xiaoxia Wu, Paul Falkenstern, Krishnendu Chakrabarty
Scan-chain design and optimization for three-dimensional integrated circuits. ACM J. Emerg. Technol. Comput. Syst. 5(2): 9:1-9:26 (2009) - [j116]Bozena Kaminska, Krishnendu Chakrabarty
Guest Editorial - Selected Papers from the IEEE International Mixed-Signals, Sensors, and Systems Test Workshop (IMS3TW), 2008. IEEE Trans. Biomed. Circuits Syst. 3(4): 193-194 (2009) - [j115]Tao Xu, Krishnendu Chakrabarty
Fault Modeling and Functional Test Methods for Digital Microfluidic Biochips. IEEE Trans. Biomed. Circuits Syst. 3(4): 241-253 (2009) - [j114]Sandeep Kumar Goel, Erik Jan Marinissen
Testing of SoCs with Hierarchical Cores: Common Fallacies, Test Access Optimization, and Test Scheduling. IEEE Trans. Computers 58(3): 409-423 (2009) - [j113]Sudarshan Bahukudumbi, Krishnendu Chakrabarty
Test-Length and TAM Optimization for Wafer-Level Reduced Pin-Count Testing of Core-Based SoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(1): 111-120 (2009) - [j112]Zhanglei Wang, Hongxia Fang, Krishnendu Chakrabarty
Deviation-Based LFSR Reseeding for Test-Data Compression. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(2): 259-271 (2009) - [j111]Zhanglei Wang, Krishnendu Chakrabarty
Integrated LFSR Reseeding, Test-Access Optimization, and Test Scheduling for Core-Based System-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(8): 1251-1264 (2009) - [j110]Qiang Xu
SOC test-architecture optimization for the testing of embedded cores and signal-integrity faults on core-external interconnects. ACM Trans. Design Autom. Electr. Syst. 14(1): 4:1-4:27 (2009) - [j109]Sudarshan Bahukudumbi, Sule Ozev, Krishnendu Chakrabarty
Wafer-Level Defect Screening for "Big-D/Small-A" Mixed-Signal SoCs. IEEE Trans. Very Large Scale Integr. Syst. 17(4): 587-592 (2009) - [j108]Sudarshan Bahukudumbi, Krishnendu Chakrabarty
Power Management Using Test-Pattern Ordering for Wafer-Level Test During Burn-In. IEEE Trans. Very Large Scale Integr. Syst. 17(12): 1730-1741 (2009) - [c156]Thomas Edison Yu, Tomokazu Yoneda, Krishnendu Chakrabarty
Test infrastructure design for core-based system-on-chip under cycle-accurate thermal constraints. ASP-DAC 2009: 793-798 - [c155]Hongxia Fang, Krishnendu Chakrabarty
Bit-Operation-Based Seed Augmentation for LFSR Reseeding with High Defect Coverage. Asian Test Symposium 2009: 331-336 - [c154]Dong Xiang, Boxue Yin, Krishnendu Chakrabarty
Compact Test Generation for Small-Delay Defects Using Testable-Path Information. Asian Test Symposium 2009: 424-429 - [c153]Tong Zhou, Romit Roy Choudhury, Krishnendu Chakrabarty
Diverse Routing: Exploiting Social Behavior for Routing in Delay-Tolerant Networks. CSE (4) 2009: 1115-1122 - [c152]Xrysovalantis Kavousianos, Krishnendu Chakrabarty
Generation of compact test sets with high defect coverage. DATE 2009: 1130-1135 - [c151]Yang Zhao, Krishnendu Chakrabarty:
Cross-contamination avoidance for droplet routing in digital microfluidic biochips. DATE 2009: 1290-1295 - [c150]Mahmut Yilmaz, Krishnendu Chakrabarty
Seed selection in LFSR-reseeding-based test compression for the detection of small-delay defects. DATE 2009: 1488-1493 - [c149]Lara D. Oliver, Krishnendu Chakrabarty
Dual-threshold pass-transistor logic design. ACM Great Lakes Symposium on VLSI 2009: 291-296 - [c148]Hongxia Fang, Krishnendu Chakrabarty
RTL DFT techniques to enhance defect coverage for functional test sequences. HLDVT 2009: 160-165 - [c147]Li Jiang, Qiang Xu
Layout-driven test-architecture design and optimization for 3D SoCs under pre-bond test-pin-count constraint. ICCAD 2009: 191-196 - [c146]Brandon Noia, Krishnendu Chakrabarty
Test-wrapper optimization for embedded cores in TSV-based three-dimensional SOCs. ICCD 2009: 70-77 - [c145]Krishnendu Chakrabarty:
Testing bio-chips. ICCD 2009: 327 - [c144]Zhaobo Zhang, Zhanglei Wang, Xinli Gu, Krishnendu Chakrabarty
Physical defect modeling for fault insertion in system reliability test. ITC 2009: 1-10 - [c143]Hongxia Fang, Krishnendu Chakrabarty
RT-Level Deviation-Based Grading of Functional Test Sequences. VTS 2009: 264-269 - [c142]Tao Xu, Krishnendu Chakrabarty
Design-for-Testability for Digital Microfluidic Biochips. VTS 2009: 309-314 - 2008
- [j107]Philip Y. Paik, Vamsee K. Pamula, Krishnendu Chakrabarty
A Digital-Microfluidic Approach to Chip Cooling. IEEE Des. Test Comput. 25(4): 372-381 (2008) - [j106]Nabil Badereddine, Zhanglei Wang, Patrick Girard, Krishnendu Chakrabarty
A Selective Scan Slice Encoding Technique for Test Data Volume and Test Power Reduction. J. Electron. Test. 24(4): 353-364 (2008) - [j105]Thomas Edison Yu, Tomokazu Yoneda, Krishnendu Chakrabarty
Thermal-Aware Test Access Mechanism and Wrapper Design Optimization for System-on-Chips. IEICE Trans. Inf. Syst. 91-D(10): 2440-2448 (2008) - [j104]Fei Su, Krishnendu Chakrabarty
High-level synthesis of digital microfluidic biochips. ACM J. Emerg. Technol. Comput. Syst. 3(4): 1:1-1:32 (2008) - [j103]R. Iris Bahar
Introduction to joint ACM JETC/TODAES special issue on new, emerging, and specialized technologies. ACM J. Emerg. Technol. Comput. Syst. 4(2): 5:1-5:2 (2008) - [j102]Alvin R. Lebeck, Krishnendu Chakrabarty
Introduction to DAC 2007 special section. ACM J. Emerg. Technol. Comput. Syst. 4(3): 10:1-10:2 (2008) - [j101]Tao Xu, Krishnendu Chakrabarty
Integrated droplet routing and defect tolerance in the synthesis of digital microfluidic biochips. ACM J. Emerg. Technol. Comput. Syst. 4(3): 11:1-11:24 (2008) - [j100]Tao Xu, Krishnendu Chakrabarty
Defect-Aware High-Level Synthesis and Module Placement for Microfluidic Biochips. IEEE Trans. Biomed. Circuits Syst. 2(1): 50-62 (2008) - [j99]Zhanglei Wang, Krishnendu Chakrabarty
Test-Quality/Cost Optimization Using Output-Deviation-Based Reordering of Test Patterns. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(2): 352-365 (2008) - [j98]Soheil Samii, Mikko Selkälä, Erik Larsson
Cycle-Accurate Test Power Modeling and Its Application to SoC Test Architecture Design and Scheduling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(5): 973-977 (2008) - [j97]Dong Xiang, Yang Zhao, Krishnendu Chakrabarty
A Reconfigurable Scan Architecture With Weighted Scan-Enable Signals for Deterministic BIST. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(6): 999-1012 (2008) - [j96]Tao Xu, Krishnendu Chakrabarty
A Droplet-Manipulation Method for Achieving High-Throughput in Cross-Referencing-Based Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(11): 1905-1917 (2008) - [j95]R. Iris Bahar, Krishnendu Chakrabarty
Introduction to joint ACM JETC/TODAES special issue on new, emerging, and specialized technologies. ACM Trans. Design Autom. Electr. Syst. 13(2): 36:1-36:2 (2008) - [j94]Anuja Sehgal, Sudarshan Bahukudumbi, Krishnendu Chakrabarty
Power-aware SoC test planning for effective utilization of port-scalable testers. ACM Trans. Design Autom. Electr. Syst. 13(3): 53:1-53:19 (2008) - [j93]Philip Y. Paik, Vamsee K. Pamula, Krishnendu Chakrabarty
Adaptive Cooling of Integrated Circuits Using Digital Microfluidics. IEEE Trans. Very Large Scale Integr. Syst. 16(4): 432-443 (2008) - [j92]Zhanglei Wang, Krishnendu Chakrabarty
Test Data Compression Using Selective Encoding of Scan Slices. IEEE Trans. Very Large Scale Integr. Syst. 16(11): 1429-1440 (2008) - [c141]Sudarshan Bahukudumbi, Krishnendu Chakrabarty
Power Management for Wafer-Level Test During Burn-In. ATS 2008: 231-236 - [c140]Anders Larsson, Xin Zhang, Erik Larsson
Core-Level Compression Technique Selection and SOC Test Architecture Design. ATS 2008: 277-282 - [c139]Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman
Accelerated Functional Testing of Digital Microfluidic Biochips. ATS 2008: 295-300 - [c138]Tao Xu, Krishnendu Chakrabarty:
Broadcast electrode-addressing for pin-constrained multi-functional digital microfluidic biochips. DAC 2008: 173-178 - [c137]Anders Larsson, Erik Larsson
Test-Architecture Optimization and Test Scheduling for SOCs with Core-Level Expansion of Compressed Test Patterns. DATE 2008: 188-193 - [c136]Sudarshan Bahukudumbi, Krishnendu Chakrabarty
Test Scheduling for Wafer-Level Test-During-Burn-In of Core-Based SoCs. DATE 2008: 1103-1106 - [c135]Tao Xu, Krishnendu Chakrabarty
Design and optimization of a digital microfluidic biochip for protein crystallization. ICCAD 2008: 297-301 - [c134]Xiaoxia Wu, Yibo Chen, Krishnendu Chakrabarty
Test-access mechanism optimization for core-based three-dimensional SOCs. ICCD 2008: 212-218 - [c133]Yang Zhao, Krishnendu Chakrabarty
On-Line Testing of Lab-on-Chip Using Digital Microfluidic Compactors. IOLTS 2008: 213-218 - [c132]Tao Xu, Krishnendu Chakrabarty
Automated design of digital microfluidic lab-on-chip under pin-count constraints. ISPD 2008: 190-198 - [c131]Anders Larsson, Xin Zhang, Erik Larsson
SOC Test Optimization with Compression-Technique Selection. ITC 2008: 1 - [c130]Vincent Mao, Chris Dwyer, Krishnendu Chakrabarty
Fabrication Defects and Fault Models for DNA Self-Assembled Nanoelectronics. ITC 2008: 1-10 - [c129]Xiaoxia Wu, Yibo Chen, Krishnendu Chakrabarty
Test-Access Solutions for Three-Dimensional SOCs. ITC 2008: 1 - [c128]Mahmut Yilmaz, Krishnendu Chakrabarty
Interconnect-Aware and Layout-Oriented Test-Pattern Selection for Small-Delay Defects. ITC 2008: 1-10 - [c127]Yang Zhao, Tao Xu, Krishnendu Chakrabarty
Built-in Self-Test and Fault Diagnosis for Lab-on-Chip Using Digital Microfluidic Logic Gates. ITC 2008: 1-10 - [c126]Yang Zhao, Tao Xu, Krishnendu Chakrabarty
Digital Microfluidic Logic Gates. NanoNet 2008: 54-60 - [c125]Sudarshan Bahukudumbi, Krishnendu Chakrabarty
Test-Pattern Ordering for Wafer-Level Test-During-Burn-In. VTS 2008: 193-198 - [c124]Mahmut Yilmaz, Krishnendu Chakrabarty
Test-Pattern Grading and Pattern Selection for Small-Delay Defects. VTS 2008: 233-239 - 2007
- [b4]Krishnendu Chakrabarty, Fei Su:
Digital Microfluidic Biochips - Synthesis, Testing, and Reconfiguration Techniques. CRC Press 2007, ISBN 978-0-8493-9009-8, pp. 1-228 - [j91]Krishnendu Chakrabarty
Guest Editors' Introduction: Biochips and Integrated Biosensor Platforms. IEEE Des. Test Comput. 24(1): 8-9 (2007) - [j90]Zhanglei Wang, Krishnendu Chakrabarty
Built-in Self-test and Defect Tolerance in Molecular Electronics-based Nanofabrics. J. Electron. Test. 23(2-3): 145-161 (2007) - [j89]Fei Su, William L. Hwang, Arindam Mukherjee, Krishnendu Chakrabarty
Testing and Diagnosis of Realistic Defects in Digital Microfluidic Biochips. J. Electron. Test. 23(2-3): 219-233 (2007) - [j88]Yi Zou, Krishnendu Chakrabarty
Redundancy Analysis and a Distributed Self-Organization Protocol for Fault-Tolerant Wireless Sensor Networks. Int. J. Distributed Sens. Networks 3(3): 243-272 (2007) - [j87]Krishnendu Chakrabarty
Editorial to special issue DAC 2006. ACM J. Emerg. Technol. Comput. Syst. 3(3): 11 (2007) - [j86]Tao Xu, William L. Hwang, Fei Su, Krishnendu Chakrabarty
Automated design of pin-constrained digital microfluidic biochips under droplet-interference constraints. ACM J. Emerg. Technol. Comput. Syst. 3(3): 14 (2007) - [j85]Tao Xu, Krishnendu Chakrabarty
Parallel Scan-Like Test and Multiple-Defect Diagnosis for Digital Microfluidic Biochips. IEEE Trans. Biomed. Circuits Syst. 1(2): 148-158 (2007) - [j84]Anuja Sehgal, Krishnendu Chakrabarty:
Optimization of Dual-Speed TAM Architectures for Efficient Modular Testing of SOCs. IEEE Trans. Computers 56(1): 120-133 (2007) - [j83]Qiang Xu
Test Wrapper Design and Optimization Under Power Constraints for Embedded Cores With Multiple Clock Domains. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(8): 1539-1547 (2007) - [j82]Yi Zou, Krishnendu Chakrabarty
Distributed Mobility Management for Target Tracking in Mobile Sensor Networks. IEEE Trans. Mob. Comput. 6(8): 872-887 (2007) - [j81]Lei Li, Zhanglei Wang, Krishnendu Chakrabarty
Scan-BIST based on cluster analysis and the encoding of repeating sequences. ACM Trans. Design Autom. Electr. Syst. 12(1): 4:1-4:21 (2007) - [j80]Sudarshan Bahukudumbi, Krishnendu Chakrabarty
Wafer-Level Modular Testing of Core-Based SoCs. IEEE Trans. Very Large Scale Integr. Syst. 15(10): 1144-1154 (2007) - [c123]Sudarshan Bahukudumbi, Sule Ozev, Krishnendu Chakrabarty
AWafer-Level Defect Screening Technique to Reduce Test and Packaging Costs for "Big-D/Small-A" Mixed-Signal SoCs. ASP-DAC 2007: 823-828 - [c122]Thomas Edison Yu, Tomokazu Yoneda, Krishnendu Chakrabarty, Hideo Fujiwara:
Thermal-Safe Test Access Mechanism and Wrapper Co-optimization for System-on-Chip. ATS 2007: 187-192 - [c121]Dong Xiang, Krishnendu Chakrabarty, Dianwei Hu, Hideo Fujiwara:
Scan Testing for Complete Coverage of Path Delay Faults with Reduced Test Data Volume, Test Application Time, and Hardware Cost. ATS 2007: 329-334 - [c120]Qiang Xu, Yubin Zhang, Krishnendu Chakrabarty:
SOC Test Architecture Optimization for Signal Integrity Faults on Core-External Interconnects. DAC 2007: 676-681 - [c119]Tao Xu, Krishnendu Chakrabarty:
Integrated Droplet Routing in the Synthesis of Microfluidic Biochips. DAC 2007: 948-953 - [c118]Zhanglei Wang, Krishnendu Chakrabarty
SoC testing using LFSR reseeding, and scan-slice-based TAM optimization and test scheduling. DATE 2007: 201-206 - [c117]Tao Xu, Krishnendu Chakrabarty
A cross-referencing-based droplet manipulation method for high-throughput and pin-constrained digital microfluidic arrays. DATE 2007: 552-557 - [c116]Ian O'Connor
Heterogeneous systems on chip and systems in package. DATE 2007: 737-742 - [c115]Krishnendu Chakrabarty
Design and Test of Microfluidic Biochips. DDECS 2007: 17 - [c114]Tao Xu, Krishnendu Chakrabarty
Parallel Scan-Like Testing and Fault Diagnosis Techniques for Digital Microfluidic Biochips. ETS 2007: 63-68 - [c113]Zhanglei Wang, Krishnendu Chakrabarty
A Seed-Selection Method to Increase Defect Coverage for LFSR-Reseeding-Based Test Compression. ETS 2007: 125-130 - [c112]Tao Xu, Krishnendu Chakrabarty
Functional testing of digital microfluidic biochips. ITC 2007: 1-10 - [c111]Qiang Xu
Test-wrapper designs for the detection of signal-integrity faults on core-external interconnects of SoCs. ITC 2007: 1-9 - [c110]Tong Zhou, Romit Roy Choudhury, Peng Ning, Krishnendu Chakrabarty
Privacy-Preserving Detection of Sybil Attacks in Vehicular Ad Hoc Networks. MobiQuitous 2007: 1-8 - [c109]Amit Kumar, Krishnendu Chakrabarty
An ECO Technique for Removing Crosstalk Violations in Clock Networks. VLSI Design 2007: 283-288 - [c108]Sudarshan Bahukudumbi, Krishnendu Chakrabarty
Test-Length Selection and TAM Optimization for Wafer-Level, Reduced Pin-Count Testing of Core-Based Digital SoCs. VLSI Design 2007: 459-464 - [c107]Tao Xu, Krishnendu Chakrabarty
Defect-Aware Synthesis of Droplet-Based Microfluidic Biochips. VLSI Design 2007: 647-652 - [i4]Fei Su, Krishnendu Chakrabarty, Vamsee K. Pamula:
Yield Enhancement of Digital Microfluidics-Based Biochips Using Space Redundancy and Local Reconfiguration. CoRR abs/0710.4672 (2007) - [i3]Fei Su, Krishnendu Chakrabarty:
Design of Fault-Tolerant and Dynamically-Reconfigurable Microfluidic Biochips. CoRR abs/0710.4673 (2007) - [i2]Anuja Sehgal, Fang Liu, Sule Ozev, Krishnendu Chakrabarty:
Test Planning for Mixed-Signal SOCs with Wrapped Analog Cores. CoRR abs/0710.4686 (2007) - [i1]Paul M. Rosinger, Bashir M. Al-Hashimi, Krishnendu Chakrabarty:
Rapid Generation of Thermal-Safe Test Schedules. CoRR abs/0710.4797 (2007) - 2006
- [j79]Fei Su, Sule Ozev, Krishnendu Chakrabarty
Test Planning and Test Resource Optimization for Droplet-Based Microfluidic Systems. J. Electron. Test. 22(2): 199-210 (2006) - [j78]Fei Su, Krishnendu Chakrabarty
Yield enhancement of reconfigurable microfluidics-based biochips using interstitial redundancy. ACM J. Emerg. Technol. Comput. Syst. 2(2): 104-128 (2006) - [j77]Ying Zhang, Krishnendu Chakrabarty
A unified approach for fault tolerance and dynamic power management in fixed-priority real-time embedded systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(1): 111-125 (2006) - [j76]Fei Su, Krishnendu Chakrabarty
Microfluidics-Based Biochips: Technology Issues, Implementation Platforms, and Design-Automation Challenges. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(2): 211-223 (2006) - [j75]Paul M. Rosinger, Bashir M. Al-Hashimi, Krishnendu Chakrabarty
Thermal-Safe Test Scheduling for Core-Based System-on-Chip Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(11): 2502-2512 (2006) - [j74]Fei Su, Krishnendu Chakrabarty
Defect Tolerance Based on Graceful Degradation and Dynamic Reconfiguration for Digital Microfluidics-Based Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(12): 2944-2953 (2006) - [j73]Fei Su, Sule Ozev, Krishnendu Chakrabarty
Concurrent testing of digital microfluidics-based biochips. ACM Trans. Design Autom. Electr. Syst. 11(2): 442-464 (2006) - [j72]Fei Su, Krishnendu Chakrabarty
Module placement for fault-tolerant microfluidics-based biochips. ACM Trans. Design Autom. Electr. Syst. 11(3): 682-710 (2006) - [j71]Anuja Sehgal, Sule Ozev, Krishnendu Chakrabarty:
Test infrastructure design for mixed-signal SOCs with wrapped analog cores. IEEE Trans. Very Large Scale Integr. Syst. 14(3): 292-304 (2006) - [c106]Nabil Badereddine, Zhanglei Wang, Patrick Girard, Krishnendu Chakrabarty
Power-Aware Test Data Compression for Embedded IP Cores. ATS 2006: 5-10 - [c105]Hideo Fujiwara, Jiaguang Sun, Krishnendu Chakrabarty
Compressing Test Data for Deterministic BIST Using a Reconfigurable Scan Arhcitecture. ATS 2006: 299-306 - [c104]Zhanglei Wang, Krishnendu Chakrabarty
An Efficient Test Pattern Selection Method for Improving Defect Coverage with Reduced Test Data Volume and Test Application Time. ATS 2006: 333-338 - [c103]Tao Xu, Krishnendu Chakrabarty
Droplet-trace-based array partitioning and a pin assignment algorithm for the automated design of digital microfluidic biochips. CODES+ISSS 2006: 112-117 - [c102]William L. Hwang, Fei Su, Krishnendu Chakrabarty
Automated design of pin-constrained digital microfluidic arrays for lab-on-a-chip applications*. DAC 2006: 925-930 - [c101]Anuja Sehgal, Sandeep Kumar Goel, Erik Jan Marinissen, Krishnendu Chakrabarty
Hierarchy-aware and area-efficient test infrastructure design for core-based system chips. DATE 2006: 285-290 - [c100]Fei Su, William L. Hwang, Krishnendu Chakrabarty:
Droplet routing in the synthesis of digital microfluidic biochips. DATE 2006: 323-328 - [c99]Zhanglei Wang, Krishnendu Chakrabarty, Michael Gössel:
Test set enrichment using a probabilistic fault model and the theory of output deviations. DATE 2006: 1270-1275 - [c98]Krishnendu Chakrabarty:
Reconfiguration-Based Defect Tolerance for Microfluidic Biochips. DFT 2006 - [c97]Lara D. Oliver, Krishnendu Chakrabarty
An evaluation of the impact of gate oxide tunneling on dual-Vt-based leakage reduction techniques. ACM Great Lakes Symposium on VLSI 2006: 105-110 - [c96]Krishnendu Chakrabarty
Automated Design of Microfluidics-Based Biochips: Connecting Biochemistry to Electronics CAD. ICCD 2006: 93-100 - [c95]Sudarshan Bahukudumbi, Krishnendu Chakrabarty
Defect-Oriented and Time-Constrained Wafer-Level Test-Length Selection for Core-Based Digital SoCs. ITC 2006: 1-10 - [c94]Soheil Samii, Erik Larsson
Cycle-Accurate Test Power Modeling and its Application to SoC Test Scheduling. ITC 2006: 1-10 - [c93]Tong Zhou, Krishnendu Chakrabarty:
Authentication of sensor network flooding based on neighborhood cooperation. WCNC 2006: 665-670 - 2005
- [b3]Krishnendu Chakrabarty
Scalable infrastructure for distributed sensor networks. Springer 2005, ISBN 978-1-85233-951-7, pp. I-XIV, 1-194 - [j70]Krishnendu Chakrabarty
Design automation for microfluidics-based biochips. ACM J. Emerg. Technol. Comput. Syst. 1(3): 186-223 (2005) - [j69]Harshavardhan Sabbineni, Krishnendu Chakrabarty
Location-Aided Flooding: An Energy-Efficient Data Dissemination Protocol for Wireless Sensor Networks. IEEE Trans. Computers 54(1): 36-46 (2005) - [j68]Yi Zou, Krishnendu Chakrabarty
A Distributed Coverage- and Connectivity-Centric Technique for Selecting Active Nodes in Wireless Sensor Networks. IEEE Trans. Computers 54(8): 978-991 (2005) - [j67]Krishnendu Chakrabarty
Test planning for modular testing of hierarchical SOCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(3): 435-448 (2005) - [j66]Vishnu Swaminathan, Krishnendu Chakrabarty
Pruning-based, energy-optimal, deterministic I/O device scheduling for hard real-time systems. ACM Trans. Embed. Comput. Syst. 4(1): 141-167 (2005) - [j65]Hosam M. F. AboElFotoh
Computing reliability and message delay for Cooperative wireless distributed sensor networks subject to random failures. IEEE Trans. Reliab. 54(1): 145-155 (2005) - [j64]Mohammad Tehranipoor, Mehrdad Nourani, Krishnendu Chakrabarty
Nine-coded compression technique for testing embedded cores in SoCs. IEEE Trans. Very Large Scale Integr. Syst. 13(6): 719-731 (2005) - [j63]Chunsheng Liu, Krishnendu Chakrabarty
Design and analysis of compact dictionaries for diagnosis in scan-BIST. IEEE Trans. Very Large Scale Integr. Syst. 13(8): 979-984 (2005) - [c92]Yasumi Doi, Seiji Kajihara, Xiaoqing Wen, Lei Li, Krishnendu Chakrabarty
Test compression for scan circuits using scan polarity adjustment and pinpoint test relaxation. ASP-DAC 2005: 59-64 - [c91]Krishnendu Chakrabarty
System-level design automation tools for digital microfluidic biochips. CODES+ISSS 2005: 201-206 - [c90]Qiang Xu, Nicola Nicolici, Krishnendu Chakrabarty:
Multi-frequency wrapper design and optimization for embedded cores under average power constraints. DAC 2005: 123-128 - [c89]Fei Su, Krishnendu Chakrabarty
Unified high-level synthesis and module placement for defect-tolerant microfluidic biochips. DAC 2005: 825-830 - [c88]Anuja Sehgal, Fang Liu, Sule Ozev, Krishnendu Chakrabarty
Test Planning for Mixed-Signal SOCs with Wrapped Analog Cores. DATE 2005: 50-55 - [c87]Paul M. Rosinger, Bashir M. Al-Hashimi, Krishnendu Chakrabarty
Rapid Generation of Thermal-Safe Test Schedules. DATE 2005: 840-845 - [c86]Lei Li, Krishnendu Chakrabarty
Hybrid BIST Based on Repeating Sequences and Cluster Analysis. DATE 2005: 1142-1147 - [c85]Fei Su, Krishnendu Chakrabarty
Yield Enhancement of Digital Microfluidics-Based Biochips Using Space Redundancy and Local Reconfiguration. DATE 2005: 1196-1201 - [c84]Fei Su, Krishnendu Chakrabarty
Design of Fault-Tolerant and Dynamically-Reconfigurable Microfluidic Biochips. DATE 2005: 1202-1207 - [c83]Yi Zou, Krishnendu Chakrabarty
Fault-Tolerant Self-organization in Sensor Networks. DCOSS 2005: 191-205 - [c82]Enkelejda Tafaj, Paul M. Rosinger, Bashir M. Al-Hashimi, Krishnendu Chakrabarty:
Improving Thermal-Safe Test Scheduling for Core-Based Systems-on-Chip Using Shift Frequency Scaling. DFT 2005: 544-551 - [c81]Zhanglei Wang, Krishnendu Chakrabarty
Built-in self-test of molecular electronics-based nanofabrics. ETS 2005: 168-173 - [c80]Anuja Sehgal, Krishnendu Chakrabarty
Test planning for the effective utilization of port-scalable testers for heterogeneous core-based SOCs. ICCAD 2005: 88-93 - [c79]Krishnendu Chakrabarty, J. E. Chen:
A cocktail approach on random access scan toward low power and high efficiency test. ICCAD 2005: 94-99 - [c78]Anuja Sehgal, Sule Ozev, Krishnendu Chakrabarty
A Flexible Design Methodology for Analog Test Wrappers in Mixed-Signal SOCs. ICCD 2005: 137-142 - [c77]Fei Su, William L. Hwang, Arindam Mukherjee, Krishnendu Chakrabarty
Defect-oriented testing and diagnosis of digital microfluidics-based biochips. ITC 2005: 10 - [c76]Zhanglei Wang, Krishnendu Chakrabarty
Using built-in self-test and adaptive recovery for defect tolerance in molecular electronics-based nanofabrics. ITC 2005: 10 - [c75]Zhanglei Wang, Krishnendu Chakrabarty
Test data compression for IP embedded cores using selective encoding of scan slices. ITC 2005: 10 - [c74]Lei Li, Krishnendu Chakrabarty, Seiji Kajihara, Shivakumar Swaminathan:
Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores. VLSI Design 2005: 53-58 - [c73]Krishnendu Chakrabarty:
Design, Testing, and Applications of Digital Microfluidics-Based Biochips. VLSI Design 2005: 221-226 - [c72]Fei Su, Krishnendu Chakrabarty
Defect Tolerance for Gracefully-Degradable Microfluidics-Based Biochips. VTS 2005: 321-326 - [p3]Yi Zou, Krishnendu Chakrabarty:
Advances in Target Tracking and Active Surveillance Using Wireless Sensor Networks. Handbook on Theoretical and Algorithmic Aspects of Sensor, Ad Hoc Wireless, and Peer-to-Peer Networks 2005: 475-490 - [r1]Krishnendu Chakrabarty:
Modular Testing and Built-In Self-Test of Embedded Cores in System-on-Chip Integrated Circuits. Embedded Systems Handbook 2005 - 2004
- [j62]Anshuman Chandra, Krishnendu Chakrabarty
Analysis of Test Application Time for Test Data Compression Methods Based on Compression Codes. J. Electron. Test. 20(2): 199-212 (2004) - [j61]Michael Gössel, Krishnendu Chakrabarty
A Signature Analysis Technique for the Identification of Failing Vectors with Application to Scan-BIST. J. Electron. Test. 20(6): 611-622 (2004) - [j60]Lei Li, Krishnendu Chakrabarty
On Using Exponential-Golomb Codes and Subexponential Codes for System-on-a-Chip Test Data Compression. J. Electron. Test. 20(6): 667-670 (2004) - [j59]Yi Zou, Krishnendu Chakrabarty
Uncertainty-aware and coverage-oriented deployment for sensor networks. J. Parallel Distributed Comput. 64(7): 788-798 (2004) - [j58]Chunsheng Liu, Krishnendu Chakrabarty
Compact Dictionaries for Fault Diagnosis in Scan-BIST. IEEE Trans. Computers 53(6): 775-780 (2004) - [j57]Tianhao Zhang, Krishnendu Chakrabarty
Behavioral modeling and performance evaluation of microelectrofluidics-based PCR systems using SystemC. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(6): 843-858 (2004) - [j56]Lei Li, Krishnendu Chakrabarty
Test set embedding for deterministic BIST using a reconfigurable interconnection network. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(9): 1289-1305 (2004) - [j55]Vishnu Swaminathan, Krishnendu Chakrabarty
Network flow techniques for dynamic voltage scaling in hard real-time systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(10): 1385-1398 (2004) - [j54]Chunsheng Liu, Krishnendu Chakrabarty
Identification of error-capturing scan cells in scan-BIST with applications to system-on-chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(10): 1447-1459 (2004) - [j53]Yi Zou, Krishnendu Chakrabarty
Sensor deployment and target localization in distributed sensor networks. ACM Trans. Embed. Comput. Syst. 3(1): 61-91 (2004) - [j52]Ying Zhang, Krishnendu Chakrabarty
Dynamic adaptation for fault tolerance and power management in embedded real-time systems. ACM Trans. Embed. Comput. Syst. 3(2): 336-360 (2004) - [j51]Qishi Wu, Nageswara S. V. Rao
On Computing Mobile Agent Routes for Data Fusion in Distributed Sensor Networks. IEEE Trans. Knowl. Data Eng. 16(6): 740-753 (2004) - [j50]Anuja Sehgal, Vikram Iyengar, Krishnendu Chakrabarty
SOC test planning using virtual test access architectures. IEEE Trans. Very Large Scale Integr. Syst. 12(12): 1263-1276 (2004) - [c71]Ying Zhang, Robert P. Dick, Krishnendu Chakrabarty
Energy-aware deterministic fault tolerance in distributed real-time embedded systems. DAC 2004: 550-555 - [c70]Anuja Sehgal, Krishnendu Chakrabarty
Efficient Modular Testing of SOCs Using Dual-Speed TAM Architectures. DATE 2004: 422-427 - [c69]Ying Zhang, Krishnendu Chakrabarty:
Task Feasibility Analysis and Dynamic Voltage Scaling in Fault-Tolerant Real-Time Embedded Systems. DATE 2004: 1170-1175 - [c68]Mohammad H. Tehranipour, Mehrdad Nourani, Krishnendu Chakrabarty
Nine-Coded Compression Technique with Application to Reduced Pin-Count Testing and Flexible On-Chip Decompression. DATE 2004: 1284-1289 - [c67]Fei Su, Sule Ozev, Krishnendu Chakrabarty:
Test planning and test resource optimization for droplet-based microfluidic systems. ETS 2004: 72-77 - [c66]Fei Su, Krishnendu Chakrabarty:
Architectural-level synthesis of digital microfluidics-based biochips. ICCAD 2004: 223-228 - [c65]Chunsheng Liu, Kumar N. Dwarakanath, Krishnendu Chakrabarty, Ronald D. Blanton:
Compact Dictionaries for Diagnosis of Unmodeled Faults in Scan-BIST. ISVLSI 2004: 173-178 - [c64]Fei Su, Krishnendu Chakrabarty:
Concurrent Testing of Droplet-Based Microfluidic Systems for Multiplexed Biomedical Assays. ITC 2004: 883-892 - [c63]Anuja Sehgal, Sandeep Kumar Goel, Erik Jan Marinissen, Krishnendu Chakrabarty:
IEEE P1500-Compliant Test Wrapper Design for Hierarchical Cores. ITC 2004: 1203-1212 - [p2]Vishnu Swaminathan, Krishnendu Chakrabarty, Yi Zou:
Techniques to Reduce Communication and Computation Energy in Wireless Sensor Networks. Handbook of Sensor Networks 2004 - 2003
- [j49]Yi Zou, Krishnendu Chakrabarty
Target localization based on energy considerations in distributed sensor networks. Ad Hoc Networks 1(2-3): 261-272 (2003) - [j48]Anshuman Chandra, Krishnendu Chakrabarty
Test Data Compression and Test Resource Partitioning for System-on-a-Chip Using Frequency-Directed Run-Length (FDR) Codes. IEEE Trans. Computers 52(8): 1076-1088 (2003) - [j47]Vikram Iyengar, Krishnendu Chakrabarty
Test Access Mechanism Optimization, Test Scheduling, and Tester Data Volume Reduction for System-on-Chip. IEEE Trans. Computers 52(12): 1619-1632 (2003) - [j46]Anshuman Chandra, Krishnendu Chakrabarty
A unified approach to reduce SOC test data volume, scan power and testing time. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(3): 352-363 (2003) - [j45]Chunsheng Liu, Krishnendu Chakrabarty
Failing vector identification based on overlapping intervals of test vectors in a scan-BIST environment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(5): 593-604 (2003) - [j44]Vikram Iyengar, Krishnendu Chakrabarty
Efficient test access mechanism optimization for system-on-chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(5): 635-643 (2003) - [j43]Vishnu Swaminathan, Krishnendu Chakrabarty
Energy-conscious, deterministic I/O device scheduling in hard real-time systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(7): 847-858 (2003) - [j42]Krishnendu Chakrabarty
Space compaction of test responses using orthogonal transmission functions [logic testing]. IEEE Trans. Instrum. Meas. 52(5): 1353-1362 (2003) - [j41]Sunil R. Das, Made Sudarma
Parity bit signature in response data compaction and built-in self-testing of VLSI circuits with nonexhaustive test sets. IEEE Trans. Instrum. Meas. 52(5): 1363-1380 (2003) - [j40]Lei Li, Krishnendu Chakrabarty
Test data compression using dictionaries with selective entries and fixed-length indices. ACM Trans. Design Autom. Electr. Syst. 8(4): 470-490 (2003) - [j39]Krishnendu Chakrabarty
A synthesis-for-transparency approach for hierarchical and system-on-a-chip test. IEEE Trans. Very Large Scale Integr. Syst. 11(2): 167-179 (2003) - [c62]Anuja Sehgal, Vikram Iyengar, Mark D. Krasniewski, Krishnendu Chakrabarty:
Test cost reduction for SOCs using virtual TAMs and lagrange multipliers. DAC 2003: 738-743 - [c61]Dhiraj K. Pradhan, Chunsheng Liu, Krishnendu Chakrabarty:
EBIST: A Novel Test Generator with Built-In Fault Detection Capability. DATE 2003: 10224-10229 - [c60]Chunsheng Liu, Krishnendu Chakrabarty:
A Partition-Based Approach for Identifying Failing Scan Cells in Scan-BIST with Applications to System-on-Chip Fault Diagnosis. DATE 2003: 10230-10237 - [c59]Ying Zhang, Krishnendu Chakrabarty:
Energy-Aware Adaptive Checkpointing in Embedded Real-Time Systems. DATE 2003: 10918-10925 - [c58]Vikram Iyengar, Anshuman Chandra, Sharon Schweizer, Krishnendu Chakrabarty:
A Unified Approach for SOC Testing Using Test Data Compression and TAM Optimization. DATE 2003: 11188-11190 - [c57]Ying Zhang, Krishnendu Chakrabarty:
Fault Recovery Based on Checkpointing for Hard Real-Time Embedded Systems. DFT 2003: 320-327 - [c56]Anuja Sehgal, Aishwarya Dubey, Erik Jan Marinissen
Yield analysis for repairable embedded memories. ETW 2003: 35-40 - [c55]Yi Zou, Krishnendu Chakrabarty:
Uncertainty-aware sensor deployment algorithms for surveillance applications. GLOBECOM 2003: 2972-2976 - [c54]Vamsee K. Pamula, Krishnendu Chakrabarty:
Cooling of integrated circuits using droplet-based microfluidics. ACM Great Lakes Symposium on VLSI 2003: 84-87 - [c53]Vishnu Swaminathan, Krishnendu Chakrabarty:
Generalized Network Flow Techniques for Dynamic Voltage Scaling in Hard Real-Time Systems. ICCAD 2003: 21-25 - [c52]Anuja Sehgal, Sule Ozev, Krishnendu Chakrabarty:
TAM Optimization for Mixed-Signal SOCs using Analog Test Wrappers. ICCAD 2003: 95-99 - [c51]Ying Zhang, Krishnendu Chakrabarty, Vishnu Swaminathan:
Energy-Aware Fault Tolerance in Fixed-Priority Real-Time Embedded Systems. ICCAD 2003: 209-214 - [c50]Seiji Kajihara, Yasumi Doi, Lei Li, Krishnendu Chakrabarty:
On Combining Pinpoint Test Set Relaxation and Run-Length Codes for Reducing Test Data Volume. ICCD 2003: 387-396 - [c49]Yi Zou, Krishnendu Chakrabarty:
Sensor Deployment and Target Localization Based on Virtual Forces. INFOCOM 2003: 1293-1303 - [c48]Chunsheng Liu, Krishnendu Chakrabarty
Compact Dictionaries for Fault Diagnosis in BIST. ISQED 2003: 105-110 - [c47]Lei Li, Krishnendu Chakrabarty:
Deterministic BIST Based on a Reconfigurable Interconnection Network. ITC 2003: 460-469 - [c46]Fei Su, Sule Ozev, Krishnendu Chakrabarty:
Testing of Droplet-Based Microelectrofluidic Systems. ITC 2003: 1192-1200 - [c45]Yi Zou, Krishnendu Chakrabarty:
Energy-Aware Target Localization in Wireless Sensor Networks. PerCom 2003: 60- - [c44]Lei Li, Krishnendu Chakrabarty
Test Data Compression Using Dictionaries with Fixed-Length Indices. VTS 2003: 219-224 - [c43]Vikram Iyengar, Krishnendu Chakrabarty
Design and Optimization of Multi-level TAM Architectures for Hierarchical SOCs. VTS 2003: 299-312 - [c42]Santpal Singh Dhillon, Krishnendu Chakrabarty
Sensor placement for effective coverage and surveillance in distributed sensor networks. WCNC 2003: 1609-1614 - [p1]Ying Zhang, Krishnendu Chakrabarty:
Adaptive Checkpointing with Dynamic Voltage Scaling in Embedded Real-Time Systems. Embedded Software for SoC 2003: 449-463 - 2002
- [b2]Krishnendu Chakrabarty, Vikram Iyengar, Anshuman Chandra:
Test Resource Partitioning for System-on-a-Chip. Frontiers in electronic testing 20, Kluwer / Springer 2002, ISBN 978-1-4020-7119-5, pp. I-XII, 1-232 - [j38]Krishnendu Chakrabarty, Erik Jan Marinissen:
How Useful are the ITC 02 SoC Test Benchmarks? IEEE Des. Test Comput. 19(5): 120, 119 (2002) - [j37]Vikram Iyengar, Krishnendu Chakrabarty
Test Wrapper and Test Access Mechanism Co-Optimization for System-on-Chip. J. Electron. Test. 18(2): 213-230 (2002) - [j36]Krishnendu Chakrabarty
Guest Editorial. J. Electron. Test. 18(4-5): 363 (2002) - [j35]Hairong Qi, Xiaoling Wang, S. Sitharama Iyengar
High Performance Sensor Integration in Distributed Sensor Networks Using Mobile Agents. Int. J. High Perform. Comput. Appl. 16(3): 325-335 (2002) - [j34]Vikram Iyengar, Krishnendu Chakrabarty
Test Bus Sizing for System-on-a-Chip. IEEE Trans. Computers 51(5): 449-459 (2002) - [j33]Krishnendu Chakrabarty
Grid Coverage for Surveillance and Target Location in Distributed Sensor Networks. IEEE Trans. Computers 51(12): 1448-1453 (2002) - [j32]Anshuman Chandra, Krishnendu Chakrabarty
Low-power scan testing and test data compression forsystem-on-a-chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(5): 597-604 (2002) - [j31]Anshuman Chandra, Krishnendu Chakrabarty
Test data compression and decompression based on internal scanchains and Golomb coding. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(6): 715-722 (2002) - [j30]Tianhao Zhang, Krishnendu Chakrabarty
Design of reconfigurable composite microsystems based on hardware/software codesign principles. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(8): 987-995 (2002) - [j29]Vikram Iyengar, Krishnendu Chakrabarty
System-on-a-chip test scheduling with precedence relationships, preemption, and power constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(9): 1088-1094 (2002) - [j28]Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gössel, Krishnendu Chakrabarty
Synthesis of single-output space compactors for scan-based sequential circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(10): 1171-1179 (2002) - [j27]Sunil R. Das, Jing Yi Liang, Emil M. Petriu, Mansour H. Assaf
Data compression in space under generalized mergeability based on concepts of cover table and frequency ordering. IEEE Trans. Instrum. Meas. 51(1): 150-172 (2002) - [c41]Alexej Dmitriev, Michael Gössel, Krishnendu Chakrabarty
Robust Space Compaction of Test Responses. Asian Test Symposium 2002: 254-259 - [c40]Vikram Iyengar, Krishnendu Chakrabarty
Recent Advances in Test Planning for Modular Testing of Core-Based SOCs. Asian Test Symposium 2002: 320- - [c39]Vishnu Swaminathan, Krishnendu Chakrabarty
Pruning-based energy-optimal device scheduling for hard real-time systems. CODES 2002: 175-180 - [c38]Anshuman Chandra, Krishnendu Chakrabarty
Reduction of SOC test data volume, scan power and testing time using alternating run-length codes. DAC 2002: 673-678 - [c37]Vikram Iyengar, Krishnendu Chakrabarty, Erik Jan Marinissen:
Wrapper/TAM co-optimization, constraint-driven test scheduling, and tester data volume reduction for SOCs. DAC 2002: 685-690 - [c36]Chunsheng Liu, Krishnendu Chakrabarty
An Interval-Based Diagnosis Scheme for Identifying Failing Vectors in a Scan-BIST Environment. DATE 2002: 382-386 - [c35]Vikram Iyengar, Krishnendu Chakrabarty
Efficient Wrapper/TAM Co-Optimization for Large SOCs. DATE 2002: 491-498 - [c34]Anshuman Chandra, Krishnendu Chakrabarty
Test Resource Partitioning and Reduced Pin-Count Testing Based on Test Data Compression. DATE 2002: 598-603 - [c33]Erik Jan Marinissen
A Set of Benchmarks fo Modular Testing of SOCs. ITC 2002: 519-528 - [c32]Vikram Iyengar, Sandeep Kumar Goel, Erik Jan Marinissen, Krishnendu Chakrabarty:
Test Resource Optimization for Multi-Site Testing of SOCs Under ATE Memory Depth Constraints. ITC 2002: 1159-1168 - [c31]Vishnu Swaminathan, Charles B. Schweizer, Krishnendu Chakrabarty
Experiences in Implementing an Energy-Driven Task Scheduler in RT-Linux. IEEE Real Time Technology and Applications Symposium 2002: 229-238 - [c30]Anshuman Chandra, Krishnendu Chakrabarty
How Effective are Compression Codes for Reducing Test Data Volume? VTS 2002: 91-96 - [c29]Vikram Iyengar, Krishnendu Chakrabarty
On Using Rectangle Packing for SOC Wrapper/TAM Co-Optimization. VTS 2002: 253-258 - 2001
- [j26]Anshuman Chandra, Krishnendu Chakrabarty
Test Resource Partitioning for SOCs. IEEE Des. Test Comput. 18(5): 80-91 (2001) - [j25]Shivakumar Swaminathan, Krishnendu Chakrabarty
On Using Twisted-Ring Counters for Test Set Embedding in BIST. J. Electron. Test. 17(6): 529-542 (2001) - [j24]Hairong Qi, S. Sitharama Iyengar
Distributed sensor networks - a review of recent research. J. Frankl. Inst. 338(6): 655-668 (2001) - [j23]Vishnu Swaminathan, Krishnendu Chakrabarty
Real-time task scheduling for energy-aware embedded systems. J. Frankl. Inst. 338(6): 729-750 (2001) - [j22]Anshuman Chandra, Krishnendu Chakrabarty
System-on-a-chip test-data compression and decompressionarchitectures based on Golomb codes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(3): 355-368 (2001) - [j21]Jie Ding, Krishnendu Chakrabarty
Scheduling of microfluidic operations for reconfigurabletwo-dimensional electrowetting arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(12): 1463-1468 (2001) - [j20]Krishnendu Chakrabarty
Optimal test access architectures for system-on-a-chip. ACM Trans. Design Autom. Electr. Syst. 6(1): 26-49 (2001) - [j19]Hairong Qi, S. Sitharama Iyengar
Multiresolution data integration using mobile agents in distributed sensor networks. IEEE Trans. Syst. Man Cybern. Part C 31(3): 383-391 (2001) - [j18]Anshuman Chandra, Krishnendu Chakrabarty
Efficient Test Application for Core-Based Systems Using Twisted-Ring Counters. VLSI Design 12(4): 475-486 (2001) - [c28]Vishnu Swaminathan, Krishnendu Chakrabarty:
Investigating the effect of voltage-switching on low-energy task scheduling in hard real-time systems. ASP-DAC 2001: 251 - [c27]Bhargab B. Bhattacharya, Alexej Dmitriev, Michael Gössel, Krishnendu Chakrabarty:
Synthesis of single-output space compactors with application to scan-based IP cores. ASP-DAC 2001: 496-502 - [c26]Shivakumar Swaminathan, Krishnendu Chakrabarty
A deterministic scan-BIST architecture with application to field testing of high-availability systems. CICC 2001: 259-262 - [c25]Vishnu Swaminathan, Krishnendu Chakrabarty
Dynamic I/O power management for hard real-time systems. CODES 2001: 237-242 - [c24]Anshuman Chandra, Krishnendu Chakrabarty
Combining Low-Power Scan Testing and Test Data Compression for System-on-a-Chip. DAC 2001: 166-169 - [c23]Anshuman Chandra, Krishnendu Chakrabarty
Efficient test data compression and decompression for system-on-a-chip using internal scan chains and Golomb coding. DATE 2001: 145-149 - [c22]Vikram Iyengar, Krishnendu Chakrabarty
Test wrapper and test access mechanism co-optimization for system-on-chip. ITC 2001: 1023-1032 - [c21]Krishnendu Chakrabarty
Coding Theory Framework for Target Location in Distributed Sensor Networks. ITCC 2001: 130- - [c20]Krishnendu Chakrabarty
Synthesis Of Transparent Circuits For Hierarchical An System-On-A-Chip Test. VLSI Design 2001: 431- - [c19]Anshuman Chandra, Krishnendu Chakrabarty:
Frequency-Directed Run-Length (FDR) Codes with Application to System-on-a-Chip Test Data Compression. VTS 2001: 42-47 - [c18]Andrej A. Morosov, Michael Gössel, Krishnendu Chakrabarty, Bhargab B. Bhattacharya:
Design of Parameterizable Error-Propagating Space Compactors for Response Observation. VTS 2001: 48-53 - [c17]Vikram Iyengar, Krishnendu Chakrabarty:
Precedence-Based, Preemptive, and Power-Constrained Test Scheduling for System-on-a-Chip. VTS 2001: 368-374 - 2000
- [j17]Krishnendu Chakrabarty
Test scheduling for core-based systems using mixed-integer linearprogramming. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(10): 1163-1174 (2000) - [j16]Krishnendu Chakrabarty
Test-set embedding based on width compression for mixed-mode BIST. IEEE Trans. Instrum. Meas. 49(3): 671-678 (2000) - [j15]Sunil R. Das, Tony F. Barakat, Emil M. Petriu, Mansour H. Assaf
Space compression revisited. IEEE Trans. Instrum. Meas. 49(3): 690-705 (2000) - [j14]Krishnendu Chakrabarty
Deterministic built-in test pattern generation for high-performance circuits using twisted-ring counters. IEEE Trans. Very Large Scale Integr. Syst. 8(5): 633-636 (2000) - [c16]Krishnendu Chakrabarty
Design of system-on-a-chip test access architectures under place-and-route and power constraints. DAC 2000: 432-437 - [c15]Krishnendu Chakrabarty
Built-in self testing of high-performance circuits using twisted-ring counters. ISCAS 2000: 72-75 - [c14]Hiroshi Date, Vikram Iyengar, Krishnendu Chakrabarty, Makoto Sugihara:
Mathematical Modeling of Intellectual Property Protection Using Partially-Mergeable Cores. PDPTA 2000 - [c13]Anshuman Chandra, Krishnendu Chakrabarty:
Test Data Compression for System-on-a-Chip Using Golomb Codes. VTS 2000: 113-120 - [c12]Krishnendu Chakrabarty:
Design of System-on-a-Chip Test Access Architectures using Integer Linear Programming. VTS 2000: 127-136 - [c11]Markus Seuring, Krishnendu Chakrabarty:
Space Compaction of Test Responses for IP Cores Using Orthogonal Transmission Functions. VTS 2000: 213-220
1990 – 1999
- 1999
- [j13]Vikram Iyengar, Krishnendu Chakrabarty
Deterministic Built-in Pattern Generation for Sequential Circuits. J. Electron. Test. 15(1-2): 97-114 (1999) - [j12]Mark G. Karpovsky, Krishnendu Chakrabarty
On the Covering of Vertices for Fault Diagnosis in Hypercubes. Inf. Process. Lett. 69(2): 99-103 (1999) - [c10]Krishnendu Chakrabarty:
Test scheduling for core-based systems. ICCAD 1999: 391-394 - [c9]Paulo F. Flores, Horácio C. Neto, Krishnendu Chakrabarty, João Marques-Silva:
Test pattern generation for width compression in BIST. ISCAS (1) 1999: 114-118 - [c8]Krishnendu Chakrabarty, Brian T. Murray, Vikram Iyengar:
Built-in Test Pattern Generation For High-Performance Cir cuits Using Twisted-Ring Counters. VTS 1999: 22-27 - 1998
- [j11]Krishnendu Chakrabarty
Optimal Zero-Aliasing Space Compaction of Test Responses. IEEE Trans. Computers 47(11): 1171-1187 (1998) - [j10]Krishnendu Chakrabarty
Zero-aliasing space compaction using linear compactors with bounded overhead. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(5): 452-457 (1998) - [j9]Krishnendu Chakrabarty
Design of built-in test generator circuits using width compression. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(10): 1044-1051 (1998) - [j8]Vikram Iyengar, Krishnendu Chakrabarty
Huffman encoding of test sets for sequential circuits. IEEE Trans. Instrum. Meas. 47(1): 21-25 (1998) - [j7]Mark G. Karpovsky, Krishnendu Chakrabarty
On a New Class of Codes for Identifying Vertices in Graphs. IEEE Trans. Inf. Theory 44(2): 599-611 (1998) - [j6]Krishnendu Chakrabarty
Zero-aliasing space compaction of test responses using multiple parity signatures. IEEE Trans. Very Large Scale Integr. Syst. 6(2): 309-313 (1998) - [c7]Vikram Iyengar, Krishnendu Chakrabarty, Brian T. Murray:
Built-In Self Testing of Sequential Circuits Using Precomputed Test Sets. VTS 1998: 418-423 - 1997
- [j5]Vikram Iyengar, Krishnendu Chakrabarty
An Efficient Finite-State Machine Implementation of Huffman Decoders. Inf. Process. Lett. 64(6): 271-275 (1997) - [j4]Krishnendu Chakrabarty
On the quality of accumulator-based compaction of test responses. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(8): 916-922 (1997) - [c6]Krishnendu Chakrabarty, Jian Liu, Minyao Zhu, Brian T. Murray:
Test Width Compression for Built-In Self Testing. ITC 1997: 328-337 - 1996
- [j3]Krishnendu Chakrabarty
Balance testing and balance-testable design of logic circuits. J. Electron. Test. 8(1): 71-86 (1996) - [j2]Krishnendu Chakrabarty
Test response compaction using multiplexed parity trees. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(11): 1399-1408 (1996) - 1995
- [b1]Krishnendu Chakrabarty:
Test response compaction for built-in self testing. University of Michigan, USA, 1995 - [j1]Krishnendu Chakrabarty
Cumulative balance testing of logic circuits. IEEE Trans. Very Large Scale Integr. Syst. 3(1): 72-83 (1995) - [c5]Krishnendu Chakrabarty, Brian T. Murray, John P. Hayes:
Optimal Space Compaction of Test Responses. ITC 1995: 834-843 - 1994
- [c4]Krishnendu Chakrabarty, John P. Hayes:
DFBT: A Design-for-Testability Method Based on Balance Testing. DAC 1994: 351-357 - [c3]Krishnendu Chakrabarty, John P. Hayes:
Efficient Test-Response Compression for Multiple-Output Cicuits. ITC 1994: 501-510 - 1993
- [c2]Krishnendu Chakrabarty, John P. Hayes:
Balance Testing of Logic Circuits. FTCS 1993: 350-359 - [c1]Krishnendu Chakrabarty, John P. Hayes:
Aliasing-free error detection (ALFRED). VTS 1993: 260-266
Coauthor Index
[j341] [j333] [i19] [j301] [j284] [j282] [j274] [c410] [c398] [j251] [c370] [j240] [c350] [i9] [j222] [j218] [j215] [j213] [j202] [j199] [c279] [j194] [j191] [j190] [j182] [c273] [c269] [c261] [c246] [c243] [c242] [c241] [c240] [c236] [i5] [j157] [j156] [c226] [c225] [c213] [c212] [j142] [c196] [c191] [c183] [j123] [c180] [c139] [j28] [c27] [c18]
P. P. Chakrabarti 0001
aka: Partha Pratim Chakrabarti
aka: Partha Pratim Chakrabarti
Janardhan Rao Doppa
aka: Jana Doppa
aka: Jana Doppa
[j340] [j336] [j326] [j322] [j306] [j302] [j290] [c415] [j286] [j280] [c389] [c384] [c383] [j257] [c373] [c368] [c367] [c337] [c336] [j226] [j223] [c316] [j208] [c303] [j196] [j187] [c264] [j170] [c254] [c244] [j154] [j152] [j149] [c230] [c229] [c219] [c217] [c205] [c192] [c185] [c176] [c175] [c163] [c157] [c144]
[j373] [j368] [c502] [j347] [c439] [j303] [j301] [j300] [c419] [j285] [j282] [c409] [i10] [j263] [j261] [c380] [c370] [j243] [j242] [j241] [j240] [j232] [c350] [c339] [i9] [i8] [j225] [j219] [c327] [c317] [c313] [b10] [j213] [c304] [c296] [c288] [c283] [i6] [j188] [j184] [j179] [c277] [c275] [c274] [c262] [c259] [j173] [j166] [c251] [c243] [c242] [c233] [i5] [j151] [c220] [c216] [c215] [c198] [c197] [c189] [c167]
[c505] [c494] [j359] [j357] [c490] [c479] [j343] [j342] [c465] [i20] [j328] [j324] [j323] [j318] [c452] [j308] [j304] [j297] [j295] [j294] [j293] [j289] [c424] [j283] [j278] [j272] [j271] [j268] [c412] [c405] [c402] [c401] [c400] [c393] [c390] [c386] [j259] [c381] [c376] [c372] [c363] [c359] [c353] [c342] [j220] [c330] [c312] [c287]
Mehdi Baradaran Tahoori
aka: Mehdi B. Tahoori
aka: Mehdi B. Tahoori
Mark M. Tehranipoor
aka: Mohammad Tehranipoor
aka: Mohammad Tehranipoor
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