ESP8266 core for Arduino

Yosys Open SYnthesis Suite

Learning FPGA, yosys, nextpnr, and RISC-V

Icarus Verilog

Intel® Performance Counter Monitor (Intel® PCM)

10x faster matrix and vector operations

WS2812 FX Library for Arduino and ESP8266

XLS: Accelerated HW Synthesis

Verilog to Routing -- Open Source CAD Flow for FPGA Research

Vitis Libraries

ChampSim is an open-source trace based simulator maintained at Texas A&M University and through the support of the computer architecture community.

Arduino and CMake library for communicating with the InvenSense MPU-6500, MPU-9250 and MPU-9255 nine-axis IMUs.

FPGA Accelerator for CNN using Vivado HLS

DRAMSim2: A cycle accurate DRAM simulator

An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).

A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.

A Modeling and Verification Platform for SoCs using ILAs

Hardware generator debugger

A speculative mechanism to accelerate long-latency off-chip load requests by removing on-chip cache access latency from their critical path, as described by MICRO 2022 paper by Bera et al. (https:/…

A flush-reload side channel attack implementation

Beginner friendly repo for easily contributing algorithms' implementations

C++ code generation tools for real-time CPU or FPGA simulation solvers of electrical and power electronic systems

Source code for the cycle-level simulator and RTL implementation of BlockHammer proposed in our HPCA 2021 paper: Yaglikci et. al., "BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rap…

Tutorial for integrating PyMTL and Vivado HLS

Source code of the U-TRR methodology presented in "Uncovering In-DRAM RowHammer Protection Mechanisms: A New Methodology, Custom RowHammer Patterns, and Implications", https://people.inf.ethz.ch/om…

FPGA Cryptography for High-Level Synthesis

All sources to reproduce the results presented in our paper, QUAC-TRNG, the highest-throughput DRAM-based true random number generator, described in https://people.inf.ethz.ch/omutlu/pub/QUAC-TRNG-…