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ISCAS 2007: New Orleans, Louisiana, USA
- International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA. IEEE 2007, ISBN 1-4244-0920-9
- Ramon Tortosa Navas, Antonio Aceituno, José M. de la Rosa, Ángel Rodríguez-Vázquez, Francisco V. Fernández
:
A 12-bit@40MS/s Gm-C Cascade 3-2 Continuous-Time Sigma-Delta Modulator. 1-4 - Minho Kwon, Gunhee Han:
An I/Q Channel Time-Interleaved Band-Pass Sigma-Delta Modulator for a Low-IF Receiver. 5-8 - Jens Anders, Wolfgang Mathis
On the modeling and the stability of continuous-time Sigma-Delta-Modulators. 9-12 - Christopher S. Taillefer, Gordon W. Roberts:
Delta-Sigma Analog-to-Digital Conversion via Time-Mode Signal Processing. 13-16 - Xavier Redondo, Jofre Pallares
A 1.2V 130µA 10-bit MOS-Only Log-Domain Sigma Delta Modulator. 17-20 - Ediz Çetin
Living and Dealing with RF Impairments in Communication Transceivers. 21-24 - Lauri Anttila, Mikko Valkama, Markku Renfors:
3.9G Radio Reception with SC-FDMA Waveforms Under I/Q Imbalance. 25-28 - Piotr Rykaczewski, Friedrich K. Jondral:
Blind I/Q Imbalance Compensation in Multipath Environments. 29-32 - Marcus Windisch, Gerhard P. Fettweis:
On the Impact of I/Q Imbalance in Multi-Carrier Systems for Different Channel Scenarios. 33-36 - Qiyue Zou, Alireza Tarighat, Ali H. Sayed:
On the Joint Compensation of IQ Imbalances and Phase Noise in MIMO-OFDM Systems. 37-40 - Mei Guo, Yan Lu, Feng Wu, Shipeng Li, Wen Gao:
Distributed Video Coding with Spatial Correlation Exploited Only at the Decoder. 41-44 - Zhihai He:
Peak Transform for Efficient Image Representation and Coding. 45-48 - Long Xu, Wen Gao, Xiangyang Ji, Debin Zhao:
Rate Control for Hierarchical B-picture Coding with Scaling-factors. 49-52 - Yong Fang, Lu Yu
Block-Interleaved Error-Resilient Entropy Coding. 53-56 - Shilin Xu, Li Yu, Guangxi Zhu:
A Perceptual Coding Method based on the Luma Sensitivity Model. 57-60 - Hanoch Lev-Ari, Alex M. Stankovic
Fundamental Performance Limits in Lossy Polyphase Systems: Apparent Power and Optimal Compensation. 61-64 - Ali Pinar, Adam Reichert, Bernard C. Lesieutre:
Computing Criticality of Lines in Power Systems. 65-68 - Bei Gou, Hui Zheng, Weibiao Wu, Xingbin Yu:
Probability Distribution of Blackouts in Complex Power Networks. 69-72 - Aaron St. Leger, Juan C. Jiménez, Agung Fu, Sanal Djimbinov, Sa Em Soeurn, Sun Sit Lwin, Chika O. Nwankpa:
Analog Emulation of a Reconfigurable Tap Changing Transformer. 73-76 - Hiroyuki Mori, Hidenobu Tani:
Application of Two-Layered Tabu Search to Optimal Allocation of D-FACTS for Uncertain Wind Power Generation. 77-80 - Clyde Clarke, Carl White, Ralph Etienne-Cummings:
Design and Optimization of a Capacitive Micromachined Ultrasonic Transducer Micro-Array for Near Field Sensing. 81-84 - Ebrahim Ghafar-Zadeh, Mohamad Sawan:
A CMOS-Based Capacitive Sensor for Laboratory-On-Chips: Design and Experimental Results. 85-88 - Nizar Lajnef, Shantanu Chakrabartty, Niell Elvin, Alex Elvin:
Piezo-powered floating gate injector for self-powered fatigue monitoring in biomechanical implants. 89-92 - Nader Safavian, G. Reza Chaji, Shahin Jafarabadi-Ashtiani, Arokia Nathan, John A. Rowlands:
A novel current scaling active pixel sensor with correlated double sampling readout circuit for real time medical x-ray imaging. 93-96 - Andrea Anzalone, Federico Bizzarri, Paolo Camera, Luca Petrillo, Marco Storace:
DSP implementation of a low-complexity algorithm for real-time automated vessel detection in images of the fundus of the human retina. 97-100 - Raghuram Ranganathan, Wasfy B. Mikhael:
A Novel Interference Supression Technique employing Complex Adaptive ICA for Time-Varying Channels in Diversity Wireless QAM Receivers. 101-104 - Da-Zheng Feng, Wei Xing Zheng:
Adaptive IIR Filtering via a Recursive Total Instrumental Variable Algorithm. 105-108 - Munkyo Seo, Mark J. W. Rodwell:
Generalized Blind Mismatch Correction for a Two-Channel Time-Interleaved ADC: Analytic Approach. 109-112 - Jeffrey A. Foutz, Andreas S. Spanias:
An Adaptive Low Rank Algorithm for Semispherical Antenna Arrays. 113-116 - Paulo Alexandre Crisóstomo Lopes, José António Beltran Gerald:
New Normalized LMS Algorithms Based on the Kalman Filter. 117-120 - Praveen Raghavan, José L. Ayala
Reduction of Register File Delay Due to Process Variability in VLIW Embedded Processors. 121-124 - Héctor Pettenghi
Non Return Mobile Logic Family. 125-128 - Takao Waho, Akinori Yamada, Hiroki Okuyama, Victor Khorenko, Thai Do, Werner Prost:
A Four-Resonant-Tunneling-Diode (4RTD) NAND/NOR Logic Gate. 129-132 - Jacques-Olivier Klein, Eric Belhaire, Claude Chappert, Florent Ouchet, Russell Cowburn, Dan Read, Dorothee Petit:
Synthesis of Finite State Machines with Magnetic Domain Wall Logic. 133-136 - Jennifer Blain Christen, Andreas G. Andreou
A Self-Biased Operational Transconductance Amplifier in 0.18 micron 3D SOI-CMOS. 137-140 - Hamid R. Zarandi, Seyed Ghassem Miremadi, Dhiraj K. Pradhan, Jimson Mathew:
Soft Error Mitigation in Switch Modules of SRAM-based FPGAs. 141-144 - Jing Li, Hiroshi Miyashita:
Efficient Thermal Via Planning for Placement of 3D Integrated Circuits. 145-148 - Youhua Shi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki:
Design for Secure Test - A Case Study on Pipelined Advanced Encryption Standard. 149-152 - Xueqing Wang, William R. Eisenstadt, Robert M. Fox:
Embedded Jitter Measurement of High-speed I/O Signals. 153-156 - Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskarani:
GALS Based Shared Test Architecture for Embedded Memories. 157-160 - Yang Qu, Juha-Pekka Soininen, Jari Nurmi
A Genetic Algorithm for Scheduling Tasks onto Dynamically Reconfigurable Hardware. 161-164 - Fredrik Kristensen, W. James MacLean:
Real-Time Extraction of Maximally Stable Extremal Regions on an FPGA. 165-168 - Christopher M. Twigg, Jordan D. Gray, Paul E. Hasler:
Programmable Floating Gate FPAA Switches Are Not Dead Weight. 169-172 - Christopher M. Twigg, Paul E. Hasler:
Programmable Conductance Switches for FPAAs. 173-176 - Paul E. Hasler, Christopher M. Twigg:
An OTA-based Large-Scale Field Programmable Analog Array (FPAA) for faster On-Chip Communication and Computation. 177-180 - Boo-Young Choi, Jung-Won Han, Sung Min Park, Kang-Yeob Park, Wonseok Oh, J.-C. Choi:
A 1Gb/s Optical Transceiver Array Chipset for Automotive Wired Interconnects. 181-184 - David Rennie, Manoj Sachdev:
A Novel Tri-State Binary Phase Detector. 185-188 - Mike Bichan, Anthony Chan Carusone:
Crosstalk-Aware Transmitter Pulse-Shaping for Parallel Chip-to-Chip Links. 189-192 - Hyoungsoo Kim, Franklin Bien, Youngsik Hur, Soumya Chandramouli, Jeongwon Cha, Edward Gebara, Joy Laskar:
A 0.25-um BiCMOS Feed Foward Equalizer Using Active Delay Line for Backplane Communication. 193-196 - Franklin Bien, Soumya Chandramouli, Hyoungsoo Kim, Edward Gebara, Joy Laskar:
Digitally Controlled 10-Gb/s Adjustable Delay Line for Adaptive Filter Design in standard CMOS Technology. 197-200 - Tetsuro Endo, Jun Yokota:
Generation of White Noise by Using Chaos in Practical Phase-Locked Loop Integrated Circuit Module. 201-204 - Ned J. Corron
Reverse-Time Chaos from a Randomly Driven Filter. 205-208 - Yoko Uwate, Yoshifumi Nishio
Switching Phase States of Chaotic Circuits Coupled by Time-Varying Resistor. 209-212 - Sergio Callegari
ADCs, Chaos and TRNGs: a Generalized View Exploiting Markov Chain Lumpability Properties. 213-216 - Weihua Deng
Design of Multi-Directional Multi-Scroll Chaotic Attractors Based on Fractional Differential Systems. 217-220 - Chutham Sawigun
A Compact High Current Efficiency Low-Voltage MOS Transconductor with Nearly Constant Input Voltage Range. 221-224 - Jingjing Hu, Johan H. Huijsing, Kofi A. A. Makinwa:
A Three-Stage Amplifier with Quenched Multipath Frequency Compensation for All Capacitive Loads. 225-228 - Tee Hui Teo
Low-Power Digitally Controlled CMOS Source Follower Variable Attenuator. 229-232 - Hirokazu Yoshizawa, Gabor C. Temes:
Predictive Switched-Capacitor Track-and-Hold Amplifier with Improved Linearity. 233-236 - Salvatore Pennisi, Giuseppe Scotti, Alessandro Trifiletti:
150 µA CMOS Transconductor with 82 dB SFDR. 237-240 - Matthias Keller, Alexander Buhmann, Maurits Ortmanns, Yiannos Manoli:
A Method for the Discrete-Time Simulation of Continuous-Time Sigma-Delta Modulators. 241-244 - Chi-Tung Ko, Kong-Pang Pun:
A DEM Scheme for I/Q Mismatch Compensation in Multi-Bit CT Delta Sigma Modulator. 245-248 - Kyehyung Lee, Gabor C. Temes, Franco Maloberti:
Noise-Coupled Multi-Cell Delta-Sigma ADCs. 249-252 - Ghyslain Gagnon
Continuous Compensation of Binary-Weighted DAC Nonlinearities in Bandpass Delta-Sigma Modulators. 253-256 - Nima Maghari, Sunwoo Kwon, Gabor C. Temes, Un-Ku Moon:
Mixed-Order Sturdy MASH Delta-Sigma Modulator. 257-260 - Timo Roman, Visa Koivunen:
Carrier frequency synchronization for mobile television receivers. 261-264 - Xinping Huang, Mario Caron:
Efficient Transmitter Self-Calibration and Amplifier Linearization Techniques. 265-268 - Antonio Cantoni, John Tuthill:
Digital Compensation of Frequency Dependent Imperfections in Direct Conversion I-Q Modulators. 269-272 - Eric A. M. Klumperink, Rameswor Shrestha, Eisse Mensink, Gerard Wienk, Zhiyu Ru, Bram Nauta:
Multipath Polyphase Circuits and their Application to RF Transceivers. 273-276 - Kutluyil Dogancay:
Adaptive Pre-Distortion of Nonlinear Systems Using Out-of-Band Energy Minimization. 277-280 - Jie Dong, King Ngi Ngan
A Universal Approach to Developing Fast Algorithm for Simplified Order-16 ICT. 281-284 - Jiancong Luo, Yu Sun, Ishfaq Ahmad:
A PD Feed-back Rate Control Algorithm for Multiple Video Object Coding. 285-288 - Jianpeng Dong, Nam Ling:
On Model Parameter Estimation for H.264/AVC Rate Control. 289-292 - Jun Zhang, Xiaoquan Yi, Nam Ling, Weijia Shang:
Chroma Coding Efficiency Improvement with Context Adaptive Lagrange Multiplier (CALM). 293-296 - Jing-Yu Yang, Wenli Xu, Qionghai Dai, Yao Wang:
Image Compression using 2D Dual-tree Discrete Wavelet Transform (DDWT). 297-300 - Philippe Artillan, Bruno Estibals, Alain Salles, Jean Abboud, Pierre Aloisi, Corinne Alonso:
A PEEC approach for circular spiral inductive components modeling. 301-304 - Feng Luo, Dongsheng Ma:
An Integrated Switching Power Converter with a Hybrid Pulse-Train/PWM Control. 305-308 - Vincent Binet, Yvon Savaria, Michel Meunier
Modeling the Substrate Noise Injected by a DC-DC Converter. 309-312 - Bharath Balaji Kannan, Khai D. T. Ngo:
Digital Inverse Timing Generator with Wide Dynamic Range. 313-316 - Alessandro Cabrini, Laura Gobbi, Guido Torelli:
Design of Maximum-Efficiency Integrated Voltage Doubler. 317-320 - Ming Yin, Maysam Ghovanloo:
A Low-Noise Preamplifier with Adjustable Gain and Bandwidth for Biopotential Recording Applications. 321-324 - Jim A. Simpson, Maysam Ghovanloo:
An Experimental Study of Voltage, Current, and Charge Controlled Stimulation Front-End Circuitry. 325-328 - AbdEl-Monem M. El-Sharkawy
A New RF Radiometer for Absolute Noninvasive Temperature Sensing in Biomedical Applications. 329-332 - Chae-Ryung Kim, Yu-Ri Kang, Young-Jae Min, Soo-Won Kim:
A 2.5-V 4-µW Low-Power Delta-Sigma Modulator for Implantable Cardiac Pacemaker with Periodic Bias Current Reduction Technique. 333-336 - Chiu-Hsien Chan, Jack Wills, Jeff LaCoss, John J. Granacki, John Choma Jr.:
A Novel Variable-Gain Micro-Power Band-Pass Auto-Zeroing CMOS Amplifier. 337-340 - Huimin Chen, Dimitrios Charalampidis:
Fast Basis Selection and Instantaneous Frequency Tracking for Audio Signal Analysis and Synthesis. 341-344 - Talieh Seyed Tabatabaei, Sridhar Krishnan, Aziz Guergachi:
Emotion Recognition Using Novel Speech Signal Features. 345-348 - Shaikh Anowarul Fattah, Wei-Ping Zhu
An Identification Technique for Noisy ARMA Systems in Correlation Domain. 349-352 - Zohra Yermeche, Benny Sallberg, Nedelko Grbic, Ingvar Claesson:
Real-Time DSP Implementation of a Subband Beamforming Algorithm for Dual Microphone Speech Enhancement. 353-356 - Jae Hee Han, Myung Hoon Sunwoo, Jong Ha Moon:
Novel Non-linear Inverse Quantization Algorithm and its Architecture for Digital Audio Codecs. 357-360 - Teijo Lehtonen, Pasi Liljeberg, Juha Plosila:
Fault Tolerance Analysis of NoC Architectures. 361-364 - Costas Argyrides, Hamid R. Zarandi, Dhiraj K. Pradhan:
Multiple Upsets Tolerance in SRAM Memory. 365-368 - Themistoklis Prodromakis
A Miniaturized Delay Line based on Slow-Wave Substrates. 369-372 - Wai-Chi Fang, Sharon Kedar:
Gigascale System Design of Sensor Networks for Active Volcanoes. 373-376 - Pier Paolo Civalleri, Marco Gilli, Michele Bonnin:
Open Two-State Quantum Systems Solved by Harmonic Balance. 377-380 - Sumit D. Mediratta, Jeffrey T. Draper:
Characterization of a Fault-tolerant NoC Router. 381-384 - Shyue-Wen Yang, Ming-Hwa Sheu, Chun-Kai Yeh, Chih-Yuen Wen, Chih-Chieh Lin, Wen-Kai Tsai:
Fast Fair Crossbar Scheduler for On-chip Router. 385-388 - César A. M. Marcon
Evaluation of Algorithms for Low Energy Mapping onto NoCs. 389-392 - Paul-Peter Sotiriadis:
An Information Theory Approach to Power - Optimal Trafic Routing in Networks on Chips. 393-396 - Ik-Jae Chun, Tae Moon Roh, Bo-Gwan Kim:
Binary-Truncated CDMA-Based On-Chip Network. 397-400 - Minoru Watanabe, Fuminori Kobayashi:
Holographic memory reconfigurable VLSI. 401-404 - Christophe Layer
Area and Throughput Aware Comparator Networks Optimization for Parallel Data Processing on FPGA. 405-408 - Shin-Kai Chen, Bing-Shiun Wang, Tay-Jyi Lin, Chih-Wei Liu:
Rapid C to FPGA Prototyping with Multithreaded Emulation Engine. 409-412 - Christian Genz, Rolf Drechsler, Gerhard Angst, Lothar Linhard:
Visualization of SystemC Designs. 413-416 - Sayed Hafizur Rahman, Asif Iqbal Ahmed, Otmane Aït Mohamed:
Analysis and Performance Evaluation of a Digital Carrier Synchronizer for Modem Applications. 417-420 - Andrea Gerosa
A 0.18-µm CMOS Squarer Circuit for a Non-Coherent UWB Receiver. 421-424 - Yu-Tso Lin, Tao Wang, Shey-Shi Lu:
A Fully Integrated Concurrent Dual-Band Low Noise Amplifier with Suspended Inductors in SiGe 0.35µm BiCMOS Technology. 425-428 - Rangakrishnan Srinivasan, Didem Zeliha Turker, Sang Wook Park, Edgar Sánchez-Sinencio:
A Low-Power Frequency Synthesizer with Quadrature Signal Generation for 2.4 GHz Zigbee Transceiver Applications. 429-432 - Saeed Sarhangian, Seyed Mojtaba Atarodi
A Low-Power CMOS Low-IF Receiver Front-End for 2450-MHz Band IEEE 802.15.4 ZigBee Standard. 433-436 - Zhujin Zhou, Ning Li, Wei Li, Junyan Ren:
A Power-Optimized CMOS Quadrature VCO with Wide-Tuning Range for UWB Receivers. 437-440 - Heinz Koeppl:
The Composition Rule for Multivariate Volterra Operators and its Application to Circuit Analysis. 441-444 - Kofi M. Odame, Christopher M. Twigg, Arindam Basu
Studying Nonlinear Dynamical Systems on a Reconfigurable Analog Platform. 445-448 - Guoji Zhu, Ajoy Opal:
Per-Element Decompostion in Distortion Analysis. 449-452 - Wai Man Tam, Francis Chung-Ming Lau
Modeling the Telephone Call Network. 453-456 - Andrew Buschmeier, Douglas Frey:
Novel Analysis of Phase Noise in Oscillators. 457-460 - Belén Calvo, Santiago Celma, Maria Teresa Sanz, Juan Pablo Alegre:
Low-Voltage Linearly Tunable CMOS Transconductor with Common-Mode Feedforward. 461-464 - Burak Kelleci
THD+Noise Estimation in Class-D Amplifiers. 465-468 - Gianluca Giustolisi:
Two-Stage OTA Design Based on Settling-Time Constraints. 469-472 - Ramón González Carvajal, Juan Antonio Gómez Galán
A Very Linear OTA with V-I Conversion based on Quasi-Floating MOS Resistor. 473-476 - Tongyu Song, Shouli Yan:
A Robust Rail-to-Rail Input Stage with Constant-gm and Constant Slew Rate Using a Novel Level Shifter. 477-480 - Zhenyong Zhang, Gabor C. Temes:
A Segmented Data-Weighted-Averaging Technique. 481-484 - Yi Tang, Subhanshu Gupta, Jeyanandh Paramesh, David J. Allstot:
A Digital-Summing Feedforward Sigma-Delta Modulator and its Application to a Cascade ADC. 485-488 - Long-Xi Chang, Day-Uei Li, Chi-Chen Chung, Tim-Kuei Shia:
A 0.9mA 95dB Sigma Delta Modulator for Digital RF Hearing Aid in 0.35µm CMOS. 489-492 - Sudhakar Pamarti:
A Theoretical Analysis of Split Delta-Sigma ADCs. 493-496 - Philip M. Chopp, Anas A. Hamoui:
Discrete-Time Modeling of Clock Jitter in Continuous-Time Delta Sigma Modulators. 497-500 - Florin Constantinescu, Angelo Brambilla
Algorithmic aspects in RF Circuit Simulation. 501-504 - Thomas J. Brazil:
Nonlinear, Transient Simulation of Distributed RF Circuits using Discrete-Time Convolution. 505-508 - Hans Georg Brachtendorf, Angelika Bunse-Gerstner, Barbara Lang, Rainer Laur:
An inverse method of characteristics for analyzing circuits with widely separated time-scales. 509-512 - Alper Demir:
Noise Analysis Problems and Techniques for RF Electronic Circuits and Optical Fiber Communication Systems. 513-516 - Mihai Iordache, Lucia Dumitriu:
Multi-Time Method Based on State Equations for RF Circuit Analysis. 517-520 - Jingjing Fu, Bing Zeng:
A Comparative Study of Compensation Techniques in Directional DCT's. 521-524 - Takeshi Kumaki, Tetsushi Koide, Hans Jürgen Mattausch, Yasuto Kuroda, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito:
Efficient Vertical/Horizontal-Space 1D-DCT Processing Based on Massive-Parallel Matrix-Processing Engine. 525-528 - Qiang Hao, Xiangyang Ji, Qingming Huang, Debin Zhao, Wen Gao, Xilin Chen:
Macroblock-level Reduced Resolution Video Coding Allowing Adaptive DCT Coefficients Selection. 529-532 - Honggang Qi, Wen Gao:
High-Accuracy and Low-Complexity Fixed-Point Inverse Discrete Cosine Transform Based on AAN's Fast Algortihm. 533-536 - Li Zhang, Wen Gao, Qiang Wang, Debin Zhao:
Macroblock-Level Adaptive Scan Scheme for Discrete Cosine Transform Coefficients. 537-540 - Tadashi Suetsugu
Output Characteristics of Class E Amplifier With Nonlinear Shunt Capacitance Versus Supply Voltage. 541-544 - Hsin-Hsin Ho, Ke-Horng Chen
Dynamic Droop Scaling for Improving Current Sharing Performance in a System with Multiple Supplies. 545-548 - Neeraj Keskar, Gabriel A. Rincón-Mora:
Designing an Accurate and Robust LC-Compliant Asynchronous Sigma Delta Boost DC-DC Converter. 549-552 - Hirotaka Koizumi, Kosuke Kurokawa:
Class DE Inverter with Asymmetric Shunt Capacitors. 553-556 - Hong Chen, Chen Jia, Chun Zhang, Zhihua Wang, Chunsheng Liu:
Power Harvesting With PZT Ceramics. 557-560 - Robert Rieger
Design Strategies for Multi-Channel Low-Noise Recording Systems. 561-564 - Craig Hyatt:
Wireless Stimulus-Reflex Detection for Neonatal Monitoring. 565-568 - Xiang Fang, Jack Wills, John J. Granacki, Jeff LaCoss, Artak Arakelian, James D. Weiland:
Novel Charge-Metering Stimulus Amplifier for Biomimetic Implantable Prosthesis. 569-572 - Maurits Ortmanns:
Charge Balancing in Functional Electrical Stimulators: A Comparative Study. 573-576 - Cheng Chih Liu:
A 70dB Gain Low-Power Band-Pass Amplifier for Bio-Signals Sensing Applications. 577-580 - Chao Wu, Wei-Ping Zhu, M. N. S. Swamy:
A Class of Cosine-Modulated Filter Banks with Multiple Prototype Filters. 581-584 - Ha Hoang Kha
Design of Cosine-Modulated Pseudo-QMF Banks Using Semidefinite Programming Relaxation. 585-588 - Thushara K. Gunaratne, Leonard T. Bruton:
Beamforming of Temporally-Broadband-Bandpass Plane Waves using Real Polyphase 2-D FIR Trapezoidal Filters. 589-592 - Ligang Wu, James Lam, Wojciech Paszke
Filtering of Discrete Linear Repetitive Processes with H and l2-l Performance. 593-596 - Zhiping Lin, Li Xu, Yoshihisa Anazawa:
Revisiting the Absolutely Minimal Realization for Two-dimensional Digital Filters. 597-600 - Bertram Emil Shi
Sensor Integration in Autonomous Systems. 601-604 - Timothy K. Horiuchi
A Systems View of a Neuromorphic VLSI Echolocation System. 605-608 - Paolo Arena, Luigi Fortuna, Mattia Frasca, Luca Patané, C. Sala:
Integrating high-level sensor features via STDP for bio-inspired navigation. 609-612 - Francesco Tenore, R. Jacob Vogelstein
Sensor-based Dynamic Control of the Central Pattern Generator for Locomotion. 613-616 - Balázs Gergely Soós, Csaba Rekeczky:
Elastic Grid Based Analysis of Motion Field for Object-Motion Detection in Airborne Video Flows. 617-620 - Abinash Roy, Noha H. Mahmoud, Masud H. Chowdhury:
Delay and Clock Skew Variation due to Coupling Capacitance and Inductance. 621-624 - Himanshu Thapliyal
Design of Reversible Sequential Elements With Feasibility of Transistor Implementation. 625-628 - Syed Rafay Hasan, Yvon Savaria:
Crosstalk Effects in Event-Driven Self-Timed Circuits Designed With 90nm CMOS Technology. 629-632 - Bill Pontikakis, Hung Tien Bui, François R. Boyer, Yvon Savaria:
A Low-Complexity High-Speed Clock Generator for Dynamic Frequency Scaling of FPGA and Standard-Cell Based Designs. 633-636 - Omid Sarbishei, Mohammad Maymandi-Nejad:
Power-Delay Efficient Overlap-Based Charge-Sharing Free Pseudo-Dynamic D Flip-Flops. 637-640 - Jonathan Rosenfeld, Eby G. Friedman:
Quasi-Resonant Interconnects: A Low Power Design Methodology. 641-644 - Sherif A. Tawfik, Volkan Kursun
Low-Power Low-Voltage Hot-Spot Tolerant Clocking with Suppressed Skew. 645-648 - Ethiopia Nigussie, Juha Plosila, Jouni Isoaho
Current Mode On-Chip Interconnect using Level-Encoded Two-Phase Dual-Rail Encoding. 649-652 - Mehboob Alam
Wavelet-Based Interpolation Point Selection for Multi-Shifted Arnoldi. 653-656 - Xiongfei Meng, Karim Arabi, Resve A. Saleh:
A Novel Active Decoupling Capacitor Design in 90nm CMOS. 657-660 - P. P. Vaidyanathan:
On the degree of MIMO systems. 661-664 - Se-Hyeon Kang, In-Cheol Park
High Speed Sphere Decoding Based on Vertically Incremental Computation. 665-668 - Omid Oliaei:
Beamforming MIMO Receiver with Reduced Hardware Complexity. 669-672 - Andreas Burg
VLSI Implementation of a Lattice-Reduction Algorithm for Multi-Antenna Broadcast Precoding. 673-676 - Wen-Chih Kan, Gerald E. Sobelman:
MIMO Transceiver Design Based on a Modified Geometric Mean Decomposition. 677-680 - Hsuan-Yu Marcus Pan, Lawrence E. Larson:
Improved Dynamic Model of Fast-Settling Linear-in-dB Automatic Gain Control Circuit. 681-684 - Martin Di Federico, Pedro Julián, Tomaso Poggi
A Simplicial PWL Integrated Circuit Realization. 685-688 - Jaime Ramírez-Angulo, Raghavender Chintham, Antonio J. López-Martín
Class AB Pseudo-Differential CMOS Squarer Circuit. 689-692 - Tommaso Addabbo, Massimo Alioto, Ada Fort, Santina Rocchi, Valerio Vignoli:
Maximum-Period PRNGs Derived From A Piecewise Linear One-Dimensional Map. 693-696 - Simin Yu
From n-scroll to n-scroll attractors: A general structure based on Chua's circuit framework. 697-700 - Tong Ge, Joseph Sylvester Chang, Wei Shu:
Power Supply Noise in Bang-Bang Control Class D Amplifier. 701-704 - S. Alireza Zabihian, Reza Lotfi:
Ultra-Low-Voltage, Low-Power, High-Speed Operational Amplifiers Using Body-Driven Gain-Boosting Technique. 705-708 - Rahul Singh, Yves Audet, Yves Gagnon, Yvon Savaria:
Integrated Circuit Trimming Technique for Offset Reduction in a Precision CMOS Amplifier. 709-712 - Hsuan-Yu Marcus Pan, Lawrence E. Larson:
Highly Linear Bipolar Transconductor For Broadband High-Frequency Applications with Improved Input Voltage Swing. 713-716 - Behnam Sedighi, Mehrdad Sharif Bakhtiar:
A New High-Speed Class-AB Current-Mode Circuit. 717-720 - Matthias Keller, Alexander Buhmann, Maurits Ortmanns, Yiannos Manoli:
On the Implicit Anti-Aliasing Feature of Continuous-Time Multistage Noise-Shaping Sigma-Delta Modulators. 721-724 - Alonso Morgado, Rocío del Río, José M. de la Rosa:
Design of a 130-nm CMOS Reconfigurable Cascade Sigma Delta Modulator for GSM/UMTS/Bluetooth. 725-728 - Jaswinder Lota, Mohammed Al-Janabi, Izzet Kale:
Tonality Index of Sigma-Delta Modulators : A Psychoacoustics Model Based Approach. 729-732 - Sunwoo Kwon, Un-Ku Moon:
A High-Speed Delta-Sigma Modulator with Relaxed DEM Timing Requirement. 733-736 - Ling Yuan, Weining Ni, Yin Shi, Foster F. Dai:
A 10-bit 2GHz Current-Steering CMOS D/A Converter. 737-740 - Behzad Razavi:
Design Considerations for Future RF Circuits. 741-744 - Mihai A. T. Sanduleanu, Maja Vidojkovic, Vojkan Vidojkovic, Arthur H. M. van Roermund, Aleksandar Tasic:
Receiver Front-End Circuits for Future Generations of Wireless Communications. 745-748 - Vaibhav Maheshwari, Wouter A. Serdijn, John R. Long:
Companding Baseband Switched Capacitor Filters and ADCs for WLAN Applications. 749-752 - Lawrence E. Larson, Peter M. Asbeck, Donald F. Kimball:
Multifunctional RF Transmitters for Next Generation Wireless Transceivers. 753-756 - John F. M. Gerrits, John R. Farserotu, John R. Long:
Low-Complexity Ultra Wideband Communications. 757-760 - Jer-Min Hsiao, Chun-Jen Tsai:
Analysis of an SOC Architecture for MPEG Reconfigurable Video Coding Framework. 761-764 - Jae-Sung Yoon, Chang-Hyo Yu, Donghyun Kim, Lee-Sup Kim:
Triangle-Level Depth Filter Method for Bandwidth Reduction in 3D Graphics Hardware. 765-768 - Ulf Ochsenfahrt, Ralf Salomon:
CREMA: A Parallel Hardware Raytracing Machine. 769-772 - Li-Chuan Chang, Yen-Sung Chen, Rung-Wen Liou, Chih-Hung Kuo, Chia-Hung Yeh, Bin-Da Liu:
A Real Time and Low Cost Hardware Architecture for Video Abstraction System. 773-776 - Peilin Liu, Lingzhi Liu, Ning Deng, Xuan Fu, Jiayan Liu, Qianru Liu, Guocheng Zhang, Bin He:
VLSI Implementation for Portable Application Oriented MPEG-4 Audio Codec. 777-780 - Wisam Al-Hoor, Jaber A. Abu-Qahouq, Lilly Huang, Issa Batarseh:
Adaptive Variable Switching Frequency Digital Controller Algorithm to Optimize Efficiency. 781-784 - Huan-Jen Yang, Ke-Horng Chen
Feed-Forward Pulse Width Modulation for High Line Regulation Buck or Boost Converters. 785-788 - Yuki Ishikawa, Toshimichi Saito:
Bifurcation of multiple-input parallel dc-dc converters with dynamic winner-take-all switching. 789-792 - Ali Davoudi, Juri Jatskevich, Patrick L. Chapman:
Computer-Aided Average-Value Modeling of Fourth-Order PWM DC-DC Converters. 793-796 - Dong Dai, Shengnan Li, Xikui Ma, Chi K. Michael Tse:
Hopf-Type Intermediate-Scale Bifurcation in Single-Stage Power-Factor-Correction Power Supplies. 797-800 - Suresh Atluri, Maysam Ghovanloo:
Incorporating Back Telemetry in a Full-Wave CMOS Rectifier for RFID and Biomedical Applications. 801-804 - Donghwi Kim, Ridha Kamoua, Milutin Stanacevic:
Low-Power Low-Noise Neural Amplifier in 0.18µm FD-SOI Technology. 805-808 - Marc Simon Wegmueller, Martin Hediger, Thomas Kaufmann, Felix Bürgin, Wolfgang Fichtner:
Wireless Implant Communications for Biomedical Monitoring Sensor Network. 809-812 - Terence Tam, Graham A. Jullien, Orly Yadid-Pecht:
A CMOS Contact Imager for Cell Detection in Bio-Sensing Applications. 813-816 - Edward K. F. Lee, Anthony Lam:
A Matching Technique for Biphasic Stimulation Pulse. 817-820 - Hoda Mohammadzade, Leonard T. Bruton:
A Simultaneous Div-Curl 2D Clifford Fourier Transform Filter for Enhancing Vortices, Sinks and Sources in Sampled 2D Vector Field Images. 821-824 - Magdy T. Hanna
Direct Batch Evaluation of Desirable Eigenvectors of the DFT Matrix by Constrained Optimization. 825-828 - Da-Zheng Feng, Wei Xing Zheng:
An Efficient Identification Algorithm for FIR Filtering with Noisy Data. 829-832 - Z. G. Zhang, S. C. Chan, V. W. Zhang, Bradley McPherson:
A New Minimum Variance Spectral Estimation Method for Analyzing Click-Evoked Otoacoustic Emissions. 833-836 - Hee Ju Park, Kyung Bum Kim, Jeong Hun Kim, Suki Kim:
A novel motion detection pointing device Using a binary CMOS image sensor. 837-840 - Rafael Serrano-Gotarredona, Teresa Serrano-Gotarredona, Antonio Acosta-Jimenez, Alejandro Linares-Barranco, Gabriel Jiménez-Moreno, Antón Civit Balcells
Spike Events Processing for Vision Systems. 841-844 - Tobi Delbrück
Fast sensory motor control based on event-based hybrid neuromorphic-procedural system. 845-848 - Eugenio Culurciello, Joon Hyuk Park, Andreas Savvides:
Address-Event Video Streaming over Wireless Sensor Networks. 849-852 - Matthias Oster, Rodney J. Douglas, Shih-Chii Liu:
Quantifying Input and Output Spike Statistics of a Winner-Take-All Network in a Vision System. 853-856 - Hans Kristian Otnes Berge, Philipp Häfliger
High-Speed Serial AER on FPGA. 857-860 - Massimo Alioto, Massimo Poli, Santina Rocchi, Valerio Vignoli:
Mixed Techniques to Protect Precharged Busses against Differential Power Analysis Attacks. 861-864 - Amit Kedia, Resve A. Saleh:
Power Reduction of On-Chip Serial Links. 865-868 - Jhao-Ji Ye, You-Gang Chen, I-Chyn Wey, An-Yeu Wu:
Low-Latency Quasi-Synchronous Transmission Technique for Multiple-Clock-Domain IP Modules. 869-872 - Yana Esteves Krasteva, Eduardo de la Torre, Teresa Riesgo:
Reconfigurable Heterogeneous Communications and Core Reallocation for Dynamic HW Task Management. 873-876 - Atanu Chattopadhyay, Zeljko Zilic:
Reconfigurable Clock Distribution Circuitry. 877-880 - José C. García, Juan A. Montiel-Nelson, Saeid Nooshabadi:
Adaptive Low/High Voltage Swing CMOS Driver for On-Chip Interconnects. 881-884 - Abinash Roy, Masud H. Chowdhury:
Global Interconnect Optimization in the Presence of On-chip Inductance. 885-888 - Hirokazu Tohya, Noritaka Toya:
A Novel Design Methodology of the On-Chip Power Distribution Network Enhancing the Performance and Suppressing EMI of the SoC. 889-892 - Javier Castro-Ramirez, Pilar Parra Fernández
Asymmetric clock driver for improved power and noise performances. 893-896 - Mosin Mondal, Sami Kirolos, Yehia Massoud:
Estimation of Capacitive Crosstalk-Induced Short-Circuit Energy. 897-900 - Seungbeom Lee, Hanho Lee, Jongyoon Shin, Je-Soo Ko:
A High-Speed Pipelined Degree-Computationless Modified Euclidean Algorithm Architecture for Reed-Solomon Decoders. 901-904 - Jaehyun Baek, Myung Hoon Sunwoo:
Simplified Degree Computationless Modified Euclid's Algorithm and its Architecture. 905-908 - Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel:
Towards Gb/s turbo decoding of product code onto an FPGA device. 909-912 - Tzu-Chieh Kuo, Alan N. Willson Jr.:
Low-latency Memory-efficient 150-Mbps Turbo FEC Encoder and Decoder. 913-916 - Zhiqiang Cui, Zhongfeng Wang:
Efficient Message Passing Architecture for High Throughput LDPC Decoder. 917-920 - Kofi M. Odame, Paul E. Hasler:
An Efficient Oscillator Design Based on OTA Nonlinearity. 921-924 - Manuel Domínguez Pumar
Application of Pulsed Digital Oscillators in 'reverse mode' to eliminate undesired vibrations in high-Q MEMS resonators. 925-928 - Junhong Zhao, Chunyan Wang:
CMOS Current-controlled Oscillators. 929-932 - Mostafa Savadi Oskooei, Ali Afzali-Kusha, Seyed Mojtaba Atarodi
A High-Speed and Low-Power Voltage Controlled Oscillator in 0.18-µm CMOS Process. 933-936 - Shaohua Wang, Jinguo Quan, Rong Luo, Hao Cheng, Huazhong Yang:
A Noise Reduced Digitally Controlled Oscillator Using Complementary Varactor Pairs. 937-940 - Ivan Padilla
Highly Linear V/I Converter with Programmable Current Mirrors. 941-944 - Hayg Dabag, Dongwon Seo, Manu Mishra, Josef Hausner:
Electrical Stress-free High Gain and High Swing Analog Buffer Using an Adaptive Biasing Scheme. 945-948 - Tiejun Cao, Hung P. Hoang, Beth O. Woods, H. Alan Mantooth:
A SiGe BiCMOS Variable Gain Amplifier for Cryogenic Temperature Applications. 949-952 - Albert Chow, Hae-Seung Lee:
Transient Noise Analysis for Comparator-Based Switched-Capacitor Circuits. 953-956 - Arindam Basu
A Fully Integrated Architecture for Fast Programming of Floating Gates. 957-960 - Bo Geng, Hong Lu, Xiangyang Xue:
Incremetal Spatio-Temporal Feature Extraction and Retrieval for Large Video Database. 961-964 - Cenk Demiroglu, David V. Anderson, Mark A. Clements:
A Missing Data-based Feature Fusion Strategy for Noise-Robust Automatic Speech Recognition Using Noisy Sensors. 965-968 - Ming-Hsu Cheng, Meng-Fen Ho, Chung-Lin Huang:
Gait Analysis for Human Identification through Manifold Learning and HMM. 969-972 - Kwanwoong Song, Taeyoung Chung, Chang-Su Kim
Efficient Multi-Hypothesis Error Concealment Technique for H.264. 973-976 - Yifeng He, Ivan Lee, Ling Guan:
Optimized multi-path routing using dual decomposition for wireless video streaming. 977-980 - Dionisis Athanasopoulos, Thanos Stouraitis:
Content-Adaptive Wavelet-Based Scalable Video Coding. 981-984 - Shing-Chow Chan, Zhi-Feng Gan, Heung-Yeung Shum:
An Object-based Approach to Plenoptic Video Processing. 985-988 - Quqing Chen, Zhengang Nie, Zhibo Chen, Xiaodong Gu, Guoping Qiu
A Human Vision System based Flash Picture Coding Method for Video Coding. 989-992 - Jong Dae Oh, Siwei Ma
Disparity Estimation and Virtual View Synthesis from Stereo Video. 993-996 - Yanwei Liu, Qingming Huang, Debin Zhao, Wen Gao:
Low-delay View Random Access for Multi-view Video Coding. 997-1000 - Pei-Kuei Tsung, Li-Fu Ding, Wei-Yin Chen, Shao-Yi Chien, Tung-Chien Chen, Liang-Gee Chen:
System Bandwidth Analysis of Multiview Video Coding with Precedence Constraint. 1001-1004 - Huanxin Guan, Huaguang Zhang, Zhanshan Wang, Derong Liu
Global Asymptotic Stability of Recurrent Neural Networks with Time Varying Delays. 1005-1008 - Mohammed A. Hasan:
Upper-Triangulization of Non-Symmetric Matrices Using Sanger's Type Learning Systems. 1009-1012 - Aderinto J. Ogunniyi, Stanley L. Henriquez, Caroline W. Karangu, Corey Dickens, Carl White:
Accurate Modeling of Drain Current Derivatives of MESFET/HEMT Devices for Intermodulation Analysis. 1013-1016 - George Jie Yuan, Ning Song, Nabil H. Farhat, Jan Van der Spiegel:
Cort-X II: low power element design of a large-scale spatio-temporal pattern clustering system. 1017-1020 - Giuseppe Acciani, Gioacchino Brunetti, Girolamo Fornarelli:
Automatic Detection of Solder Joint Defects on Integrated Circuits. 1021-1024 - Tsukasa Sone, Toshinori Yamada:
Minimum-Cost Load Balancing Document Distribution in Distributed Web Server Systems. 1025-1028 - Ming Cao
Topology design for fast convergence of network consensus algorithms. 1029-1032 - Christopher Jenkins, Jayawant Kakade, Dimitri Kagaris:
Cellular Automata with Large Channel Separations. 1033-1036 - Awni Itradat, M. Omair Ahmad, Ali M. Shatnawi:
Architectural Synthesis of DSP Applications with Dynamically Reconfigurable Functional Units. 1037-1040 - Shyam Subramanian, David V. Anderson:
2-MITE Product-of-Power-Law Networks. 1041-1044 - Kunihiro Fujiyoshi, Hidenori Kawai, Keisuke Ishihara:
DTS: A Tree Based Representation for 3D-Block Packing. 1045-1048 - Wai-Chung Tang, Wing-Hang Lo, Yu-Liang Wu:
Further Improve Excellent Graph-Based FPGA Technology Mapping by Rewiring. 1049-1052 - Shilpa Bhoj, Dinesh Bhatia
Thermal Modeling and Temperature Driven Placement for FPGAs. 1053-1056 - Laleh Behjat
Two Clustering Preprocessing Techniques for Large-Scale Circuits. 1057-1060 - Karthik Duraisami, Prassanna Sithambaram, Ashoka Visweswara Sathanur, Alberto Macii
Design Exploration of a Thermal Management Unit for Dynamic Control of Temperature-Induced Clock Skew. 1061-1064 - Ali Shahabi, Nima Honarmand, Zainalabedin Navabi:
Programmable Routing Tables for Degradable Torus-Based Networks on Chips. 1065-1068 - Ashesh Rastogi, Kunal P. Ganeshpure, Sandip Kundu:
A Study on Impact of Leakage Current on Dynamic Power. 1069-1072 - Igor Vytyaz, David C. Lee, Suihua Lu, Amit Mehrotra, Un-Ku Moon, Kartikeya Mayaram:
Periodic Steady-State Analysis of Oscillators with a Specified Oscillation Frequency. 1073-1076 - Xinjie Wei, Yici Cai, Xianlong Hong:
Effective Acceleration of Iterative Slack Distribution Process. 1077-1080 - Vibhuti B. Dave, Erdal Oruklu, Jafar Saniie:
Design and Synthesis of a Three Input Flagged Prefix Adder. 1081-1084 - Himanshu Thapliyal
Designing Efficient Online Testable Reversible Adders With New Reversible Gate. 1085-1088 - John Moskal, Erdal Oruklu, Jafar Saniie:
Design and Synthesis of a Carry-Free Signed-Digit Decimal Adder. 1089-1092 - Jong-Suk Lee, Dong Sam Ha:
High Speed 1-bit Bypass Adder Design for Low Precision Additions. 1093-1096 - Oscar Gustafsson
A Difference Based Adder Graph Heuristic for Multiple Constant Multiplication Problems. 1097-1100 - Hugo Hedberg, Fredrik Kristensen, Viktor Öwall:
Implementation of a Labeling Algorithm based on Contour Tracing with Feature Extraction. 1101-1104 - Chia-Liang Tsai, Shao-Yi Chien:
Flexible and Cost Effective Transport Stream Processor for DTV. 1105-1108 - Muhammad Bilal, Shahid Masud:
Efficient Color Space Conversion using Custom Instruction in a RISC Processor. 1109-1112 - Chih-Hao Chao, Yen-Lin Kuo, An-Yeu Wu, Weber Chien:
A Power-Aware Reconfigurable Rendering Engine Design with 453MPixels/s, 16.4MTriangles/s Performance. 1113-1116 - Ullas Pazhayaveetil, Dhruba Chandra, Paul D. Franzon
Flexible Low Power Probability Density Estimation Unit For Speech Recognition. 1117-1120 - Ming-Dou Ker, Hung-Tai Liao:
Design of Mixed-Voltage Crystal Oscillator Circuit in Low-Voltage CMOS Technology. 1121-1124 - Boyan Semerdjiev, Dimitrios Velenis:
Efficient Insertion of Crosstalk Shielding along On-Chip Interconnect Trees. 1125-1128 - Chittarsu Raghunandan, K. S. Sainarayanan, M. B. Srinivas:
Area Efficient Bus Encoding Technique for Minimizing Simultaneous Switching Noise (SSN). 1129-1132 - Ming-Hong Lai, Chia-Chi Chu, Wu-Shiung Feng:
Applications of AOGL Model-Order Reduction Techniques in Interconnect Analysis. 1133-1136 - Ming-Hung Chang, Zong-Xi Yang, Wei Hwang:
A 1.9mW Portable ADPLL-based Frequency Synthesizer for High Speed Clock Generation. 1137-1140 - Vishwanadh Tirumalashetty, Hamid Mahmoodi:
Clock Gating and Negative Edge Triggering for Energy Recovery Clock. 1141-1144 - Yaseer Arafat Durrani, Ana Abril, Teresa Riesgo:
Efficient Power Macromodeling Technique for IP-Based Digital System. 1145-1148 - Yong-Bin Kim, Kyung Ki Kim, James T. Doyle:
A CMOS Low Power Fully Digital Adaptive Power Delivery System Based on Finite State Machine Control. 1149-1152 - Hiran Ramakrishnan, Koushik Maharatna, Sanatan Chattopadhyay, Alexandre Yakovlev:
Impact of strain on the design of low-power high-speed circuits. 1153-1156 - Lih-Yih Chiou, Shien-Chun Luo:
An Energy-Efficient Dual-Edge Triggered Level-Converting Flip-Flop. 1157-1160 - Kyung Ki Kim, Yong-Bin Kim:
Optimal Body Biasing for Minimum Leakage Power in Standby Mode. 1161-1164 - Xiaodong Zhang, Magdy A. Bayoumi:
A Low Power 4-bit Interleaved Burst Sampling ADC for Sub-GHz Impulse UWB Radio. 1165-1168 - Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang:
A Low Energy FFT/IFFT Processor for Hearing Aids. 1169-1172 - Bo Fu, Paul Ampadu:
Comparative Analysis of Ultra-Low Voltage Flip-Flops for Energy Efficiency. 1173-1176 - Péter Földesy, Ákos Zarándy, Csaba Rekeczky, Tamás Roska:
High performance processor array for image processing. 1177-1180 - Poramate Manoonpong, Tao Geng, Bernd Porr, Florentin Wörgötter:
The RunBot Architecture for Adaptive, Fast, Dynamic Walking. 1181-1184 - Yu M. Chi, Paul Carpenter, Kent Colling, Gert Cauwenberghs
ISCAS Special Session Demo: Wireless Video Sensor for Ad-hoc Networks. 1185 - John V. Arthur, Kwabena Boahen:
Silicon Neurons that Inhibit to Synchronize. 1186 - Christopher M. Twigg, Paul E. Hasler, I. Faik Baskaya:
A Self-Contained Large-Scale FPAA Development Platform. 1187-1191 - Alejandro Linares-Barranco, Francisco Gomez-Rodriguez
Using FPGA for visuo-motor control with a silicon retina and a humanoid robot. 1192-1195 - Christoph Posch
Wide dynamic range, high-speed machine vision with a 2×256 pixel temporal contrast vision sensor. 1196-1199 - Pierre-François Ruedi, Eric Grenet, Felix Lustenberger:
Battery powered high dynamic range vision system. 1200 - Francisco Gomez-Rodriguez, Alejandro Linares-Barranco
AER Auditory Filtering and CPG for Robot Control. 1201-1204 - Pujitha Weerakoon, Kate Klemic, Fred J. Sigworth, Eugenio Culurciello:
An Integrated Patch-Clamp Amplifier for High-Density Whole-Cell Recordings. 1205-1208 - Felix Lustenberger, David Beyeler, Edo Franzi, Peter Seitz, Thierry Zamofing:
A Universal Method for Hierarchical Object Recognition based on Low-Power Vision Sensors. 1209 - Håkon A. Hjortland
Thresholded samplers for UWB impulse radar. 1210-1213 - Amanda Jimenez-Marrufo, Ainhoa Mendizabal, Sergio Morillas-Castillo, Rafael Domínguez-Castro, Servando Espejo-Meana, Rafael Romay-Juarez, Ángel Rodríguez-Vázquez:
Data Matrix Code Recognition Using the Eye-RIS Vision System. 1214 - Xicai Yue, Emmanuel M. Drakakis, Hua Ye, Mayasari Lim, Athanasios Mantalaris, Nicki Panoskaltsis, Anna Radomska, Chris Toumazou, T. Cass:
An On-line, Multi-Parametric, Multi-Channel Physicochemical Monitoring Platform for Stem Cell Culture Bioprocessing. 1215-1218 - Julius Georgiou, Timothy G. Constandinou
A Micropower Cochlear Prosthesis System Demonstrator. 1219 - Yifeng Qiu, Wael M. Badawy
A Prototyping Co-design Platform with A Simplified Architecture for Video Codec Implementation. 1220-1224 - Yongjian Tang, Hans Hegt, Arthur H. M. van Roermund, Konstantinos Doris, Joost Briaire:
Statistical Analysis of Mapping Technique for Timing Error Correction in Current-Steering DACs. 1225-1228 - Andreas Tritschler:
A Continuous Time Analog-to-Digital Converter With 90µW and 1.8µV/LSB Based on Differential Ring Oscillator Structures. 1229-1232 - Anand Meruva, Bahar Jalali Farahani:
Digital Background Calibration of Higher Order Nonlinearities in Pipelined ADCs. 1233-1236 - John A. McNeill
"Split-ADC" Digital Background Correction of Open-Loop Residue Amplifier Nonlinearity Errors in a 14b Pipeline ADC. 1237-1240 - Pingli Huang, Yun Chiu:
A Gradient-Based Algorithm for Sampling Clock Skew Calibration of SHA-less Pipeline ADCs. 1241-1244 - Peter R. Kinget
Device Mismatch: An Analog Design Perspective. 1245-1248 - Michael Fulde, Doris Schmitt-Landsiedel, Gerhard Knoblinger:
Transient Variations in Emerging SOI Technologies: Modeling and Impact on Analog/Mixed-Signal Circuits. 1249-1252 - Khurram Waheed, Robert Bogdan Staszewski
Digital RF Processing Techniques for Device Mismatch Tolerant Transmitters in Nanometer-Scale CMOS. 1253-1256 - Ronald Carlsten, Jeremy Ralston-Good, Douglas Goodman:
An Approach to Detect Negative Bias Temperature Instability (NBTI) in Ultra-Deep Submicron Technologies. 1257-1260 - Brian Greskamp, Smruti R. Sarangi, Josep Torrellas:
Threshold Voltage Variation Effects on Aging-Related Hard Failure Rates. 1261-1264 - Yun Q. Shi, Chunhua Chen, Wen Chen, Maala P. Kaundinya:
Effect of Recompression on Attacking JPEG Steganographic Schemes An Experimental Study. 1265-1268 - Huijuan Yang
Data Hiding For Binary Images Authentication By Considering A Larger Neighborhood. 1269-1272 - Richard Y. M. Li, Oscar C. Au, Carman K. M. Yuk, Shu-Kei Yip, Tai-Wai Chan:
Enhanced Image Trans-coding Using Reversible Data Hiding. 1273-1276 - Tsung-Huang Chen, Shao-Yi Chien:
Cost Effective Color Filter Array Demosaicking with Chrominance Variance Weighted Interpolation. 1277-1280 - Carman K. M. Yuk, Oscar C. Au, Richard Y. M. Li, Sui-Yuk Lam:
Color Demosaicking Using Direction Similarity in Color Difference Spaces. 1281-1284 - Jonathan Tapson
A Simple Neural Cross-Correlation Engine. 1285-1288 - Paul Kucher, Shantanu Chakrabartty:
An Energy-Scalable Margin Propagation-Based Analog VLSI Support Vector Machine. 1289-1292 - Simone G. O. Fiori:
Neural Learning by Retractions on Manifolds. 1293-1296 - Chih-Cheng Lu, C. Y. Hong, Hsin Chen:
A Scalable and Programmable Architecture for the Continuous Restricted Boltzmann Machine in VLSI. 1297-1300 - Terrence S. T. Mak, Kai-Pui Lam, H. S. Ng, Guy Rachmuth, Chi-Sang Poon:
A Current-Mode Analog Circuit for Reinforcement Learning Problems. 1301-1304 - Yodchanan Wongsawat, Soontorn Oraintara, K. R. Rao:
Reduced Complexity Space-Time-Frequency Model for Multi-Channel EEG and Its Applications. 1305-1308 - Kai Man Tsui, Zhiguo Zhang, Shing-Chow Chan, Yong Hu, Keith D. K. Luk:
On the Time-frequency Analysis of Trunk Muscles During Sudden Release of Load. 1309-1312 - Alexandra Delia Doljanu, Mohamad Sawan:
3D Shape Acquisition System Dedicated to a Visual Intracortical Stimulator. 1313-1316 - Paolo Arena, Maide Bucolo, Luigi Fortuna, Mattia Frasca, Manuela La Rosa, Francesca Sapuppo
d-infinite Criteria for MEG Characterization. 1317-1320 - Xiaowen Li, Xiang Xie, Xinkai Chen, Guolin Li, Li Zhang, Zhihua Wang, Hong Chen:
Design and Implementation of a Low Complexity Near-lossless Image Compression Method for Wireless Endoscopy Capsule System. 1321-1324 - Ji-Hoon Kim, In-Cheol Park
Energy-Efficient Double-Binary Tail-Biting Turbo Decoder Based on Border Metric Encoding. 1325-1328 - P. P. Vaidyanathan:
On equalization of channels with ZP precoders. 1329-1332 - Suchada Sitjongsataporn, Peerapol Yuvapoositanon:
An Adaptive Step-size Order Statistic Time Domain Equaliser for Discrete Multitone Systems. 1333-1336 - Dimitrios Katselis, Eleftherios Kofidis, Sergios Theodoridis:
Training-Based Estimation of Correlated MIMO Fading Channels in the Presence of Colored Interference. 1337-1340 - Rafiahamed Shaik, Mrityunjoy Chakraborty:
An Efficient Finite Precision Realization of the Adaptive Decision Feedback Equalizer. 1341-1344 - James Ayers, Kartikeya Mayaram, Terri S. Fiez:
Tradeoffs in the Design of CMOS Receivers for Low Power Wireless Sensor Networks. 1345-1348 - Chao Lu, Chi-Ying Tsui, Wing-Hung Ki:
A Batteryless Vibration-based Energy Harvesting System for Ultra Low Power Ubiquitous Applications. 1349-1352 - Hui Shao, Chi-Ying Tsui, Wing-Hung Ki
An Inductor-less Micro Solar Power Management System Design for Energy Harvesting Applications. 1353-1356 - Yi Wang, Dan Zhao:
Design and Implementation of Routing Scheme for Wireless Network-on-Chip. 1357-1360 - Stig Støa
Data Throughput Optimization in the IEEE 802.15.4 Medical Sensor Networks. 1361-1364 - Amit Kumar Gupta, Saeid Nooshabadi, David Taubman
Efficient Data Transfer Techniques and VLSI architecture for DWT-Block Coder Integration of JPEG2000 Encoder. 1365-1368 - Meeta Yadav, Ashwini Venkatachaliah, Paul D. Franzon
Hardware Architecture of a Parallel Pattern Matching Engine. 1369-1372 - Roberto Muscedere:
A Hardware Efficient Very Large Bit Word Binary to Double Base Number System Converter for Encryption Applications. 1373-1376 - Rahul Jain, Preeti Ranjan Panda:
An Efficient Pipelined VLSI Architecture for Lifting-Based 2D-Discrete Wavelet Transform. 1377-1380 - Wei-Feng He, Zhi-Gang Mao:
An Improved Frame-Level Pipelined Architecture for High Resolution Video Motion Estimation. 1381-1384 - Ahmed Shebaita, Yehea I. Ismail:
Variable Threshold Voltage Design Scheme for CMOS Tapered Buffers. 1385-1388 - Zhiyu Liu, Volkan Kursun
Charge Recycling MTCMOS for Low Energy Active/Sleep Mode Transitions. 1389-1392 - Baozhen Yu, Michael L. Bushnell:
Power Grid Analysis of Dynamic Power Cutoff Technology. 1393-1396 - Sherif A. Tawfik, Volkan Kursun
Multi-Vth Level Conversion Circuits for Multi-VDD Systems. 1397-1400 - Saihua Lin, Huazhong Yang, Rong Luo:
A Novel Low Power Interface Circuit Design Technique for Multiple Voltage Islands Scheme. 1401-1404 - Rachit Agarwal, Emanuel M. Popovici, Brendan O'Flynn
A Parallel Architecture for Hermitian Decoders: Satisfying Resource and Throughput Constraints. 1405-1408 - Jun Ma, Alexander Vardy, Zhongfeng Wang, Qinqin Chen:
Direct Root Computation Architecture for Algebraic Soft-Decision Decoding of Reed-Solomon Codes. 1409-1412 - Xinmiao Zhang, Jiangli Zhu:
Low-complexity Interpolation Architecture for Soft-decision Reed-Solomon Decoding. 1413-1416 - Simon Haene, Andreas Burg
FFT Processor for OFDM Channel Estimation. 1417-1420 - Peter Luethi, Andreas Burg
VLSI Implementation of a High-Speed Iterative Sorted MMSE QR Decomposition. 1421-1424 - Stefano Vitali, Giampaolo Cimatti, Riccardo Rovatti, Gianluca Setti:
Algorithmic ADC Offset Compensation by Non-White Data Chopping. 1425-1428 - Xi Chen
Stability Analysis of RED Gateway with Multiple TCP Reno Connections. 1429-1432 - Shintaro Arai
Noncoherent Correlation-Based Communication Systems Choosing Different Chaotic Maps. 1433-1436 - Fabio Pareschi, Riccardo Rovatti, Gianluca Setti:
Second-level NIST Randomness Tests for Improving Test Reliability. 1437-1440 - Luca Antonio De Michele, Giampaolo Cimatti, Riccardo Rovatti, Gianluca Setti:
Joint Design of a DS-UWB Modulator and Chaos-Based Spreading Sequences for Sensor Networks. 1441-1444 - Wesley A. Gee, Phillip E. Allen:
CMOS Integrated LC RF Bandpass Filter with Transformer-Coupled Q-Enhancement and Optimized Linearity. 1445-1448 - Miguel A. Martins, Jorge R. Fernandes, Manuel Medeiros Silva:
Techniques for Dual-Band LNA Design using Cascode Switching and Inductor Magnetic Coupling. 1449-1452 - Md. Mahbub Reja, Chris Sellathamby, Igor M. Filanovsky:
A New CMOS 3.1-11.7 GHz Low Power LNA for Ultra-Wideband Wireless Applications. 1453-1456 - Shaikh K. Alam, Joanne DeGroat:
A CMOS Variable Gain Front-end for a WCDMA Receiver. 1457-1460 - Luís Bica Oliveira, Jorge R. Fernandes, Manuel Medeiros Silva, Igor M. Filanovsky, Chris J. M. Verhoeven:
Experimental Evaluation of Phase-Noise and Quadrature Error in a CMOS 2.4 GHz Relaxation Oscillator. 1461-1464 - Georgi I. Radulov, Patrick J. Quinn, Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund:
Parallel current-steering D/A Converters for Flexibility and Smartness. 1465-1468 - Kati Virtanen, Janne Maunu, Jonne Poikonen, Ari Paasio
A 12-bit Current-Steering DAC with Calibration by Combination Selection. 1469-1472 - Babak Nejati, Larry Larson:
Power/Area Trade-Offs in Low-Power/Low-Area Unary-R-2R CMOS Digital-to-Analog Converters. 1473-1476 - Benoit Catteau, Pieter Rombouts, Ludo Weyten:
A Digital Calibration Technique for the Correction of Glitches in High-Speed DAC's. 1477-1480 - Behnam Sedighi, Mehrdad Sharif Bakhtiar:
An 8-bit 300MS/s Switched-Current Pipeline ADC in 0.18µm CMOS. 1481-1484 - Min Ma, Roni Khazaka:
Multi-level Order Reduction with Nonlinear Port Constraints. 1485-1488 - Yuya Nakazono, Hideki Asai
Application of Relaxation-Based Technique to ADI-FDTD Method and Its Estimation. 1489-1492 - Ege Engin, Krishna Bharath, Madhavan Swaminathan:
Analysis for Signal and Power Integrity Using the Multilayered Finite Difference Method. 1493-1496 - Taha Amiralli, Anestis Dounavis:
Macromodeling for Nonlinear Distributed Interconnect Networks. 1497-1500 - Wendemagegnehu T. Beyene:
Low-Order Rational Approximation of Interconnects Using Neural-Network Based Pole-Clustering Techniques. 1501-1504 - Naeem Ramzan
An Efficient Joint Source-Channel Coding for Wavelet Based Scalable Video. 1505-1508 - Wen-Nung Lie, Han-Ching Yeh, Zhi-Wei Gao, Ping-Chang Jui:
Error-Resilience Transcoding of H.264/AVC Compressed Videos. 1509-1512 - Lei Yao, Lei Cao:
UEP for Progressive Image Transmission with GA-based Optimization. 1513-1516 - David Levine, William E. Lynch, Tho Le-Ngoc:
Iterative Joint Source-Channel Decoding of H.264 Compressed Video. 1517-1520 - Davy De Schrijver, Wesley De Neve
XML-driven Exploitation of Combined Scalability in Scalable H.264/AVC Bitstreams. 1521-1524 - Alexander F. Russell, Garrick Orchard
Configuring of Spiking Central Pattern Generator Networks for Bipedal Walking Using Genetic Algorthms. 1525-1528 - Ismail Uysal, Harsha Sathyendra, John G. Harris:
Spike-Based Feature Extraction for Noise Robust Speech Recognition Using Phase Synchrony Coding. 1529-1532 - Haruna Matsushita, Yoshifumi Nishio
Self-Organizing Map Considering False Neighboring Neuron. 1533-1536 - Lourdes Miro-Amarante, Angel Jiménez-Fernandez, Alejandro Linares-Barranco, Francisco Gomez-Rodriguez
LVDS Serial AER Link performance. 1537-1540 - Paolo Checco, Mario Biey, Marco Righero, Ljupco Kocarev:
Synchronization and Bifurcations in Networks of Coupled Hindmarsh-Rose Neurons. 1541-1544 - Olivier Valorge, Benoit Gosselin
Electromagnetic Compatibility Modeling in Low-Noise Medical Sensor Interfaces. 1545-1548 - Andrea Fantini, Alessandro Cabrini, Guido Torelli:
Impact of Control Signal Non-Idealties on Two-Phase Charge Pumps. 1549-1552 - Maneesha Yellepeddi, Kartikeya Mayaram:
Issues in the Design and Simulation of a MEMS VCO based Phase-Locked Loop. 1553-1556 - Paul E. Hasler, Arindam Basu
Above Threshold pFET InjectionModeling intended for ProgrammingFloating-Gate Systems. 1557-1560 - Bernabé Linares-Barranco, Teresa Serrano-Gotarredona:
A Physical Interpretation of the Distance Term in Pelgrom's Mismatch Model results in very Efficient CAD. 1561-1564 - Guichang Zhong, Alan N. Willson Jr.:
An Energy-efficient Reconfigurable Viterbi Decoder on a Programmable Multiprocessor. 1565-1568 - Guo-An Jian, Chih-Da Chien, Jiun-In Guo:
A Memory-Based Hardware Accelerator for Real-Time MPEG-4 Audio Coding and Reverberation. 1569-1572 - Zhenmin Li, Taewhan Kim:
Address Code Optimization Exploiting Code Scheduling in DSP Applications. 1573-1576 - Xiaoxiang Gong, John G. Harris:
A Precompensation Algorithm for PWM-Based Digital Audio Amplifiers for Portable Applications. 1577-1580 - Chun-Yat Ma, Tai-Chiu Hsung, Daniel Pak-Kong Lun, K. C. Ho, Hon Keung Kwan
Denoising for Generalized Sidelobe Canceller. 1581-1584 - Adam S. W. Man, Edward S. Zhang, Hin-Tat Chan, Vincent K. N. Lau
Design and Implementation of a Low-power Baseband-system for RFID Tag. 1585-1588 - Andrea Ricci, Ilaria De Munari:
Enabling Pervasive Sensing with RFID: An Ultra Low-Power Digital Core for UHF Transponders. 1589-1592 - Majid Baghaei Nejad, Zhuo Zou, Hannu Tenhunen, Li-Rong Zheng:
A Novel Passive Tag with Asymmetric Wireless Link for RFID and WSN Applications. 1593-1596 - Jinseok Lee
Object Tracking Based on RFID Coverage Visual Compensation in Wireless Sensor Network. 1597-1600 - Meng-Lin Hsia, Oscal T.-C. Chen:
Low-Complexity Encryption Using Redundant Bits and Adaptive Frequency Rates in RFID. 1601-1604 - Genhua Jin, Jin-Su Jung, Hyuk-Jae Lee:
An Efficient Pipelined Architecture for H.264/AVC Intra Frame Processing. 1605-1608 - Klaus Gaedke, Malte Borsum, Marco Georgi, Andreas Kluger, Jean-Pierre Le Glanic, Pascal Bernard:
Architecture and VLSI Implementation of a programmable HD Real-Time Motion Estimator. 1609-1612 - Woong Hwangbo, Jaemoon Kim, Chong-Min Kyung:
A High-Performance 2-D Inverse Transform Architecture for the H.264/AVC Decoder. 1613-1616 - Arnaldo Azevedo, Bruno Zatt, Luciano Volcan Agostini
MoCHA: a Bi-Predictive Motion Compensation Hardware for H.264/AVC Decoder Targeting HDTV. 1617-1620 - Yongje Lee, Chae-Eun Rhee, Hyuk-Jae Lee:
A New Frame Recompression Algorithm Integrated with H.264 Video Compression. 1621-1624 - Peiyi Zhao, Jason McNeely, Magdy A. Bayoumi, Pradeep Kumar Golconda, Weidong Kuang:
A Low Power Domino with Differential-Controlled-Keeper. 1625-1628 - Nainesh Agarwal, Nikitas J. Dimopoulos:
Towards Automated Power Gating of Registers using CoDeL. 1629-1632 - Enrico Dallago, Daniele Miatton, Giuseppe Venchi, Giovanni Frattini, Giulio Ricotti:
Self-Supplied Integrable Active High-Efficiency AC-DC Converter for Piezoelectric Energy Scavenging Systems. 1633-1636 - Wei-Chih Hsieh, Wei Hwang:
Low Power On-Chip Current Monitoring Medium-Grained Adaptive Voltage Control. 1637-1640 - Ahmed Sayed, Hussain Al-Asaad:
A New Statistical Approach for Glitch Estimation in Combinational Circuits. 1641-1644 - Kiran K. Gunnam
Multi-Rate Layered Decoder Architecture for Block LDPC Codes of the IEEE 802.11n Wireless Standard. 1645-1648 - Yi-Hsing Chien, Mong-Kai Ku:
A High Throughput H-QC LDPC Decoder. 1649-1652 - Zhiyong He, Sébastien Roy, Paul Fortier:
FPGA Implementation of LDPC Decoders Based on Joint Row-column Decoding Algorithm. 1653-1656 - Emil Matús, Marcos B. S. Tavares, Marcel Bimberg, Gerhard P. Fettweis:
Towards a GBit/s Programmable Decoder for LDPC Convolutional Codes. 1657-1660 - Abu Baker, Soumik Ghosh, Ashok Kumar, Magdy A. Bayoumi, Rafic A. Ayoubi:
Design and Realization of Analog Phi-Function for LDPC Decoder. 1661-1664 - Martin Hasler, Igor Belykh, Vladimir N. Belykh:
Classes of stochastically switched (blinking) systems. 1665-1668 - Paolo Checco, Mario Biey, Ljupco Kocarev:
Synchronization in Complex Hybrid Networks. 1669-1672 - Arindam Basu
Dynamics of a Logarithmic Transimpedance Amplifier. 1673-1676 - Zbigniew Galias
Equivalence of two discretization schemes in a simple sliding mode control system. 1677-1680 - Jiuchao Feng, Hongjuan Fan, Chi K. Michael Tse:
Convergence Analysis of the Unscented Kalman Filter for Filtering Noisy Chaotic Signals. 1681-1684 - Seung-Min Oh, Kyoung-Seok Park, Hyun-Hwan Yoo, Yoo-Sam Na, Taek-Soo Kim:
A Design of DC Offset Canceller using Parallel Compensation. 1685-1688 - Jian-Hong Fang, Norman M. Filiol, Tom A. D. Riley, Miles A. Copeland:
A Second Order Delta-Sigma Frequency Discriminator with Fractional-N Divider and Multi-Bit Quantizer. 1689-1692 - Ramin Zanbaghi, Seyed Mojtaba Atarodi
A Power Optimized Base-Band Circuitry for the Low-IF Receivers. 1693-1696 - Bob Stengel, Said Rami:
A 90nm Quadrature Generator with Frequency Extension up to 4GHz. 1697-1700 - Malihe Zarre Dooghabadi, Sasan Naseh:
A New Quadrature LC-Oscillator. 1701-1704 - Patrick Satarzadeh, Bernard C. Levy
Bandwidth Mismatch Correction for a Two-Channel Time-Interleaved A/D Converter. 1705-1708 - Cheng Chen, Jiren Yuan:
A 10-bit 500-MS/s 124-mW Subranging Folding ADC in 0.13 µm CMOS. 1709-1712 - Jere A. M. Järvinen, Mikko Saukoski, Kari Halonen:
A 12-bit Ratio-Independent Algorithmic ADC for a Capacitive Sensor Interface. 1713-1716 - Devrim Yilmaz Aksin
An 11 Bit Sub-Ranging SAR ADC with Input Signal Range of Twice Supply Voltage. 1717-1720 - Lei Wang, Junyan Ren, Wenjing Yin, Tingqian Chen, Jun Xu:
A High-Speed High-Resolution Low-Distortion CMOS Bootstrapped Switch. 1721-1724 - Andrew G. Dempster:
Satellite Navigation: New Signals, New Challenges. 1725-1728 - Ediz Çetin
Analysis and Compensation of RF Impairments for Next Generation Multimode GNSS Receivers. 1729-1732 - Gianmarco Girau, Andrea Tomatis, Fabio Dovis, Paolo Mulassano:
Efficient Software Defined Radio Implementations of GNSS Receivers. 1733-1736 - Olivier Julien, Gérard Lachapelle, M. Elizabeth Cannon:
Galileo L1 Civil Receiver Tracking Loops' Architecture. 1737-1741 - Deok Won Lim, Sang Jeong Lee, Deuk Jae Cho:
Design of an Assisted GPS Receiver and its Performance Analysis. 1742-1745 - Yang Liu, Yeng Chai Soh, Zheng Guo Li:
Rate Control for Spatial/CGS Scalable Extension of H.264/AVC. 1746-1750 - Fengling Li, Nam Ling, Stephen A. Chiappari:
Multi-Stage MCTF Coding Efficiency Analysis with Directed-Tree Model. 1751-1754 - Yu Liu, Feng Wu, King Ngi Ngan
3D Object-based Scalable Wavelet Video Coding with Boundary Effect Suppression. 1755-1758 - Wei Yao, Zhengguo Li, Susanto Rahardja:
Balanced Inter-Layer Prediction for Combined Coarse Granular Scalability and Spatial Scalability. 1759-1762 - Ruiqin Xiong, Jizheng Xu, Feng Wu, Shipeng Li:
Macroblock-Based Adaptive In-Scale Prediction for Scalable Video Coding. 1763-1766 - Shaosheng Zhou, Wei Xing Zheng:
A Study of Delay-Dependent Stabilization for Discrete-Time Systems with Time Delays. 1767-1770 - Mark D. Skowronski, John G. Harris:
Noise-robust automatic speech recognition using a discriminative echo state network. 1771-1774 - Dimitrios N. Loizos, Paul-Peter Sotiriadis
Multi-Channel Coherent Detection for Delay-Insensitive Model-Free Adaptive Control. 1775-1778 - Mohammed A. Hasan:
Generalizations of Oja's Learning Rule to Non-Symmetric Matrices. 1779-1782 - Yoshifumi Tada, Yoko Uwate, Yoshifumi Nishio
Effective Search with Hopping Chaos for Hopfield Neural Networks Solving QAP. 1783-1786 - Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri:
A Structured ASIC Design Approach Using Pass Transistor Logic. 1787-1790 - Haider Ali, Bashir M. Al-Hashimi:
Architecture Level Power-Performance Tradeoffs for Pipelined Designs. 1791-1794 - Yukihide Kohira, Atsushi Takahashi
A Fast Register Relocation Method for Circuit Size Reduction in Generalized-Synchronous Framework. 1795-1798 - Renato Rimolo-Donadio, Antonio J. Acosta, Wolfgang H. Krautschneider:
Asynchronous Staggered Set/Reset Techniques for Low-Noise Applications. 1799-1802 - Huifei Rao, Jie Chen, Changhong Yu, Woon Tiong Ang, I-Chyn Wey, An-Yeu Wu, Hong Zhao:
Ensemble Dependent Matrix Methodology for Probabilistic-Based Fault-tolerant Nanoscale Circuit Design. 1803-1806 - Sei Nagashima, Naofumi Homma, Yuichi Imai, Takafumi Aoki, Akashi Satoh:
DPA Using Phase-Based Waveform Matching against Random-Delay Countermeasure. 1807-1810 - Salvatore Caporale, Luca De Marchi, Nicolò Speciale:
An Accurate Algorithm for Fast Frequency Warping. 1811-1814 - Shing-Chow Chan, Z. G. Zhang, Kai Man Tsui:
Minimum Variance Spectral Estimation-Based Time Frequency Analysis for Nonstationary Time-Series. 1815-1818 - Hamid Hassanpour
Improved SVD-Based Technique for Enhancing the Time-Frequency Representation of Signals. 1819-1822 - Fabio P. Freeland, Luiz W. P. Biscainho, Paulo S. R. Diniz
HRTF Interpolation Through Direct Angular Parameterization. 1823-1826 - Máire McLoone, Matthew J. B. Robshaw:
New Architectures for Low-Cost Public Key Cryptography on RFID Tags. 1827-1830 - Lejla Batina, Nele Mentens
Public-Key Cryptography on the Top of a Needle. 1831-1834 - Franz Fürbass
ECC Processor with Low Die Size for RFID Applications. 1835-1838 - Martin Feldhofer, Johannes Wolkerstorfer:
Strong Crypto for RFID Tags - A Comparison of Low-Power Hardware Implementations. 1839-1842 - Axel Poschmann, Gregor Leander
New Light-Weight Crypto Algorithms for RFID. 1843-1846 - Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, Akashi Satoh:
SPA against an FPGA-Based RSA Implementation with a High-Radix Montgomery Multiplier. 1847-1850 - Hua Li, Jianzhou Li:
A New Compact Architecture for AES with Optimized ShiftRows Operation. 1851-1854 - Daesun Oh, Keshab K. Parhi
Efficient Highly-Parallel Decoder Architecture for Quasi-Cyclic Low-Density Parity-Check Codes. 1855-1858 - Takeshi Sugawara
A High-Performance ASIC Implementation of the 64-bit Block Cipher CAST-128. 1859-1862 - Akashi Satoh:
High-Speed Parallel Hardware Architecture for Galois Counter Mode. 1863-1866 - Animesh Kumar, Huifang Qin, Prakash Ishwar, Jan M. Rabaey, Kannan Ramchandran:
Fundamental Bounds on Power Reduction during Data-Retention in Standby SRAM. 1867-1870 - Stéphane Badel, Yusuf Leblebici:
Breaking the Power-Delay Tradeoff: Design of Low-Power High-Speed MOS Current-Mode Logic Circuits Operating with Reduced Supply Voltage. 1871-1874 - Prakash Srinivasan, Ali Ahmadinia, Ahmet T. Erdogan
Integrated Heterogenous Modelling for Power Estimation of Single Processor based Reconfigurable SoC Platform. 1875-1878 - Riaz Naseer, Younes Boulghassoul, Jeff Draper, Sandeepan DasGupta, Art Witulski:
Critical Charge Characterization for Soft Error Rate Modeling in 90nm SRAM. 1879-1882 - Yufeng Xie, Leibo Liu, Rui Dai, Shaojun Wei:
Battery-Aware Variable Voltage Scheduling on Real-Time Multiprocessor Platforms. 1883-1886 - You Zheng, Carlos E. Saavedra:
A Microwave OTA Using a Feedforward-Regulated Cascode Topology. 1887-1890 - Miguel Ângelo M. Madureira, Daniel Fonseca, Adolfo V. T. Cartaxo, Paulo M. P. Monteiro
GVD and PMD Compensation Using a Linear Adjustable Filter Prototype in a 40 Gb/s OSSB System. 1891-1894 - Fernando P. H. de Miranda, João Navarro Jr.
A 4.1 GHz Dual Modulus Prescaler Using the E-TSPC Technique and Double Data Throughput Structures. 1895-1898 - Borching Su, P. P. Vaidyanathan:
On the Persistency of Excitation for Blind Channel Estimation in Cyclic Prefix Systems. 1899-1902 - David Perels, Christoph Studer
Implementation of a Low-Complexity Frame-Start Detection Algorithm for MIMO Systems. 1903-1906 - Christian Falconi, Arnaldo D'Amico, Giuseppe Scotti, Alessandro Trifiletti:
Low Voltage CMOS Current and Voltage References without Resistors. 1907-1910 - Juan Pablo Martinez Brito, Sergio Bampi
A 4-Bits Trimmed CMOS Bandgap Reference with an Improved Matching Modeling Design. 1911-1914 - Mikko Loikkanen, Juha Kostamovaara:
A Capacitor-Free CMOS Low-Dropout Regulator. 1915-1918 - Jader A. De Lima, Wallace A. Pimenta:
A gm-C Ramp Generator for Voltage Feedforward Control of DC-DC Switching Regulators. 1919-1922 - Anna Arbat, Ángel Dieguez, Josep Samitier:
An Improved Temperature Compensation Technique for Current Biasing. 1923-1926 - Hans Gaunholt:
A numerical design approach for single amplifier, Active-RC Butterworth filter of order 5. 1927-1930 - Ioannis Sarkas, Dimitrios Mavridis, Michail Papamichail, George D. Papadopoulos:
Volterra Analysis Using Chebyshev Series. 1931-1934 - William H. Kao, Xiaopeng Dong:
Digital Block Modeling and Substrate Noise Aware Floorplanning for Mixed Signal SOCs. 1935-1938 - Tonse Laxminidhi, Shanthi Pavan:
Design Centering High Frequency Integrated Continuous-Time Filters. 1939-1942 - Mohammad Danaie
On the Linearization of MOSFET Capacitors. 1943-1946 - Weng-leng Mok, Pui-In Mak
A Highly-Linear Successive-Approximation Front-End Digitizer with Built-in Sample-and-Hold Function for Pipeline/Two-Step ADC. 1947-1950 - Pieter Harpe, Athon Zanikopoulos, Hans Hegt, Arthur H. M. van Roermund:
Analog Calibration of Mismatches in an Open-Loop Track-and-Hold Circuit for Time-Interleaved ADCs. 1951-1954 - Chi-Chang Lu, Jyun-Yi Wu, Tsung-Sum Lee:
A 1.5V 10-b 30-MS/s CMOS Pipelined Analog-to-Digital Converter. 1955-1958 - Jason N. Laska, Sami Kirolos, Marco F. Duarte
Theory and Implementation of an Analog-to-Information Converter using Random Demodulation. 1959-1962 - Behnam Sedighi, Mehrdad Sharif Bakhtiar:
An 8-bit Switched-Resistor Pipeline ADC. 1963-1966 - W. M. Huang, J. P. John, S. Braithwaite, J. Kirchgessner, I. S. Lim, D. Morgan, Y. B. Park, S. Shams, I. To, P. Welch, Ralf Reuter, Hao Li
SiGe 77GHz Automotive Radar Technology. 1967-1970 - Sorin P. Voinigescu, Sean T. Nicolson, Mehdi Khanpour, Keith K. W. Tang, Kenneth H. K. Yau, N. Seyedfathi, A. Timonov, A. Nachman, George V. Eleftheriades, Peter Schvan, Ming-Ta Yang:
CMOS SOCs at 100 GHz: System Architectures, Device Characterization, and IC Design Examples. 1971-1974 - Helen Kim, Sean Duffy, Jeff Herd, Charles G. Sodini:
SiGe IC- based mm-wave imager. 1975-1978 - Eckhard Grass, Frank Herzel, Maxim Piz, Klaus Schmalz, Yaoming Sun, Srdjan Glisic, Milos Krstic
60 GHz SiGe-BiCMOS Radio for OFDM Transmission. 1979-1982 - Behzad Razavi:
CMOS Transceivers at 60 GHz and Beyond1. 1983-1986 - Xianghui Wei, Shen Li, Yang Song, Satoshi Goto:
An Irregular Search Window Reuse Scheme for Motion Estimation in MPEG-2 to H.264 Transcoding. 1987-1990 - Jun Xin, Jianjun Li, Anthony Vetro, Huifang Sun, Shun-ichi Sekiguchi:
Motion Mapping for MPEG-2 to H.264/AVC Transcoding. 1991-1994 - Yi-Nung Liu, Chi-Sun Tang, Shao-Yi Chien:
Coding Mode Analysis of MPEG-2 to H.264/AVC Transcoding for Digital TV Applications. 1995-1998 - Tsung-Han Tsai, Hsueh-Yi Lin, Yu-Xuan Lee, Pin-Hua Chen:
Complexity Reduction of H.263 to H.264 Transcoder with Fast Mode Decision. 1999-2002 - Haiyan Shu, King Ngi Ngan
Quality Enhancement in H.264 Transform Domain Downsizing. 2003-2006 - David Sander, Marc Dandin
Low-noise CMOS Fluorescence Sensor. 2007-2010 - Jennifer Blain Christen
Design, Analysis and Implementation of Integrated Micro-Thermal Control Systems. 2011-2014 - Jian-Yun Lai, Yan-Ting Chen, Te-Heng Wang, Hong-Si Chang, Jui-Lin Lai:
Biosensor Integrated with Transducer to Detect the Glucose. 2015-2018 - Chin-Teng Lin
Classification of Driver's Cognitive Responses Using Nonparametric Single-trial EEG Analysis. 2019-2023 - Jun Ohta, Takahashi Tokuda, Keiichiro Kagawa, Akihiro Uehara, Yasuo Terasawa, Kazuaki Nakauchi, Takashi Fujikado, Yasuo Tano:
A multi-microchip retinal stimulator for in vitro / in vivo experiments. 2024-2027 - Chang-Tzu Lin, Tai-Wei Kung, De-Sheng Chen, Yiwen Wang, Ching-Hwa Cheng:
Noise-Aware Floorplanning for Fast Power Supply Network Design. 2028-2031 - Karthik Krishnamoorthy, Sarat C. Maruvada, Florin Balasa:
Topological Placement with Multiple Symmetry Groups of Devices for Analog Layout Design. 2032-2035 - Renato Fernandes Hentschke, Ricardo Reis:
A 3D-Via Legalization Algorithm for 3D VLSI Circuits and its Impact on Wire Length. 2036-2039 - Yanfeng Wang, Qiang Zhou, Xianlong Hong, Yici Cai:
Clock-Tree Aware Placement Based on Dynamic Clock-Tree Building. 2040-2043 - Lingyi Zhang, Sheqin Dong, Xianlong Hong, Yuchun Ma:
A Fast 3D-BSG Algorithm for 3D Packing Problem. 2044-2047 - Wu-Sheng Lu, Takao Hinamoto:
Design of FIR Filters with Discrete Coefficients via Polynomial Programming: Towards the Global Solution. 2048-2051 - Raija Lehto, Tapio Saramäki, Olli Vainio:
Synthesis of Wideband Linear-Phase FIR Filters with a Piecewise-Polynomial-Sinusoidal Impulse Response. 2052-2055 - Chia-Yu Yao, Alan N. Willson Jr.:
The Design of Symmetric Square-Root Pulse-Shaping Filters for Transmitters and Receivers. 2056-2059 - Pavel Zahradnik, Miroslav Vlcek, Boris Simák
Analytical Design of an Equiripple DC-Notch FIR Filter. 2060-2063 - Xiaoping Lai:
A Sequential Constrained Least-Square Method for Minimax Design of Linear-phase FIR filters with Time-domain Constraints. 2064-2067 - Rahul Sarpeshkar, Woradorn Wattanapanitch, Benjamin I. Rapoport, Scott K. Arfin, Michael W. Baker, Soumyajit Mandal, Michale S. Fee, Sam Musallam, Richard A. Andersen:
Low-Power Circuits for Brain-Machine Interfaces. 2068-2071 - Fayçal Mounaïm, Mohamad Sawan:
Miniature Implantable System Dedicated to Bi-Channel Selective Neurostimulation. 2072-2075 - Xiao Liu, Andreas Demosthenous, Nick Donaldson
A Fully Integrated Fail-safe Stimulator Output Stage Dedicated to FES Stimulation. 2076-2079 - Reid R. Harrison:
Designing Efficient Inductive Power Links for Implantable Devices. 2080-2083 - Rizwan Bashirullah, John G. Harris, Justin C. Sanchez, Toshikazu Nishida
Florida Wireless Implantable Recording Electrodes (FWIRE) for Brain Machine Interfaces. 2084-2087 - Sungchung Park, Yun-Young Kim, Jae-Ho Noh, Jun-Jin Kong:
CSI-aided Demapping of Dual-Carrier Modulation for Multiband-OFDM. 2088-2091 - Wei-Chang Liu, Ting-Chen Wei, Shyh-Jye Jou:
Blind Mode/GI Detection and Coarse Symbol Synchronization for DVB-T/H. 2092-2095 - Yuping Zhang, Keshab K. Parhi
Parallel Architecture of List Sphere Decoders. 2096-2099 - Qinqin Chen, Zhongfeng Wang, Jun Ma:
FPGA Implementation of an Interpolation Processor for Soft-Decision Decoding of Reed-Solomon Codes. 2100-2103 - Yang Sun, Marjan Karkooti, Joseph R. Cavallaro
VLSI Decoder Architecture for High Throughput, Variable Block-size and Multi-rate LDPC Codes. 2104-2107 - Vasily G. Moshnyaga, Hua Vo, Glenn Reinman, Miodrag Potkonjak:
Reducing Energy of DRAM/Flash Memory System by OS-controlled Data Refresh. 2108-2111 - Jeabin Lee, Byeong-Gyu Nam, Seong-Jun Song, Namjun Cho, Hoi-Jun Yoo:
A Power Management Unit with Continuous Co-Locking of Clock Frequency and Supply Voltage for Dynamic Voltage and Frequency Scaling. 2112-2115 - Parth Malani, Prakash Mukre, Qinru Qiu:
Profile-Based Low Power Scheduling for Conditional Task Graph: A Communication Aware Approach. 2116-2119 - Xiaotao Chang, Mingming Zhang, Ge Zhang, Zhimin Zhang, Jun Wang:
Adaptive Clock Gating Technique for Low Power IP Core in SoC Design. 2120-2123 - Shun Li, Feng Zhou, Chunhong Chen, Hua Chen, Yipin Wu:
Quasi-Static Energy Recovery Logic with Single Power-Clock Supply. 2124-2127 - Shayan Farahvash, Chee Quek, William Roberts, David Walker, Mohamed Mostafa, Hauw Liem, Robert Koupal:
A Two-port GFSK Direct Modulator for Wideband Applications at 5.8 GHz. 2128-2131 - Yikui Dong, Cathy Liu, Freeman Zhong:
Integrated Linear AC-coupling Circuit for DC-Balanced and Non-Balanced Traffics. 2132-2135 - Ayman A. Fayed
A 3.7mW, 1.6V CMOS Analog Adaptive Equalizer for a 125Mbps Wire-Line Transceiver. 2136-2139 - Andrea Bevilacqua, Christoph Sandner, Andrea Gerosa
Quadrature VCOs Based on Coupled PLLs. 2140-2143 - Chanwoo Park, Jinbeom Lee, Younglok Kim:
Modified Reduced Constellation PLL for Higher Order QAM. 2144-2147 - Franco Maloberti, Yunyoung Choi:
86 dB DR Cross-Coupled Time-Interleaved xx ADC for Audio Signal Band with 322 µA Current Consumption. 2148-2151 - Giuseppe de Vita, Francesco Marraccini, Giuseppe Iannaccone:
Low-Voltage Low-Power CMOS Oscillator with Low Temperature and Process Sensitivity. 2152-2155 - Yi-Bin Hsieh, Yao-Huang Kao:
A Fully Integrated Spread Spectrum Clock Generator Using Two-Point Delta-Sigma Modulation. 2156-2159 - Hong-Yi Huang, Sheng-Da Wu, Yi-Jui Tsai:
A New Cycle-Time-to-Digital Converter With Two Level Conversion Scheme. 2160-2163 - Alfredo Olmos, Andre Vilas Boas, Jefferson Soldera:
A Sub-1V Low Power Temperature Compensated Current Reference. 2164-2167 - Erhan Ozalevli
VLSI Implementation of a Reconfigurable Mixed-Signal Finite Impulse Response Filter. 2168-2171 - Dominic DiClemente, Fei Yuan:
Current-Mode Phase-Locked Loops with Low Supply Voltage Sensitivity. 2172-2175 - Yuxin Wang, Zeljko Ignjatovic:
On-Chip Substrate Noise Suppression Using Clock Randomization Methodology. 2176-2179 - Jie Qin, Charles E. Stroud, Foster F. Dai:
Noise Figure Measurement Using Mixed-Signal BIST. 2180-2183 - Tsung-Chu Huang, Gau-Bin Chang, Ling Li:
Congruence Synchronous Mirror Delay. 2184-2187 - Song Guo, Hoi Lee:
Dual Active-Capacitive-Feedback Compensation for Area-Efficient Three-Stage Amplifiers. 2188-2191 - Kang-Yeob Park, Wonseok Oh, Boo-Young Choi, Jung-Won Han, S. M. Park:
A 4-channel 12.5Gb/s Common-Gate Transimpedance Amplifier Array for DVI/HDMI Applications. 2192-2195 - Vincenzo Stornelli, Giuseppe Ferri, Andrea De Marcellis, Christian Falconi, Daniele Mazzieri, Arnaldo D'Amico:
High-Accuracy, High-Precision DEM-CCII Amplifiers. 2196-2199 - Jose Luis Ruiz-Chavira, Jaime Ramírez-Angulo, Antonio J. López-Martín
Low-Voltage CMOS Single Ended and Fully Differential Amplifier with Programmable Gain. 2200-2203 - Christian Falconi, M. Cianella, Arnaldo D'Amico, Giuseppe Scotti, Alessandro Trifiletti:
Mismatch-tolerant, Continuous Time, Gain Enhanced Amplifiers. 2204-2207 - Hsiao Wei Su, Zhi Hua Wang:
The Impact of Different Gain Control Methods on Performance of CMOS Variable-Gain LNA. 2208-2211 - Christian Falconi, Arnaldo D'Amico, Gianluca Giustolisi, Gaetano Palumbo:
Rosenstark-like Representation of Feedback Amplifier Resistance. 2212-2215 - Walter Aloisi, Giuseppe Di Cataldo, Gaetano Palumbo, Salvatore Pennisi:
Miller Compensation: Optimization with Current Buffer/Amplifier. 2216-2219 - Bradley A. Minch:
Low-Voltage Wilson Current Mirrors in CMOS. 2220-2223 - Michael Trakimas, Sameer R. Sonkusale:
A 0.5V Bulk-Input Operational Transconductance Amplifier with Improved Common-Mode Feedback. 2224-2227 - Jacek Piskorowski
On Problems of Compensated Continuous-Time Chebyshev Filters in the Time Domain. 2228-2231 - Bob Schell, Yannis P. Tsividis:
Analysis of Continuous-Time Digital Signal Processors. 2232-2235 - Fabian Henrici, Joachim Becker, Alexander Buhmann, Maurits Ortmanns, Yiannos Manoli:
A Continuous-Time Field Programmable Analog Array Using Parasitic Capacitance Gm-C Filters. 2236-2239 - Pietro Monsurrò
Source-degenerated CMOS Transconductor with Auxiliary Linearization. 2240-2243 - Ippei Akita
Simplified Low-Voltage CMOS Syllabic Companding Log Domain Filter. 2244-2247 - Shunsuke Koshita, Yousuke Mizukami, Taketo Konno, Masahide Abe, Masayuki Kawamata:
Analysis of Second-Order Modes of Linear Continuous-Time Systems under Positive-Real Transformations. 2248-2251 - Gholamreza Nikandish
Performance Comparison of Switched-Capacitor and Switched-Current Pipeline ADCs. 2252-2255 - Maria Drakaki
CMOS Inductor Performance Estimation using Z- and S-parameters. 2256-2259 - Emad Hegazi:
An Algorithm for Automatic Tuning of PLLs. 2260-2263 - Alexander Buhmann, Matthias Keller, Maurits Ortmanns, Yiannos Manoli:
Estimating Circuit Nonidealities of Continuous-Time Multibit Delta-Sigma Modulators. 2264-2267 - Aly E. Salama, Sherif M. Sharroush, Mahmoud Y. Fekry:
Increasing the Sense Margin of 1T-1C Ferroelectric Random-Access Memories. 2268-2271 - Dayong Li, Ming Liu, Wei Wang:
Fault Tolerance Circuit for AM-OLED. 2272-2274 - Nicole M. Nelson, Pamela Abshire:
Chopper Modulation Improves OTA Information Transmission. 2275-2278 - David Wolpert, Paul Ampadu:
Temperature-Robust Performance Yield through Supply Voltage Selection. 2279-2282 - Amir Hosseini, Yehia Massoud:
Subwavelength Plasmonic Bragg Reflector Structures for On-chip Optoelectronic Applications. 2283-2286 - Takayuki Sugawara, Shingo Yoshizawa, Yoshikazu Miyanaga
Dynamic Reconfigurable Architecture for a Low-Power Despreader in VSF-OFCDM Systems. 2287-2290 - Wei Xing Zheng:
An Efficient Method for Estimation of Autoregressive Signals Subject to Colored Noise. 2291-2294 - Mahdi Shabany, P. Glenn Gulak:
Application of Sequential Monte Carlo to M-QAM Schemes in the Presence of Nonlinear Solid-State Power Amplifiers. 2295-2298 - Ut-Va Koc:
PLL-Free Quadrature-Amplitude Modulation in Coherent Optical Communication. 2299-2302 - Hon Keung Kwan
Peak-Contrained WLS Strategy for FIR Digital Filter Design. 2303-2306 - C. C. Tseng:
Eigenvector and Fractionalization of Discrete Hadamard Transform. 2307-2310 - Naoto Sasaoka, Masatoshi Watanabe, Yoshio Itoh, Kensaku Fujii:
Noise Reduction System Based on LPEF and System Identification with Variable Step Size. 2311-2314 - Mohammed A. Hasan:
Lagrangian Gradient for Principal Singular Component Analysis. 2315-2318 - Alessandro Bastari, Stefano Squartini, Francesco Piazza:
Discrete Stockwell Transform and Reduced Redundancy Versions from Frame Theory Viewpoint. 2319-2322 - Robin Moritz, Henry Leung, Xinping Huang:
Nonlinear Compensation for High Power Amplifiers using Genetic Programming. 2323-2326 - Kavallur Gopi Smitha
A New Binary Common Subexpression Elimination Method for Implementing Low Complexity FIR Filters. 2327-2330 - Sai Mohan Kilambi, Behrouz Nowrouzian:
A Diversity Controlled Genetic Algorithm for Optimization of FRM Digital Filters over DBNS Multiplier Coefficient Space. 2331-2334 - Oscar Gustafsson
Complexity Comparison of Linear-Phase Mth-Band and General FIR Filters. 2335-2338 - Aimin Jiang
IIR Digital Filter Design with Novel Stability Criterion Based on Argument Principle. 2339-2342 - Ngai Wong, Chi-Un Lei:
FIR Filter Approximation by IIR Filters Based on Discrete-Time Vector Fitting. 2343-2346 - Mohammed Imamul Hassan Bhuiyan, M. Omair Ahmad, M. N. S. Swamy:
New Spatially Adaptive Wavelet-based Method for the Despeckling of Medical Ultrasound Images. 2347-2350 - Karim Abdelhalim, Leonard MacEachern, Samy A. Mahmoud:
A Nanowatt Successive Approximation ADC with Offset Correction for Implantable Sensor Applications. 2351-2354 - Xinkai Chen, Guolin Li, Xiang Xie, Xiaowen Li, Zhihua Wang, Hong Chen:
A Low Power Digital Baseband for Wireless Endoscope Capsule. 2355-2358 - Yan Huang, Emmanuel M. Drakakis, Chris Toumazou:
A Wide Tuning Range CMOS Oscillator for an Optoelectronic Retinal Prosthesis System. 2359-2362 - T. Hui Teo, Gin Kooi Lim, Darwin Sutomo David, Kuo Hwi Tan, Pradeep Kumar Gopalakrishnan
Ultra Low-Power Sensor Node for Wireless Health Monitoring System. 2363-2366 - Xiao Liu, Andreas Demosthenous, Nick Donaldson
A Safe Transmission Strategy for Power and Data Recovery in Biomedical Implanted Devices. 2367-2370 - Awais M. Kamboh, Matthew Raetz, Andrew J. Mason, Karim G. Oweiss:
Area-Power Efficient Lifting-Based DWT Hardware for Implantable Neuroprosthetics. 2371-2374 - Dylan J. Banks, Patrick Degenaar, Chris Toumazou:
A Bio-Inspired Adaptive Retinal Processing Neuron with Multiplexed Spiking Outputs. 2375-2378 - Paulo Alexandre Crisóstomo Lopes, José A. Germano, Teresa Mendes de Almeida, Leonel Sousa, Moisés Simões Piedade, Filipe Arroyo Cardoso, Hugo Alexandre Ferreira
A New Handheld Biochip-based Microsystem. 2379-2382 - Chua-Chin Wang, Chi-Chun Huang, Jian-Sing Liou, Yan-Jhin Ciou, I-Yu Huang, Chih-Peng Li, Yung-Chin Lee, Wen-Jen Wu:
An Implantable Long-term Bladder Urine Pressure Measurement System with a 1-atm Canceling Instrumentation Amplifier. 2383-2386 - Tara Julia Hamilton
A Basilar Membrane Resonator for an Active 2-D Cochlea. 2387-2390 - Roy H. Olsson III, Bianca E. N. Keeler, David A. Czaplewski, Dustin W. Carr:
Circuit Techniques for Reducing Low Frequency Noise in Optical MEMS Position and Inertial Sensors. 2391-2394 - Edwin J. Tan, Zeljko Ignjatovic, Mark F. Bocko
A CMOS Image Sensor with Focal Plane Discrete Cosine Transform Computation. 2395-2398 - Man Kay Law, Amine Bermak
A CMOS Image Sensor using Variable Reference Time Domain Encoding. 2399-2402 - Haihua Chen, Shing-Chow Chan, Ka-Leung Ho:
New Recursive Adaptive Beamforming Algorithms for Uniform Concentric Spherical Arrays with Frequency Invariant Characteristics. 2403-2406 - Shi-Bing Wang, Yufei Zhou, Herbert H. C. Iu, Jun-Ning Chen:
Complex Phenomena in SEPIC Converter Based on Sliding Mode Control. 2407-2410 - Anna Richelli, Luca Mensi, Luigi Colalongo, Zsolt Miklós Kovács-Vajna, Pier Luigi Rolandi:
A 1.2V-5V High Efficiency CMOS Charge Pump for Non-Volatile Memories. 2411-2414 - Christian Peters, O. Kessling, Fabian Henrici, Maurits Ortmanns, Yiannos Manoli:
CMOS Integrated Highly Efficient Full Wave Rectifier. 2415-2418 - Yuehui Huang, Herbert H. C. Iu, C. K. Michael Tse:
Boundaries Between Fast-and Slow-Scale Bifurcations in Parallel-Connected Buck Converters. 2419-2422 - Enric Rodriguez, Gerard Villar, Francesc Guinjoan, Alberto Poveda, Abdelali El Aroudi, Eduard Alarcón:
General-purpose ripple-based fast-scale instability prediction in switching power regulators. 2423-2426 - Hanwu Sun, Louis Shue:
Analysis of an Adaptive Filter-bank for Harmonic Measurement and Estimation. 2427-2430 - T. Sulawa, Zivan Zabar, Dariusz Czarkowski, L. Birenbaum, S. Lee, Y. TenAmi:
Short Circuit Current of Induction Generators. 2431-2434 - Chua-Chin Wang, Gang-Neng Sung, Kuan-Wen Fang, Sheng-Lun Tseng:
A Low-power Sensorless Inverter Controller of Brushless DC Motors. 2435-2438 - Wanping Zhang, Chung-Kuan Cheng:
Incremental Power Impedance Optimization Using Vector Fitting Modeling. 2439-2442 - Leontina Pinto, Rodrigo Maia, Leandro Tsunechiro, Jacques Szczupak, Bruno Dias:
Risk Management - beyond Risk Analysis. 2443-2446 - Li Zhang, Baoyong Chi, Zhihua Wang, Hongyi Chen, Jinke Yao, Ende Wu:
A 2-GHz 6.1-mA Fully-Differential CMOS Phase-Locked Loop. 2447-2450 - Raphael Berner, Tobi Delbrück, Antón Civit Balcells
A 5 Meps $100 USB2.0 Address-Event Monitor-Sequencer Interface. 2451-2454 - Tolga Kaya
A Silicon-on-Sapphire Low-Voltage Temperature Sensor for Energy Scavengers. 2455-2458 - Mario di Bernardo
On a novel Hybrid LQ-MCS control strategy and its application to a DC motor. 2459-2462 - Jaber A. Abu-Qahouq, Lilly Huang:
A Converter with Fixed Switching Frequency Adaptive Multi-Mode Control Scheme. 2463-2465 - Hongbin Chen, Jiuchao Feng, Chi K. Michael Tse:
A General Noncoherent Chaos-Shift-Keying Communication System and its Performance Analysis. 2466-2469 - Chunyan Wang:
A Method to Reduce the Effect of the Switching Noise in Analog-Mixed Circuits. 2470-2473 - Tetsushi Ueta, Takuji Kousaka, Shigeki Tsuji:
Occasional Delayed Feedback Control for Switched Autonomous Systems. 2474-2477 - Zhibo Zhou, Tong Zhou, Jinxiang Wang:
Performance of Multi-User DCSK Communication System Over Multipath Fading Channels. 2478-2481 - Salih Ergün
A Chaos-Modulated Dual Oscillator-Based Truly Random Number Generator. 2482-2485 - Kuniyasu Shimizu, Hisa-Aki Tanaka, Osamu Masugata, Tetsuro Endo:
Phase Synchronization in Injection-'Un'locking Oscillator Arrays. 2486-2489 - Régis Roubadia, Sami Ajram, Guy Cathébras:
Design of a Low Jitter Multi-Phase Realigned PLL in submicronic CMOS technology. 2490-2493 - Jin Zhou, Junan Lu, Jinhu Lu
Adaptive Pinning Synchronization of A General Complex Dynamical Network. 2494-2497 - Eugenio Culurciello, Pujitha Weerakoon:
Vertically-Integrated Three-Dimensional SOI Photodetectors. 2498-2501 - Bo Wang, Zhihai He:
Distributed Optimization Over Wireless Sensor Networks using Swarm Intelligence. 2502-2505 - Chung-Ching Shen, Roni Kupershtok, Bo Yang, Felice Maria Vanin, Xi Shao, Datta Sheth, Neil Goldsman, Quirino Balzano, Shuvra S. Bhattacharyya:
Compact, Low Power Wireless Sensor Network System for Line Crossing Recognition. 2506-2509 - Fariborz Fereydouni-Forouzandeh
A New 10 Gbps Traffic Management algorithm for High-speed Networks. 2510-2513 - R. Mahesh, A. Prasad Vinod
An Architecture For Integrating Low Complexity and Reconfigurability for Channel filters in Software Defined Radio Receivers. 2514-2517 - R. Mahesh, A. Prasad Vinod
Frequency Response Masking based Reconfigurable Channel Filters for Software Radio Receivers. 2518-2521 - Zhiyu Ru, Eric A. M. Klumperink, Bram Nauta:
On the Suitability of Discrete-Time Receivers for Software-Defined Radio. 2522-2525 - Faheem Sheikh, Shahid Masud:
Improved Factorization for Sample Rate Conversion In Software Defined Radios. 2526-2529 - Nathan M. Neihart, Sumit Roy, David J. Allstot:
A Parallel, Multi-Resolution Sensing Technique for Multiple Antenna Cognitive Radios. 2530-2533 - Brad R. Jackson, You Zheng, Carlos E. Saavedra
A CMOS Direct-Digital BPSK Modulator Using an Active Balun and Common-Gate Switches. 2534-2537 - Chueh-Hao Yu, Day-Uei Li:
A 2.5 Gb/s CMOS Burst-Mode Limiting Amplifier for GPON System. 2538-2541 - Ivan Chee Hong Lai, Yuki Kambayashi, Minoru Fujishima
50GHz Double-Balanced Up-Conversion Mixer Using CMOS 90nm Process. 2542-2545 - Day-Uei Li, Wen-Hui Chen, Long-Xi Chang, Chueh-Hao Yu:
A 3.8-Gb/s CMOS Laser Driver with Automatic Power Control Using Thermistors. 2546-2549 - Adrian Tang, Fei Yuan, Eddie Law:
A New CMOS BPSK Modulator with Optimal Transaction Bandwidth Control. 2550-2553 - Nader Kalantari, Michael M. Green:
All-CMOS High-Speed CML Gates with Active Shunt-Peaking. 2554-2557 - Ji-Yong Jeong, Gil-Su Kim, Seung-Hoon Oh, Kyu-Young Kim, Soo-Won Kim:
The Wide Input Range Automatic-Threshold Control Circuit for High Definition Digital Audio Interface. 2558-2561 - Yike Cui, Baoyong Chi, Minjie Liu, Yulei Zhang, Yongming Li, Zhihua Wang, Patrick Chiang:
Process Variation Compensation of a 2.4GHz LNA in 0.18um CMOS Using Digitally Switchable Capacitance. 2562-2565 - Ahmed Saad, Khaled M. Sharaf:
A Fully Integrated 2.4GHz CMOS Frequency Synthesizer Using a Ring-Based VCO with Inductive Peaking. 2566-2569 - W. Kenneth Jenkins, Chandrasekhar Radhakrishnan, Siddharth Pal:
Fault Tolerant Signal Processing for Masking Transient Errors in VLSI Signal Processors. 2570-2573 - Zhuo Xu, Junyan Ren, Xuejing Wang, Fan Ye:
Implementation of Folded Sliding Block Viterbi Decoders for MB-OFDM UWB Communication System. 2574-2577 - Jing Wang, Lang Mai, Yanjie Peng, Jun Han, Xiaoyang Zeng:
An Energy-Proportion Synchronization Method for IR-UWB Communications. 2578-2581 - Zhen-qing Guo, Yang Xiao, Moon Ho Lee:
Multiuser Detection Based on Particle Swarm Optimation Algorithm. 2582-2585 - Afshin Niktash, Hooman Parizi, Nader Bagherzadeh:
Application of a Heterogeneous Reconfigurable Architecture to OFDM Wireless Systems. 2586-2589 - Seungbeom Lee, Sin-Chong Park:
Modified SDF Architecture for Mixed DIF/DIT FFT. 2590-2593 - Liang Liu
Design of Low-Power, 1GS/s Throughput FFT Processor for MIMO-OFDM UWB Communication System. 2594-2597 - Chitranjan K. Singh, Naofal Al-Dhahir, Poras T. Balsara:
Effect of Word-length Precision on the Performance of MIMO Systems. 2598-2601 - Chun-Hao Liao, To-Ping Wang, Tzi-Dar Chiueh:
A Novel Low-Complexity Rayleigh Fader for Real-Time Channel Modeling. 2602-2605 - To-Ping Wang, Chun-Hao Liao, Tzi-Dar Chiueh:
A Real-Time Digital Baseband MIMO Channel Emulation System. 2606-2609 - Johan Eilert, Di Wu, Dake Liu:
Efficient Complex Matrix Inversion for MIMO Software Defined Radio. 2610-2613 - Kenneth K. O, Changhua Cao, Eunyoung Seok, Swaminathan Sankaran:
CMOS Millimeter-Wave Signal Sources and Detectors. 2614-2617 - Ro-Min Weng, Po-Cheng Lin:
A 1.5-V Low-Power Common-Gate Low Noise Amplifier for Ultrawideband Receivers. 2618-2621 - Hamid Nejati, Tamer Ragheb, Arthur Nieuwoudt, Yehia Massoud:
Modeling and Design of Ultrawideband Low Noise Amplifiers with Generalized Impedance Matching Networks. 2622-2625 - Fotis Plessas, Andreas Papalambrou, Grigorios Kalivas:
A Subharmonic Injection-Locked Self-Oscillating Mixer. 2626-2629 - Joan Lluís Lopez, Jordi Teva, Arantxa Uranga, Francesc Torres
Mixing in a 220MHz CMOS-MEMS. 2630-2633 - Jinhu Lu
A Brief Overview of the Complex Biological and Engineering Networks. 2634-2637 - Chai Wah Wu
On two approaches to analyzing consensus in complex networks. 2638-2641 - Jin Fan, Xiao Fan Wang, Xiang Li:
Enhancing Synchronizabilities of Power-Law Networks. 2642-2645 - Wallace Kit-Sang Tang, Yu Mao, Ljupco Kocarev:
Identification and monitoring of biological neural network. 2646-2649 - Liang Chen, Jinhu Lu
Synchronization of the Time-Varying Discrete Biological Networks. 2650-2653 - Susu Yao, Weisi Lin, Ee Ping Ong
Image Quality Assessment using Foveated Wavelet Error Sensitivity and Isotropic Contrast. 2654-2657 - Ruth Aguilar-Ponce
Pixel-Level Image Fusion Scheme based on Linear Algebra. 2658-2661 - Gwo Giun Lee, Hsin-Te Li, Ming-Jiun Wang, He-Yuan Lin:
Motion Adaptive Deinterlacing via Edge Pattern Recognition. 2662-2665 - Kaushik Gopalan, Takis Kasparis:
Background stabilization and debris flagging in launch pad videos. 2666-2669 - Yu-Chia Chung, Zhihai He:
Low-Complexity and Reliable Moving Objects Detection and Tracking for Aerial Video Surveillance with Small UAVS. 2670-2673 - David López Vilariño, Víctor M. Brea, Vicente Moreno, Diego Cabello
CNN Implementation of Spin Filters for Electronic Speckle Pattern Interferometry Applications. 2674-2677 - David López Vilariño, Piotr Dudek:
Evolution of Pixel Level Snakes towards an efficient hardware implementation. 2678-2681 - Natalia A. Fernandez-Garcia, Víctor M. Brea, Diego Cabello
Area and Time Efficient Cellular Non-linear Networks. 2682-2685 - Dietmar Fey, Marcus Komann
An Organic Computing architecture for visual microprocessors based on Marching Pixels. 2686-2689 - Carlos M. Domínguez-Matas, Ricardo Carmona-Galán
A Focal-Plane Image Processor for Low Power Adaptive Capture and Analysis of the Visual Stimulus. 2690-2693 - João M. S. Silva, L. Miguel Silveira
On the Effectiveness of Reducing Large Linear Networks with Many Ports. 2694-2697 - Janakiram G. Sankaranarayanan, Kartikeya Mayaram:
Noise Simulation and Modeling for MEMS Varactor Based RF VCOs. 2698-2701 - Angan Das, Ranga Vemuri
GAPSYS: A GA-based Tool for Automated Passive Analog Circuit Synthesis. 2702-2705 - He Peng, Chung-Kuan Cheng:
Fast Transient Simulation of Lossy Transmission Lines. 2706-2709 - Fan Yang, Xuan Zeng, Yangfeng Su, Dian Zhou:
RLCSYN: RLC Equivalent Circuit Synthesis for Structure-Preserved Reduced-order Model of Interconnect. 2710-2713 - Hon Keung Kwan, Aimin Jiang:
Design of IIR Variable Fractional Delay Digital Filters. 2714-2717 - Takao Hinamoto, Toru Oumi, Osemekhian I. Omoifo, Wu-Sheng Lu:
On Frequency-Weighted l2-Sensitivity Analysis and Minimization of 2-D State-Space Digital Filters Subject to l2-Scaling Constraints. 2718-2721 - Shunsuke Yamaki, Masahide Abe, Masayuki Kawamata:
A Fast Convergence Algorithm for L2-Sensitivity Minimization of 2-D Separable-Denominator State-Space Digital Filters. 2722-2725 - C. C. Tseng:
Digital Integrator Design Using Recursive Romberg Integration Rule and Fractional Sample Delay. 2726-2729 - Seungjin Lee, Sunyoung Kim, Hoi-Jun Yoo:
A Low Power Digital Signal Processor with Adaptive Band Activation for Digital Hearing Aid Chip. 2730-2733 - Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto:
Dynamic Reconfigurability in Embedded System Design. 2734-2737 - Yang Qu, Kari Tiensyrjä, Juha-Pekka Soininen, Jari Nurmi
System-Level Design for Partially Reconfigurable Hardware. 2738-2741 - Chun-Hsian Huang, Kai-Jung Shih
Dynamically Swappable Hardware Design in Partially Reconfigurable Systems. 2742-2745 - Dirk Koch, Christian Haubelt, Thilo Streichert, Jürgen Teich:
Modeling and Synthesis of Hardware-Software Morphing. 2746-2749 - Yana Yankova, Koen Bertels, Stamatis Vassiliadis, Roel Meeuws, Arcilio Virginia:
Automated HDL Generation: Comparative Evaluation. 2750-2753 - Ching-Te Chiu, Yu-Hao Hsu, Min-Sheng Kao, Hou-Cheng Tzeng, Ming-Chang Du, Ping-Ling Yang, Ming-Hao Lu, Fanta Chen, Hung-Yu Lin, Jen-Ming Wu, Shuo-Hung Hsu, Yarsun Hsu:
A Scalable Load Balanced Birkhoff-von Neumann Symmetric TDM Switch IC for High-Speed Networking Applications. 2754-2757 - Daesun Oh, Keshab K. Parhi
Performance of Quantized Min-Sum Decoding Algorithms for Irregular LDPC Codes. 2758-2761 - François Nougarou, Daniel Massicotte, Messaoud Ahmed Ouameur:
Adaptive Duplicated Filters and Interference Canceller for DS-CDMA Systems: Part II - FPGA Implementation. 2762-2765 - Ashkan Ashrafi, Aleksandar Milenkovic
A 1GHz Direct Digital Frequency Synthesizer Based on the Quasi-Linear Interpolation Method. 2766-2769 - Matthias May, Christian Neeb, Norbert Wehn:
Evaluation of High Throughput Turbo-Decoder Architectures. 2770-2773 - Zhiyu Liu, Volkan Kursun
High Read Stability and Low Leakage Cache Memory Cell. 2774-2777 - Olivier Thomas, Marina Reyboz, Marc Belleville:
Sub-1V, Robust and Compact 6T SRAM cell in Double Gate MOS technology. 2778-2781 - Chun-Chen Yeh, Eugenio Culurciello:
Nonvolatile Flash Memories in Silicon-on-sapphire CMOS. 2782-2785 - Daniel R. Blum, José G. Delgado-Frias:
Hardened by Design Techniques for Implementing Multiple-Bit Upset Tolerant Static Memories. 2786-2789 - Afshin Nourivand, Chunyan Wang, M. Omair Ahmad:
An Adaptive Sleep Transistor Biasing Scheme for Low Leakage SRAM. 2790-2793 - Haolu Xie, Xin Wang, Albert Z. Wang, Bo Qin, Hongyi Chen, Yumei Zhou, Bin Zhao:
A Varying Pulse Width Second Order Derivative Gaussian Pulse Generator for UWB Transceivers in CMOS. 2794-2797 - Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma:
An On-Chip Delta-Time-to-Voltage Converter for Real-Time Measurement of Clock Jitter. 2798-2801 - Chyuen-Wei Ang, Yuanjin Zheng, Chun-Huat Heng:
A Multi-band CMOS Low Noise Amplifier for Multi-standard Wireless Receivers. 2802-2805 - Jingyu Hu, Mike R. May, Matt D. Felder, Len DiSanza, Lawrence H. Ragan:
A Fully Integrated Inductorless Low Noise Amplifier with 1dB-Step Programmable Gain for FM Radio Receiver Front-End. 2806-2809 - Mark Tuckwell, Christos Papavassiliou:
Exploration of energy requirements at the output of an LNA from a thermodynamic perspective. 2810-2813 - Shunsuke Koshita, Masahide Abe, Masayuki Kawamata:
State-Space Analysis of Power Complementary Analog Filters. 2814-2817 - Mustafa Acar, Anne-Johan Annema, Bram Nauta:
Analytical Design Equations for Class-E Power Amplifiers with Finite DC-Feed Inductance and Switch On-Resistance. 2818-2821 - Shyam Subramanian, David V. Anderson, Paul E. Hasler, Bradley A. Minch:
Optimal Synthesis of MITE Translinear Loops. 2822-2825 - B. Robert Gregoire, Un-Ku Moon:
Process-Independent Resistor Temperature-Coefficients using Series/Parallel and Parallel/Series Composite Resistors. 2826-2829 - Haibo Fei, Randall L. Geiger:
Linear Current Division Principles. 2830-2833 - Alexander Fish
Low Power CMOS Image Sensors Employing Adaptive Bulk Biasing Control (AB2C) Approach. 2834-2837 - Zhiqiang Lin, Michael W. Hoffman, Walter D. Leon-Salas, Nathan Schemm, Sina Balkir:
A CMOS Front-End for a Lossy Image Compression Sensor. 2838-2841 - Zheng Yang, Viktor Gruev, Jan Van der Spiegel:
Low Fixed Pattern Noise Current-mode Imager Using Velocity Saturated Readout Transistors. 2842-2845 - Viktor Gruev, Zheng Yang, Jan Van der Spiegel, Ralph Etienne-Cummings:
Two Transistor Current Mode Active Pixel Sensor. 2846-2849 - Francisco Serra-Graells
A Self-Biased and FPN-Compensated Digital APS for Hybrid CMOS Imagers. 2850-2853 - Xiang Gao, Eric A. M. Klumperink, Bram Nauta:
Low-Jitter Multi-phase Clock Generation: A Comparison between DLLs and Shift Registers. 2854-2857 - Essam Atalla, Emad Hegazi, M. Marzouk Ibrahim:
On the Design of Error Cancellation Network for MASH Sigma-Delta-Frequency discriminators. 2858-2861 - Raghuram Jonnalagedda, Kartikeya Mayaram:
Design of Very Low Noise 4.2GHz Clapp VCOs. 2862-2865 - Chung-Yu Wu, Shun-Wei Hsu, Wen-Chieh Wang:
A 24-GHz CMOS Current-Mode Power Amplifier with High PAE and Output Power. 2866-2869 - Chao Yang, Andrew J. Mason:
Precise RSSI with High Process Variation Tolerance. 2870-2873 - Andreas G. Andreou
Enabling Technologies in Drug Delivery and Clinical Care. 2874-2877 - Xiaobo Zhou, Jian Chen, Jinmin Zhu, Fuhai Li, Xudong Huang, Stephen T. C. Wong:
Study of CuO Nanoparticle-induced Cell Death by High Content Cellular Fluorescence Imaging and Analysis. 2878-2881 - James Xing, Jie Zeng
Gold-Based Nanoparticles for Breast Cancer Diagnosis and Treatment. 2882-2885 - Jennifer Blain Christen
Localized closed-loop temperature control and regulation in hybrid silicon/silicone life science microsystems. 2886-2889 - Ching-Hsing Luo, Po-Yuan Chen, Chun-Hao Teng, Sheng-Nan Wu
Reliability Analysis of Physiological Phenomena by Cardiac Action Potential Model. 2890-2893 - Stephen Warrington, Subramania Sudharsanan, Wai-Yip Chan:
Architecture for Multiple Reference Frame Variable Block Size Motion Estimation. 2894-2897 - Hyojin Choi, Wonchul Lee, Wonyong Sung:
Memory Access Reduced Software Implementation of H.264/AVC Sub-pixel Motion Estimation Using Differential Data Encoding. 2898-2901 - Der-Chun Cherng, Shao-Yi Chien:
Video Segmentation with Model-Based Sprite Generation for Panning Surveillance Cameras. 2902-2905 - Yu Li, Yanmei Qu, Yun He:
Memory Cache Based Motion Compensation Architecture for HDTV H.264/AVC Decoder. 2906-2909 - Dajiang Zhou, Peilin Liu:
A Hardware-Efficient Dual-Standard VLSI Architecture for MC Interpolation in AVS and H.264. 2910-2913 - Paolo Arena, G. Buscemi, B. Carambia, Ciro Del Negro, Luigi Fortuna, Mattia Frasca, Annamaria Vicari:
Models of Lava Flow Through the CNN-Based E^3 Architecture. 2914-2917 - Christian Merkwirth, Maciej Ogorzalek:
Applying CNN to Cheminformatics. 2918-2921 - Matthias Güdemann
Modeling of self-adaptive systems with SCADE. 2922-2925 - Eric K. C. Tsang, Bertram Emil Shi
Probabilistic Modelling of Phase-tuned Disparity Energy Neuron Populations. 2926-2929 - Gunter Geis, Frank Gollas, Ronald Tetzlaff:
On the Implementation of Cellular Wave Computing Methods by Hardware Learning. 2930-2933 - Henry H. Y. Chan, Zeljko Zilic:
A Performance Driven Layout Compaction Optimization Algorithm for Analog Circuits. 2934-2937 - Mustafa Badaroglu, Geert Van der Plas, Piet Wambacq, Stéphane Donnay, Georges G. E. Gielen
Scalable Gate-Level Models for Power and Timing Analysis. 2938-2941 - Dan Zhao, Ronghua Huang, Tomokazu Yoneda, Hideo Fujiwara:
Power-Aware Multi-Frequency Heterogeneous SoC Test Framework Design with Floor-Ceiling Packing. 2942-2945 - Cyrille Chavet
A Methodology for Efficient Space-Time Adapter Design Space Exploration: A Case Study of an Ultra Wide Band Interleaver. 2946-2949 - Alonso Morgado, Rocío del Río, José M. de la Rosa:
A SIMULINK Block Set for the High-Level Simulation of Multistandard Radio Receivers. 2950-2953 - Zhiping Lin, Yongzhi Liu:
FRM Filter Design with Group Delay Constraint Using Second-Order Cone Programming. 2954-2957 - Yong Lian
Complexity Reduction of FRM Filters via Multiplication-Free Prefilter-Equalizer Structures. 2958-2961 - Yong Ching Lim, Ya Jun Yu, Kok Lay Teo, Tapio Saramäki:
FRM-Based FIR Filters with Minimum Coefficient Sensitivities. 2962-2965 - T. Q. Hung, Hoang Duong Tuan, Truong Q. Nguyen:
Design of Diamond and Circular Filters by Semi-definite Programming. 2966-2969 - Xiaoping Lai, Hon Keung Kwan
An Online Procedure for Linear-Phase 2-D FIR Filters of Smallest Size with Magnitude Error Constraint. 2970-2973 - Anthony Lombard, Herbert Buchner, Walter Kellermann:
Improved Wideband Blind Adaptive System Identification Using Decorrelation Filters for the Localization of Multiple Speakers. 2974-2977 - Malay Gupta, Scott C. Douglas
Performance Evaluation of Convolutive Blind Source Separation of Mixtures of Unequal-Level Speech Signals. 2978-2981 - Intae Lee, Te-Won Lee:
On Modelling the Frequency Components of Speech with Norm-Invariant Joint Densities. 2982-2985 - Tomohiro Nakatani, Takafumi Hikichi, Keisuke Kinoshita
Robust blind dereverberation of speech signals based on characteristics of short-time speech segments. 2986-2989 - Biing-Hwang Juang, Tomohiro Nakatani:
Joint Source-Channel Modeling and Estimation for Speech Dereverberation. 2990-2993 - Arash Ahmadi
Multiple-Width Bus Partitioning Approach to Datapath Synthesis. 2994-2997 - Massimo Alioto, Gaetano Palumbo:
High-Speed/Low-Power Mixed Full Adder Chains: Analysis and Comparison versus Technology. 2998-3001 - R. Stapenhurst, Koushik Maharatna, Jimson Mathew, José L. Núñez-Yáñez, Dhiraj K. Pradhan:
On the Hardware Reduction of z-Datapath of Vectoring CORDIC. 3002-3005 - Amir Agah, Seid Mehdi Fakhraie, Azita Emami-Neyestanak
Tertiary-Tree 12-GHz 32-bit Adder in 65nm Technology. 3006-3009 - Xuehai Qian, Hao Zhang, Jingang Yang, He Huang, Junchao Zhang, Dongrui Fan:
Circuit implementation of floating point range reduction for trigonometric functions. 3010-3013 - Byung-Do Yang, Jae-Eun Lee, Jang-Su Kim, Junghyun Cho, Seung-Yun Lee, Byoung-Gon Yu:
A Low Power Phase-Change Random Access Memory using a Data-Comparison Write Scheme. 3014-3017 - Jungseob Lee, Azadeh Davoodi:
Comparison of Dual-Vt Configurations of SRAM Cell Considering Process-Induced Vt Variations. 3018-3021 - Bastien Giraud, Amara Amara, Andrei Vladimirescu:
A Comparative Study of 6T and 4T SRAM Cells in Double-Gate CMOS with Statistical Variation. 3022-3025 - Sang-uhn Cha, Hongil Yoon:
High Speed, Minimal Area, and Low Power SEC Code for DRAMs with Large I/O Data Widths. 3026-3029 - Sandeep Patil, Michael Wieckowski, Martin Margala:
A Self-Biased Charge-Transfer Sense Amplifier. 3030-3033 - Tamer A. Abdelrahim, Tarek Elesseily, Ahmed Saad Abdou, Khaled M. W. Sharaf:
A 12-mW Fully Integrated Low-IF dual-band GPS Receiver on 0.13-µm CMOS. 3034-3038 - Kenneth A. Townsend, James W. Haslett, John Nielsen:
A CMOS Integrated Power Detector for UWB. 3039-3042 - Tuan-Anh Phan, Vladimir Krizhanovskii, Seok-Kyun Han, Sang-Gug Lee, Hyun-seo Oh, Nae-Soo Kim:
4.7pJ/pulse 7th Derivative Gaussian Pulse Generator for Impulse Radio UWB. 3043-3046 - Muhammad Usama, Tad A. Kwasniewski:
A 40 GHz Quadrature LC VCO and Frequency Divider in 90-nm CMOS Technology. 3047-3050 - Baoyong Chi, Xueyi Yu, Woogeun Rhee
A Fractional-N PLL for Digital Clock Generation With an FIR-Embedded Frequency Divider. 3051-3054 - Arindam Basu
A Low-Power, Compact, Adaptive Logarithmic Transimpedance Amplifier Operating over Seven Decades of Current. 3055-3058 - Adnan Gundel, William N. Carr:
Ultra Low Power CMOS PLL Clock Synthesizer for Wireless Sensor Nodes. 3059-3062 - Johan Raman, Pieter Rombouts, Ludo Weyten:
An Unconstrained Architecture for High-Order Sigma Delta Force-Feedback Inertial Sensors. 3063-3066 - Matti Paavola, Mikko Saukoski, Mika Laiho
A Micropower Voltage, Current, and Temperature Reference for a Low-Power Capacitive Sensor Interface. 3067-3070 - Balaji Jayaraman, Navakanta Bhat:
High Precision 16-bit Readout Gas Sensor Interface in 0.13µm CMOS. 3071-3074 - Jesús Costas-Santos, Teresa Serrano-Gotarredona, Rafael Serrano-Gotarredona, Bernabé Linares-Barranco:
An AER Contrast Retina with On-Chip Calibration. 3075-3078 - Rico Moeckel, Shih-Chii Liu:
Motion Detection Circuits for a Time-To-Travel Algorithm. 3079-3082 - Matthias Oster, Patrick Lichtsteiner, Tobi Delbrück
A Spike-Based Saccadic Recognition System. 3083-3086 - Chung-Yu Wu, Chien-Ta Huang:
A CMOS Expansion/Contraction Motion Sensor with a Retinal Processing Circuit for Z-motion Detection Applications. 3087-3090 - Daniel Bernhard Fasnacht, Tobi Delbrück
Dichromatic spectral measurement circuit in vanilla CMOS. 3091-3094 - Jeffrey Johnson, Vipul Jain, Payam Heydari:
A Nonlinear Model for Phase Noise and Jitter in LC Oscillators. 3095-3098 - James Ayers, Kartikeya Mayaram, Terri S. Fiez:
A Low Power BFSK Super-Regenerative Transceiver. 3099-3102 - Holly Pekau, James W. Haslett:
A 0.18µm CMOS 2.1GHz Sub-sampling Receiver Front End with Fully Integrated Second- and Fourth-Order Q-Enhanced Filters. 3103-3106 - Paul-Peter Sotiriadis
Diophantine Frequency Synthesis The Mathematical Principles. 3107-3110 - Adnan Gundel, William N. Carr:
A Low Jitter CMOS PLL Clock Synthesizer with 20-400 MHz Locking Range. 3111-3114 - Joseph N. Y. Aziz, Rafal Karakiewicz, Roman Genov, Alan W. L. Chiu, Berj L. Bardakjian, Miron Derchansky, Peter L. Carlen:
In Vitro Epileptic Seizure Prediction Microsystem. 3115-3118 - Darrin J. Young, Mark A. Zurcher, Wen H. Ko, Maroun Semaan, Cliff A. Megerian:
Implantable MEMS Accelerometer Microphone for Cochlear Prosthesis. 3119-3122 - Timothy K. Horiuchi
Spike discrimination using amplitude measurements with a low-power CMOS neural amplifier. 3123-3126 - Ming Yin, Maysam Ghovanloo:
Using Pulse Width Modulation for Wireless Transmission of Neural Signals in a Multichannel Neural Recording System. 3127-3130 - Masoud Roham, Pedram Mohseni:
A Wireless IC for Wide-Range Neurochemical Monitoring Using Amperometry and Fast-Scan Cyclic Voltammetry. 3131-3134 - Yi-Chih Chao, Shih-Tse Wei, Jar-Ferr Yang, Bin-Da Liu:
Combined Decoding and Flexible Transform Designs for Effective H.264/AVC Decoders. 3135-3138 - Kuan-Hung Chen, Yuan-Sun Chu, Yu-Min Chen, Jiun-In Guo:
A High-Speed/Low-Power Multiplier Using an Advanced Spurious Power Suppression Technique. 3139-3142 - Jian Lou, Ashish Jagmohan, Dake He, Ligang Lu, Ming-Ting Sun:
Statistical Analysis Based H.264 High Profile Deblocking Speedup. 3143-3146 - Li Zhang, Xiaolin Wu, Ning Zhang, Wen Gao, Qiang Wang, Debin Zhao:
Context-based Arithmetic Coding Reexamined for DCT Video Compression. 3147-3150 - Ke Zhang, Xiaoyang Wu, Lu Yu
An Area-efficient VLSI Implementation of CA-2D-VLC Decoder for AVS. 3151-3154 - Mauro Di Marco, Mauro Forti, Massimo Grazzini, Paolo Nistri, Luca Pancioni
A Study on Convergence of Competitive CNNs. 3155-3158 - Norikazu Takahashi
Sufficient Conditions for 1-D CNNs with Opposite-Sign Templates to Perform Connected Component Detection. 3159-3162 - Fernando Corinto
Limit Cycles and Bifurcations in Nonlinear Oscillatory Networks. 3163-3166 - Michele Bonnin, Fernando Corinto
Small Amplitude, Phase Locked Response in Oscillatory Networks with Delays. 3167-3170 - Stanley Y. M. Lam, Bertram Emil Shi
Active Visual Tracking of Heading Direction By Combining Motion Energy Neurons. 3171-3174 - Shingo Yoshizawa, Yoshikazu Miyanaga
Use of a Variable Wordlength Technique in an OFDM Receiver to Reduce Energy Dissipation. 3175-3178 - Dengwei Fu:
A Low-Cost Phase-Noise Cancellation Method for OFDM Systems. 3179-3182 - Chen Meng, Jamal Tuqan:
Fractionally Spaced Orthogonal Frequency Division Multiplexing Systems. 3183-3186 - François Nougarou, Messaoud Ahmed Ouameur, Daniel Massicotte:
Adaptive Duplicated Filters and Interference Canceller for DS-CDMA Systems: Part I - Algorithm. 3187-3190 - T. Anil Kumar, Korrai Deergha Rao:
Breakdown Point Analysis of a New M-Estimator for Robust Multiuser Detection in Non-Gaussian Channels. 3191-3194 - Yunhua Wang, Linda DeBrunner, Dayong Zhou, Victor E. DeBrunner:
A Multiplier Structure Based on a Novel Real-time CSD Recoding. 3195-3198 - Ahmed Abdelgawad, Magdy A. Bayoumi:
High Speed and Area-Efficient Multiply Accumulate (MAC) Unit for Digital Signal Prossing Applications. 3199-3202 - Soo-Chang Pei, Jian-Jiun Ding:
Scaled Lifting Scheme and Generalized Reversible Integer Transform. 3203-3206 - Shrutisagar Chandrasekaran, Abbes Amira:
Novel Sparse OBC based Distributed Arithmetic Architecture for Matrix Transforms. 3207-3210 - G. L. Bernocchi, Gian Carlo Cardarilli, Andrea Del Re, Alberto Nannarelli
Low-power adaptive filter based on RNS components. 3211-3214 - Mohamed H. Abu-Rahma, Mohab Anis:
Variability in VLSI Circuits: Sources and Design Considerations. 3215-3218 - Yehia Massoud, Arthur Nieuwoudt, Tamer Ragheb:
Variability-Aware Synthesis for Wideband Low Noise Amplifiers. 3219-3222 - Ja Chun Ku, Yehea I. Ismail:
Attaining Thermal Integrity in Nanometer Chips. 3223-3226 - Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin:
Substrate Noise Reduction Based On Noise Aware Cell Design. 3227-3230 - Volkan Kursun
Leakage-Aware Design of Nanometer SoC. 3231-3234 - Yong Hu, Joseph N. Mak, Hongtao Liu, Keith D. K. Luk:
ECG Cancellation for Surface Electromyography Measurement Using Independent Component Analysis. 3235-3238 - Feng Wan, Wei-Ping Zhu
Linear Prediction Based Semi-Blind Channel Estimation for MIMO-OFDM System. 3239-3242 - Wai Yie Leong
Noisy Component Extraction (Noice). 3243-3246 - Hiroshi Sawada, Shoko Araki
Measuring Dependence of Bin-wise Separated Signals for Permutation Alignment in Frequency-domain BSS. 3247-3250 - Ke Deng, Qinye Yin, Huiming Wang:
Closed Form Parameters Estimation for Near Field Sources. 3251-3254 - Massimo Alioto, Gaetano Palumbo:
Design of Fast Large Fan-In CMOS Multiplexers Accounting for Interconnects. 3255-3258 - A. Neslin Ismailoglu, Murat Askar
Application of Bit-level Pipelining to Delay Insensitive Null Convention Adders. 3259-3262 - Mitra Mirhassani, Majid Ahmadi, Graham A. Jullien:
Digital Multiplication using Continuous Valued Digits. 3263-3266 - Kok-Leong Chang, Bah-Hwee Gwee, Yuanjin Zheng:
An Asynchronous Dual-Rail Multiplier based on Energy-Efficient STFB Templates. 3267-3270 - Sreehari Veeramachaneni
Novel High-Speed Redundant Binary to Binary converter using Prefix Networks. 3271-3274 - Viral K. Parikh, Poras T. Balsara, Oren E. Eliezer, Jaimin Mehta:
A Low Power and Low Quantization Noise Digital Sigma-Delta Modulator for Wireless Transmitters. 3275-3278 - Viral K. Parikh, Poras T. Balsara, Oren E. Eliezer, Jaimin Mehta:
A Low Area and Low Power Digital Band-Pass Sigma-Delta Modulator for Wireless Transmitters. 3279-3282 - Minsik Ahn, Chang-Ho Lee, Joy Laskar:
CMOS High Power SPDT Switch using Multigate Structure. 3283-3286 - Sohrab Samadian:
A Low Phase Noise Quad-Band CMOS VCO with Minimized Gain Variation for GSM/GPRS/EDGE. 3287-3290 - Khurram Waheed, Robert Bogdan Staszewski
Injection Spurs due to Reference Frequency Retiming by a Channel Dependent Clock at the ADPLL RF Output and its Mitigation. 3291-3294 - Kofi M. Odame, Paul E. Hasler:
An Adaptive Quality-Factor Bandpass Filter. 3295-3298 - Jader A. De Lima:
A Compact On-Chip Capacitive-Coupling Scheme for Very-Low Frequency Applications. 3299-3302 - Andreas G. Katsiamis, Henry M. D. Ip, Emmanuel M. Drakakis:
A Practical CMOS Companding Sinh Lossy Integrator. 3303-3306 - Xi Zhu, Yichuang Sun, James Moritz:
A 0.18µm CMOS 300MHz Current-Mode LF Seventh-order Linear Phase Filter for Hard Disk Read Channels. 3307-3310 - Mladen Vucic, Goran Molnar
Design of Systems with Prescribed Impulse Response Based on Second-Order Cone Programming. 3311-3314 - R. G. Bolea, Antonio Luque, José M. Quero:
Single-Wafer Pressure Capacitive Sensor. 3315-3318 - Jaume Verd
CMOS Cantilever-based Oscillator for Attogram Mass Sensing. 3319-3322 - Zhaohui Cai, Jianzhong Hao, Shiro Takahashi, Jun Hong Ng, Yongdong Gong, Paulose Varghese:
Simultaneous Measurement of Temperature and Lateral Force Using an Arc-Shaped FBG Sensor Module. 3323-3326 - Pablo Ituero
Leakage-based On-Chip Thermal Sensor for CMOS Technology. 3327-3330 - Leila Shepherd, Pantelis Georgiou
A novel voltage-clamped CMOS ISFET sensor interface. 3331-3334 - Retdian Agung Nicodimus, Shigetaka Takagi, Nobuo Fujii:
Improvement of Bootstrapped Switch using Track and Precharge Phase. 3335-3338 - Dongwon Seo, Yuhua Guo, Manu Mishra:
High-Voltage Analog Circuit Design using Thin-Oxide MOS Devices only. 3339-3342 - Robert Chebli, Mohamad Sawan, Yvon Savaria, Kamal El-Sankary:
High-Voltage DMOS Integrated Circuits with Floating Gate Protection Technique. 3343-3346 - Reza Navid, Thomas H. Lee, Robert W. Dutton:
A Circuit-Based Noise Parameter Extraction Technique for MOSFETs. 3347-3350 - Jeffrey S. Walling, David J. Allstot:
Monolithic Spiral Transformers: A Design Methodology. 3351-3354 - Sylvie Renaud, Jean Tomas, Yannick Bornat
Neuromimetic ICs with analog cores: an alternative for simulating spiking neural networks. 3355-3358 - Paul E. Hasler, Scott Koziol, Ethan Farquhar, Arindam Basu
Transistor Channel Dendrites implementing HMM classifiers. 3359-3362 - Kai M. Hynna, Kwabena Boahen:
Silicon neurons that burst when primed. 3363-3366 - Johannes Schemmel, Daniel Brüderle, Karlheinz Meier, Boris Ostendorf:
Modeling Synaptic Plasticity within Networks of Highly Accelerated I&F Neurons. 3367-3370 - Giacomo Indiveri
Spike-based learning in VLSI networks of integrate-and-fire neurons. 3371-3374 - Stefan Mendel, Christian Vogel
On the Compensation of Magnitude Response Mismatches in M-channel Time-interleaved ADCs. 3375-3378 - Soon-Ik Cho, Suki Kim, Shin-Il Lim, Kwang-Hyun Baek
A 6-bit 2.5GSample/s Flash ADC using Immanent C2MOS Comparator in 0.18um CMOS. 3379-3382 - Antonio J. Ginés, Eduardo J. Peralías
Improved Background Algorithms for Pipeline ADC Full Calibration. 3383-3386 - Francesco Centurelli
A distortion model for pipeline Analog-to-Digital converters. 3387-3390 - Jingbo Duan, Fule Li, Liyuan Liu, Dongmei Li, Yongming Li, Zhihua Wang:
A Pipelined A/D Conversion Technique with Low INL and DNL. 3391-3394 - Jin-Tai Yan
Area-Driven Decoupling Capacitance Allocation in Noise-Aware Floorplan for Signal Integrity. 3395-3398 - Satoshi Tayu, Shuichi Ueno:
On the Complexity of Three-Dimensional Channel Routing (Extended Abstract). 3399-3402 - Masaya Takahashi, Takahiro Watanabe, Takeshi Yoshimura:
Construction of an (r11, r12, r22)-Tournament from a Score Sequence Pair. 3403-3406 - Gaurav Trivedi, H. Narayanan:
Application of Fast DC Analysis to Partitioning Hypergraphs. 3407-3410 - Haixia Yan, Zhuoyuan Li, Xianlong Hong, Qiang Zhou:
Unified Quadratic Programming Approach For 3-D Mixed Mode Placement. 3411-3414 - Wen-Chung Kao, Hong-Shuo Tai, Chia-Ping Shen, Jia-An Ye, Hong-Fa Ho:
A Pipelined Architecture Design for Trilateral Noise Filtering. 3415-3418 - Jin-Sung Kim, Hyuk-Jae Lee:
A PDP Sub-field Coding Algorithm for the Reduction of Errors due to Line Load Variation. 3419-3422 - Yasser Ismail
An Adaptive Block Size Phase Correlation Motion Estimation Using Adaptive Early Search Termination Technique. 3423-3426 - Ping Wei, Junli Li, Dongming Lu, Gang Chen:
A Fast and reliable switching median filter for highly corrupted images by impulse noise. 3427-3430 - Jin Xu, Jinghuo Guan, Xingdong Wang, Jun Sun, Guangtao Zhai, Zhengguo Li:
An OWE-based Algorithm for Line Scratches Restoration in Old Movies. 3431-3434 - Tian-Bo Deng:
High-Speed and Low-Cost Structures for Implementing Odd-Order Lagrange-Type Variable Fractional-Delay Filters. 3435-3438 - Juha Yli-Kaakinen, Tapio Saramäki:
A Simplified Structure for FIR Filters with an Adjustable Fractional Delay. 3439-3442 - Soo-Chang Pei, Huei-Shan Lin, Peng-Hua Wang:
Design of Allpass Fractional Delay Filter and Fractional Hilbert Transformer Using Closed-Form of Cepstral Coefficients. 3443-3446 - C. C. Tseng:
Closed-Form Design of Variable Fractional Order Integrator Using Complex Cepstrum. 3447-3450 - S. Vijay, A. Prasad Vinod
A Greedy Common Subexpression Elimination Algorithm for Implementing FIR Filters. 3451-3454 - Thomas Schierl, Cornelius Hellge, Shpend Mirta, Karsten Grüneberg, Thomas Wiegand:
Using H.264/AVC-based Scalable Video Coding (SVC) for Real Time Streaming in Wireless IP Networks. 3455-3458 - Chih-Wei Chiou, Chia-Ming Tsai, Chia-Wen Lin
Fast Mode Decision Algorithms for Adaptive GOP Structure in the Scalable Extension of H.264/AVC. 3459-3462 - Hung-Hui Juan, Hsiang-Chun Huang, Ching-Yao Huang, Tihao Chiang:
Scalable Video Streaming over Mobile WiMAX. 3463-3466 - Mattia C. O. Bogino, Pasquale Cataldi, Marco Grangetto, Enrico Magli, Gabriella Olmo
Sliding-Window Digital Fountain Codes for Streaming of Multimedia Contents. 3467-3470 - Qibin Sun, Zhi Li, Yong Lian
Joint Source-Channel-Authentication Resource Allocation for Multimedia overWireless Networks. 3471-3474 - Maurice G. Bellanger:
On the Performance of Two Constant Modulus Algorithms in Equalization with non-CM Signals. 3475-3478 - Parthapratim De:
Combined Linear Prediction and Subspace Based Blind Equalizers. 3479-3482 - Hiroki Matsumoto, Shuntaro Takasaki, Toshihiro Furukawa:
A proposal of a new blind equalizer using output signals of decision device. 3483-3485 - Mitsuru Kawamoto
Eigenvector Algorithms for Blind Deconvolution of MIMO-IIR Systems. 3486-3489 - Kiyotaka Kohno, Yujiro Inouye, Mitsuru Kawamoto
A Matrix Pseudo-Inversion Lemma and Its Application to Block-Based Adaptive Blind Deconvolution for MIMO Systems. 3490-3493 - Sung-Joon Jang, Moo-Kyoung Chung, Jaemoon Kim, Chong-Min Kyung:
Cache Miss-Aware Dynamic Stack Allocation. 3494-3497 - Kota Yamaguchi, Yoshihiro Watanabe, Takashi Komuro, Masatoshi Ishikawa:
Design of a Massively Parallel Vision Processor based on Multi-SIMD Architecture. 3498-3501 - Hou-Jen Ko, Chun-Jen Tsai:
A Double-Issue Java Processor Design for Embedded Applications. 3502-3505 - Pi-Chen Hsiao, Tay-Jyi Lin, Chih-Wei Liu, Chein-Wei Jen:
Latency-Tolerant Virtual Cluster Architecture for VLIW DSP. 3506-3509 - Yehua Gu, Xiaoyang Zeng, Jun Han, Jia Zhao:
A Low-cost and High-performance SoC Design for OMA DRM2 Applications. 3510-3513 - Stefano Marsili, Manfred Punzenberger:
Simple design equations of gain compression and distortion spectrum in broadband RF transceivers. 3514-3517 - Christian Wicpalek, Thomas Mayer, Linus Maurer, U. Vollenbruch, Tindaro Pittorino
Analysis of Spurious Emission and In-Band Phase Noise of an All Digital Phase Locked Loop for RF Synthesis using a Frequency Discriminator. 3518-3521 - Stefano Marsili:
Technique for Peak to Average Power Ratio Reduction suited for M-carrier WCDMA Base Station Transmitters. 3522-3525 - Charan Litchfield, Peter Lee, Richard J. Langley, John C. Batchelor:
Logarithmic Codecs for Adaptive Beamforming in WCDMA Downlink Channels. 3526-3529 - Andreas Burg
Regularized Frequency Domain Equalization Algorithm and its VLSI Implementation. 3530-3533 - Mikko Kaltiokallio, Saska Lindfors, Ville Saari, Jussi Ryynänen:
Design of Precise Gain GmC-leapfrog Filters. 3534-3537 - Juan Pablo Alegre, Santiago Celma, Belén Calvo, Jose Maria Garcia del Pozo:
A Novel CMOS Envelope Detector Structure. 3538-3541 - Marcello De Matteis, Stefano D'Amico, Andrea Baschirotto:
A 600mV 3.6mW 68dB DR 4th Order Analog Base Band Filter for WLAN Receivers. 3542-3545 - Ville Saari, Saska Lindfors:
Analysis of Common-Mode Induced Even-Order Distortion in a Pseudo-Differential gm-C Filter. 3546-3549 - Shanthi Pavan:
Singly Terminated & Bi-Transversal Transmission Line Filters for High Speed Adaptive Equalization. 3550-3553 - Bin Guo, Amine Bermak
A 4×4 Logarithmic Spike Timing Encoding Scheme for Olfactory Sensor Applications. 3554-3557 - Ndubuisi Ekekwe, Ralph Etienne-Cummings, Peter Kazanzides
Incremental Encoder Based Position and Velocity Measurements VLSI Chip with Serial Peripheral Interface. 3558-3561 - Andrew J. Mason, Yue Huang, Chao Yang, Jichun Zhang:
Amperometric Readout and Electrode Array Chip for Bioelectrochemical Sensors. 3562-3565 - Jina Kim, Benjamin L. Grisso, Dong S. Ha, Daniel J. Inman:
Digital Wideband Excitation Technique for Impedance-Based Structural Health Monitoring Systems. 3566-3569 - Silvana Sanudo, Favio R. Masson, Pedro Julián:
Bounded state space particle filter for network sensors. 3570-3573 - José Manuel Quero Reboul:
Voltage Elevator using a MEMS Resonator. 3574-3577 - Clement Joseph, Mounir Boukadoum, Joe Charlson, David Starikov, Abdelhak Bensaoula:
High-speed front end for LED-Photodiode based fluorescence lifetime measurement system. 3578-3581 - Vincenzo Ferragina, Massimo Ferri, Marco Grassi, Andrea Baschirotto:
A 12.4 ENOB Incremental A/D Converter for High-Linearity Sensors Read-Out Applications. 3582-3585 - Brian Gestner, Jason Tanner, David V. Anderson:
Glass Break Detector Analog Front-End Using Novel Classifier Circuit. 3586-3589 - Fule Li, Zhihua Wang, Dongmei Li:
An Incomplete Settling Technique for Pipelined Analog-to-Digital Converters. 3590-3593 - Wen-Shen Chou, Shu-Chieh Yang, Fu-Lung Hsueh, Heng-Chang Huang, Chih-Ji Hsiao:
A Low-Cost Triple-Channel 10-bit 250MHz DAC IP in 65nm CMOS Process. 3594-3597 - Yanyi Liu Wong, Marc H. Cohen, Pamela Abshire:
On-Line Histogram Equalization for Flash ADC. 3598-3601 - João Pedro Oliveira, João Goes, Bruno Esperanca, Nuno F. Paulino, Jorge Fernandes:
Low-Power CMOS Comparator with Embedded Amplification for Ultra-high-speed ADCs. 3602-3605 - Takahide Sato, Shigetaka Takagi, Nobuo Fujii:
Low-power design technique for flash A/D converters based on reduction of the number of comparators. 3606-3609 - Munkyo Seo, Sopan Joshi, Ian A. Young:
A Blind Calibration Technique to Correct Memory Errors in Amplifier-sharing Pipelined ADCs. 3610-3613 - Stijn Reekmans, Pieter Rombouts, Ludo Weyten:
Quadrature Mismatch Shaping Techniques for Fully Differential Circuits. 3614-3617 - Eric C. Moule, Zeljko Ignjatovic:
Blue-Noise Sigma-Delta Modulator: Improving Substrate Noise and Nonlinear Amplifier Gain Effects. 3618-3621 - Liyuan Liu, Run Chen, Dongmei Li:
A 20-Bit Sigma-Delta D/A for Audio Applications in 0.13um CMOS. 3622-3625 - Bupesh Pandita, Kenneth W. Martin:
Designing Complex Delta Sigma Modulators with Signal-Transfer Functions having Good Stop-Band Attenuation. 3626-3629 - Zhenyu Wei, Hongliang Li, King Ngi Ngan
An Efficient Intra Mode Selection Algorithm For H.264 Based On Fast Edge Classification. 3630-3633 - Zhibo Chen, Guoping Qiu, Yang Lu, Lihua Zhu, Quqing Chen, Xiaodong Gu, Charles Wang:
Improving Video Coding at Scene Cuts using Attention based Adaptive Bit Allocation. 3634-3638 - Xuan Jing, Lap-Pui Chau:
Improved Frame Level MAD Prediction and Bit Allocation Scheme for H.264/AVC Rate Control. 3639-3642 - Xiang Li, Norbert Oertel, André Kaup:
Adaptive Lagrange Multiplier Selection for Intra-Frame Video Coding. 3643-3646 - Hung-Ming Wang, Ji-Kun Lin, Jar-Ferr Yang:
Fast H.264 Inter Mode Decision Based on Inter and Intra Block Conditions. 3647-3650 - Qichao Sun, Xin-Hao Chen, Xiaoyang Wu, Lu Yu
A Content-adaptive Fast Multiple Reference Frames Motion Estimation in H.264. 3651-3654 - Jang-Jer Tsai, Hsueh-Ming Hang:
A Genetic Rhombus Pattern Search for Block Motion Estimation. 3655-3658 - Yang Song, Zhenyu Liu, Takeshi Ikenaga, Satoshi Goto:
Enhanced Strict Multilevel Successive Elimination Algorithm for Fast Motion Estimation. 3659-3662 - Asral Bahari, Tughrul Arslan, Ahmet T. Erdogan
Low power variable block size motion estimation using pixel truncation. 3663-3666 - Meng-Chou Chang, Yong-Jie Cheng:
Motion Detection by Using Entropy Image and Adaptive State-Labeling Technique. 3667-3670 - Stephan Eggersglüß, Görschwin Fey, Rolf Drechsler:
SAT-based ATPG for Path Delay Faults in Sequential Circuits. 3671-3674 - Hamid R. Zarandi, Seyed Ghassem Miremadi, Dhiraj K. Pradhan, Jimson Mathew:
CAD-Directed SEU Susceptibility Reduction in FPGA Circuits Designs. 3675-3678 - Chandan Giri, Santanu Chattopadhyay:
Reducing Test-bus Power Consumption in Huffman Coding Based Test Data Compression for SOCs. 3679-3682 - Sying-Jyan Wang
Low Capture Power Test Generation for Launch-off-Capture Transition Test Based on Don't-Care Filling. 3683-3686 - Aijiao Cui, Chip-Hong Chang:
Watermarking for IP Protection through Template Substitution at Logic Synthesis Level. 3687-3690 - Mohamed A. Abd El-Ghany, Aly E. Salama, Ahmed H. Khalil:
Design and Implementation of FPGA-based Systolic Array for LZ Data Compression. 3691-3695 - Hamid R. Zarandi, Seyed Ghassem Miremadi, Costas Argyrides, Dhiraj K. Pradhan:
CLB-based Detection and Correction of Bit-flip faults in SRAM-based FPGAs. 3696-3699 - Yaling Ma, Mingjie Lin:
Collaborative Routing Architecture for FPGA. 3700-3703 - Nicolas Farrugia
A Parallel Face Detection System Implemented on FPGA. 3704-3707 - Carlos Paiz, Boris Kettelhoit, Mario Porrmann
A design framework for FPGA-based dynamically reconfigurable digital controllers. 3708-3711 - Jun Wang, Ge Zhang, Weiwu Hu:
An Efficient Error Control Scheme for Chip-to-Chip Optical Interconnects. 3712-3715 - Jingye Xu, Abinash Roy, Masud H. Chowdhury:
Power Consumption Analysis of Flip-flop Based Interconnect Pipelining. 3716-3719 - Muhammad Arsalan, Maitham Shams:
Asynchronous Adiabatic Logic. 3720-3723 - Rodrigo Jaramillo-Ramirez, Mohab Anis:
A Dual-Threshold FPGA Routing Design for Subthreshold Leakage Reduction. 3724-3727 - Richard B. Wunderlich, Brian P. Degnan
Capacitively-Biased Floating-Gate CMOS: a New Logic Family. 3728-3731 - Massimo Alioto, Gaetano Palumbo:
Delay Variability Due to Supply Variations in Transmission-Gate Full Adders. 3732-3735 - Ja Chun Ku, Yehea I. Ismail:
A Compact and Accurate Temperature-Dependent Model for CMOS Circuit Delay. 3736-3739 - Chung-Yu Chang, Wei-Bin Yang, Ching-Ji Huang, Cheng-Hsing Chien:
New Power Gating Structure with Low Voltage Fluctuations by Bulk Controller in Transition Mode. 3740-3743 - Martin Hansson, Atila Alvandpour:
Comparative Analysis of Process Variation Impact on Flip-Flop Power-Performance. 3744-3747 - Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya:
Floating millivolt reference for PTAT current generation in Subthreshold MOS LSIs. 3748-3751 - Shengjyi Yang, Chijie Lin, Chiuyun Hung, Jiying Wu, Yiwen Wang:
Application-Specific Instruction Generation for SOC Processors. 3752-3755 - Yi Xu, Zhiqiang Gao, Xiangqing He:
A Flexible Embedded SRAM IP Compiler. 3756-3759 - Mohammad Reza Kakoee, Hamid Shojaei, Hassan Ghasemzadeh, Marjan Sirjani, Zainalabedin Navabi:
A New Approach for Design and Verification of Transaction Level Models. 3760-3763 - Sung Dae Kim, Myung Hoon Sunwoo:
Low Power ASIP Architecture Optimization based on Target Application Profiling. 3764-3767 - Rubil Ahmadi:
A Hold Friendly Flip-Flop For Area Recovery. 3768-3771 - Amir M. Amiri, Abdelhakim Khouas, Mounir Boukadoum:
On the Timing Uncertainty in Delay-Line-based Time Measurement Applications Targeting FPGAs. 3772-3775 - Henrique C. Freitas
Evaluating Network-on-Chip for Homogeneous Embedded Multiprocessors in FPGAs. 3776-3779 - Jun-Hong Chen, Haw-Shiuan Wu, Ming-Der Shieh, Wen-Ching Lin:
A New Montgomery Modular Multiplication Algorithm and its VLSI Design for RSA Cryptosystem. 3780-3783 - DiaaEldin Khalil, Yehea I. Ismail:
Approximate Frequency Response Models for RLC Power Grids. 3784-3787 - Dongwon Seo, Yuhua Guo:
Mismatch Compensated Design Techniques under Packaging-Induced Die Stress. 3788-3791 - Tien-Yu Lo, Chung-Chih Hung:
1-V Linear CMOS Transconductor with 65 dB THD in Nano-Scale CMOS Technology. 3792-3795 - Kyu-Young Kim, Kwansu Shon, Soo-Won Kim, Jae-Tack Yoo:
Dual-Output Trans-Impedance Amplifier of Cost-effective CMOS Optical Receiver for Digital Audio Interfaces. 3796-3799 - T. M. Abdelrahman, Serdar Özoguz, Ahmed S. Elwakil:
New squaring circuit with reduced sensitivity to element mismatches using differentially driven translinear cells. 3800-3803 - Giuseppe de Vita, Giuseppe Iannaccone:
A 109 nW, 44 ppm/°C CMOS Current Reference with Low Sensitivity to Process Variations. 3804-3807 - Jeong Hun Kim, Kyu-sam Lim, Suki Kim:
Dynamic Eccentric Error Compensation for Track Following Control of Optical Disk Driver. 3808-3811 - Fei Yuan:
CMOS Gyrator-C Active Transformers. 3812-3815 - David W. Graham, Paul E. Hasler:
Run-Time Programming of Analog Circuits Using Floating-Gate Transistors. 3816-3819 - Sven Soell, Bernd Porr:
An Undersampling Digital Microphone. 3820-3823 - Francesco Cannillo, Chris Toumazou:
Fractional-Rate FM-to-Digital Delta-Sigma-Converters. 3824-3827 - Liangguo Shen, Zushu Yan, Xing Zhang, Yuanfu Zhao, Yuan Wang:
Design of High-Performance Voltage Regulators Based on Frequency-Dependent Feedback Factor. 3828-3831 - Savvas Koudounas, Julius Georgiou:
A Reduced-Area, Low-Power CMOS Bandgap Reference Circuit. 3832-3835 - Burak Kelleci
Low-Voltage Temperature-Independent Current Reference with no External Components. 3836-3839 - Luis E. Toledo, Walter J. Lancioni, Pablo A. Petrashin, Carlos Dualibe, Carlos Daniel Vázquez:
A new CMOS voltage reference scheme based on Vth-difference principle. 3840-3843 - Chia-Wei Chang, Tien-Yu Lo, Chia-Min Chen, Kuo-Hsi Wu, Chung-Chih Hung:
A Low-Power CMOS Voltage Reference Circuit Based On Subthreshold Operation. 3844-3847 - Kuo-Hsing Cheng, Cheng-Liang Hung, Chia-Wei Su:
A Sub-1V Low-Power High-Speed Static Frequency Divider. 3848-3851 - Sang-Hyun Cho, Chang-Kyo Lee, Jong-In Song:
Design of a 1-Volt and µ-power SARADC for Sensor Network Application. 3852-3855 - Zhenying Luo, Sameer R. Sonkusale:
A Novel Low Power BPSK Demodulator. 3856-3859 - Hanjun Jiang, Degang Chen, Randall L. Geiger:
Deterministic DEM DAC Performance Analysis. 3860-3863 - Richard Geisler, John C. Liobe, Martin Margala:
Process and Temperature Calibration of PLLs with BiST Capabilities. 3864-3867 - Carlos Muñiz-Montero
Low frequency, current mode programmable KHN filters using large-valued active resistors. 3868-3871 - Rui Xiao, Amit Laknaur, Haibo Wang:
A Fully Programmable Analog Window Comparator. 3872-3875 - Athon Zanikopoulos, Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund:
Design of the Basic Building Block of a High-Speed Flexible and Modular Pipelined ADC. 3876-3879 - Josep Soler Garrido, Robert J. Piechocki
Analog Implementation of a Mean Field Detector for Multiple Antenna Systems. 3880-3883 - Calogero D. Presti, Francesco Carrara, Antonino Scuderi, Giuseppe Palmisano:
Fast Peak Detector with Improved Accuracy and Linearity for High-Frequency Waveform Processing. 3884-3887 - Chih-Hsing Lin, Ching-Te Chiu:
A 2.24GHz Wide Range Low Jitter DLL-Based Frequency Multiplier using PMOS Active Load for Communication Applications. 3888-3891 - Pei-Zong Rao, Tang-Yuan Chang, Ching-Piau Liang, Shyh-Jong Chung:
A Wideband CMOS Mixer with Feedforward Compensated Differential Transconductor. 3892-3895 - Shubha Bommalingaiahnapallya, Kin-Joe Sham, Mahmoud Reza Ahmadi, Ramesh Harjani:
High-Speed Circuits for a Multi-Lane 12 Gbps CMOS PRBS Generator. 3896-3899 - Tongqiang Gao, Dongmei Li, Baoyong Chi, Zhihua Wang:
A CMOS class-E Power Amplifiers with Power Control. 3900-3903 - Mohsen Maadani
A Low-Area, 0.18µm CMOS, 10Gb/s Optical Receiver Analog Front End. 3904-3907 - Naoyuki Unno, Takashi Fujita, Peter Lindberg, B. Siddik Yarman, Nobuo Fujii:
Dual Band Antenna Equalizer Realized by Utilizing 0.18µm Si-Processing Technology for a Pifa-900. 3908-3911 - Haiyong Wang, Guoliang Shou, Nanjian Wu:
A LO-leakage auto-calibrated CMOS IEEE802.11b/g WLAN transceiver. 3912-3915 - Alessio Cacciatori, Laura Lorenzi, Luigi Colalongo:
A Power Efficient HBT Pulse Generator for UWB Radars. 3916-3919 - Yanjie Wang, Anthony Ho, Kris Iniewski, Vincent C. Gaudet:
Inductive ESD Protection For Narrow Band and Ultra-Wideband CMOS Low Noise Amplifiers. 3920-3923 - Shuilong Huang, Zhihua Wang:
A dual-slope PFD/CP frequency synthesizer architecture with an adaptive self-tuning algorithm. 3924-3927 - Kunal Mukherjee, Bah-Hwee Gwee:
A 32-point FFT based Noise Reduction Algorithm for Single Channel Speech Signals. 3928-3931 - Volker Mildner, Stefan Goetze
Optimization of Gabor Features for Text-Independent Speaker Identification. 3932-3935 - Te-Hsueh Lai, Chung-Neng Wang, Tihao Chiang:
A NMR Optimized Bitrate Transcoder for MPEG-2/4 LC-AAC. 3936-3939 - Arturo Camacho, John G. Harris:
A Pitch Estimation Algorithm Based on the Smooth Harmonic Average Peak-to-Valley Envelope. 3940-3943 - Celia Shahnaz
An Approach for Voiced/Unvoiced Decision of Colored Noise-Corrupted Speech. 3944-3947 - Doo-Hyun Choi, Ick Hoon Jang, Mi Hye Kim, Nam Chul Kim:
Color Image Enhancement Based on Single-Scale Retinex With a JND-Based Nonlinear Filter. 3948-3951 - An-Chao Tsai, Anand Paul
Efficient Intra Prediction in H.264 Based on Intensity Gradient Approach. 3952-3955 - Tian Song
Adaptive Search Range Motion Estimation Algorithm for H.264/AVC. 3956-3959 - Ibrahim Karliga, Jenq-Neng Hwang:
Extraction and Integration of Human Body Parts for 3-D Motion Analysis of Golf Swing from Single-Camera Video Sequences. 3960-3963 - Zhengming Fu, Eugenio Culurciello:
A 3D Integrated Feature-Extracting Image Sensor. 3964-3967 - Vincent Brost, Fan Yang, Michel Paindavoine:
A modular VLIW Processor. 3968-3971 - Henrik Svensson, Thomas Lenart, Viktor Öwall:
Accelerating Vector Operations by Utilizing Reconfigurable Coprocessor Architectures. 3972-3975 - Yu Hu, Qing Li
Decoder-Friendly Adaptive Deblocking Filter (DF-ADF) Mode Decision in H.264/AVC. 3976-3979 - Chengjun Zhang, Chunyan Wang, M. Omair Ahmad:
A VLSI Architecture for a Fast Computation of the 2-D Discrete Wavelet Transform. 3980-3983 - Jung-Wook Kim, Jinook Song, Seokho Lee, In-Cheol Park
Tiled Interleaving for Multi-Level 2-D Discrete Wavelet Transform. 3984-3987 - Magdy T. Hanna
On the Angular Decomposition Technique for Computing the Discrete Fractional Fourier Transform. 3988-3991 - George E. Antoniou:
2-D Tridiagonal IIR Filters/Systems: State Space and Circuit Realizations. 3992-3995 - Takao Hinamoto, Takuro Kawagoe:
Optimal Synthesis of State-Estimate Feedback Controllers with Minimum l2-Sensitivity and No Overflow Oscillations. 3996-3999 - An P. N. Vo, Truong T. Nguyen, Soontorn Oraintara:
Image Denoising using Shiftable Directional Pyramid and Scale Mixtures of Complex Gaussians. 4000-4003 - Beilei Huang, Edmund Ming-Kit Lai, A. Prasad Vinod
Sampling at Minimum Sampling Rate for Signals in Shift Invariant Spaces. 4004-4007 - Andrea Lombardi, Edoardo Bonizzoni, Piero Malcovati
A Low Power Sinc3 Filter for Sigma-Delta Modulators. 4008-4011 - Jatan P. Shah, Rama Sangireddy:
Higher Clock Rate at Comparable IPC Through Reduced Circuit Complexity in Instruction Format Based Pipeline Clustering. 4012-4015 - F. N. Martin Pirchio, Pedro Julián, Pablo Sergio Mandolesi, Alfonso Chacon-Rodriguez:
An Adaptive Cross-Correlation Derivative Algorithm for Ultra-Low Power Time Delay Measurement. 4016-4019 - Ümit Güz, Hakan Gürkan
A Novel Fast Algorithm for Speech and Audio Coding. 4020-4023
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