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ISCAS 2011: Rio de Janeiro, Brazil
- International Symposium on Circuits and Systems (ISCAS 2011), May 15-19 2011, Rio de Janeiro, Brazil. IEEE 2011, ISBN 978-1-4244-9473-6
Analog to Digital Converters I
- Long Cheng, Fan Ye, Hai-Feng Yang, Ning Li, Jun Xu, Junyan Ren:
Nyquist-rate time-interleaved current-steering DAC with dynamic channel matching. 5-8 - Andrew R. Macpherson, Kenneth A. Townsend, James W. Haslett:
A 2.5GS/s 3-bit time-based ADC in 90nm CMOS. 9-12 - Pouya Kamalinejad, Shahriar Mirabbasi, Victor C. M. Leung
:
An ultra-low-power SAR ADC with an area-efficient DAC architecture. 13-16
Amplifiers
- Hitesh Shrimali, Shouri Chatterjee
11 GHz UGBW Op-amp with feed-forward compensation technique. 17-20 - James Lin
A 15.5 dB, wide signal swing, dynamic amplifier using a common-mode voltage detection technique. 21-24 - Davide Marano
Self-biased dual-path push-pull output buffer amplifier topology for LCD driver applications. 29-32 - Miao Liu, Pui-In Mak
A high-voltage-enabled recycling folded cascode OpAmp for nanoscale CMOS technologies. 33-36
Low-Dropout Regulator
- S. S. Chong, P. K. Chan:
A quiescent power-aware low-voltage output capacitorless low dropout regulator for SoC applications. 37-40 - Stefano Pietri
A versatile low-dropout voltage regulator for automotive applications. 41-44 - Chenchang Zhan, Wing-Hung Ki
An output-capacitor-free adaptively biased low-dropout regulator with sub-threshold undershoot-reduction for SoC. 45-48 - Sumantra Seth, Rajavelu Thinakaran, Sujoy Chakravarty, Vikas Sinha:
A low power high speed envelope detector for serial data systems in 45nm CMOS. 49-52 - Edward N. Y. Ho, Philip K. T. Mok
Design optimization of an output capacitor-less low dropout regulator with compensation capcitance reduction and slew-rate enhancement technique. 53-56
Memory Circuits I
- Gregory K. Chen, Michael Wieckowski, Daeyeon Kim, David T. Blaauw, Dennis Sylvester:
A dense 45nm half-differential SRAM with lower minimum operating voltage. 57-60 - Roghayeh Saeidi
A subthreshold dynamic read SRAM (DRSRAM) based on dynamic stability criteria. 61-64 - Farah B. Yahya, Mohammad M. Mansour, Ali Chehab
A novel technique to measure data retention voltage of large SRAM arrays. 65-68 - Daeyeon Kim, Gregory K. Chen, Matthew Fojtik, Mingoo Seok, David T. Blaauw, Dennis Sylvester:
A 1.85fW/bit ultra low leakage 10T SRAM with speed compensation scheme. 69-72 - Lawrence T. Clark, Tai-Hua Chen, Vikas Chaudhary:
Efficient voltage conversion for SRAM low standby power modes. 73-76
Life Science Systems & Applications
- Amit Acharyya
Simplified logic design methodology for fuzzy membership function based robust detection of maternal modulus maxima location: A low complexity Fetal ECG extraction architecture for mobile health monitoring systems. 77-80 - Alessander Botti Benevides, Teodiano Freire Bastos-Filho
A pseudo-online Brain-Computer Interface with automatic choice for EEG channel and frequency. 81-84 - Michel Voyer, Sylvain-Robert Rivard, Luc Morin, Hung Tien Bui:
Rapid prototyping of the Goertzel algorithm for hardware acceleration of exon prediction. 85-88 - Rafael José Geraldo, Nelson D. A. Mascarenhas:
Noise reduction filters based on pointwise MAP for CT images. 89-92 - Dan Wang, Xiang Xie, Guolin Li, Yingke Gu, Tianjia Sun, Zhihua Wang:
Image registration method for 2D representation of wireless Micro-Ball endoscopic images. 93-96
Image & Video Coding
- Lin Ma, Songnan Li, King N. Ngan:
Perceptual image compression via adaptive block- based super-resolution directed down-sampling. 97-100 - Zhaotai Pan, Huifeng Shen, Yan Lu, Shipeng Li
Browser-friendly hybrid codec for compound image compression. 101-104 - Xiulian Peng, Jizheng Xu, Feng Wu:
Highly parallel image coding for many cores. 105-108 - Je-Won Kang, C.-C. Jay Kuo
Efficient dictionary based video coding with reduced side information. 109-112 - Run Cha, Oscar C. Au, Xingyu Zhang, Xing Wen, Jiali Li:
Multiple sub-pixel interpolation filters with adaptive symmetry for high-resolution video coding. 113-116
Adaptive Techniques in Signal and Image Processing Applications
- Shing-Chow Chan, Yijing Chu, Kai Man Tsui, Zhiguo Zhang:
A new switch-mode noise-constrained transform domain NLMS adaptive filtering algorithm. 117-120 - Pramod Kumar Meher, Megha Maheshwari:
A high-speed FIR adaptive filter architecture using a modified delayed LMS algorithm. 121-124 - Alexandre L. M. Levada
An adaptive approach for contextual audio denoising using local Fisher information. 125-128 - Dinei A. F. Florêncio, Li-wei He:
Enhanced adaptive playout scheduling and loss concealment techniques for Voice over IP networks. 129-132 - Ariel L. Pola, Diego E. Crivelli, Juan E. Cousseau, Oscar E. Agazzi, Mario Rafael Hueda:
A new low complexity iterative equalization architecture for high-speed receivers on highly dispersive channels: Decision feedforward equalizer (DFFE). 133-136
FIR Digital Filters
- Mohammad Ahsan, Tapio Saramäki:
"A MATLAB based optimum multiband FIR filters design program following the original idea of the Remez multiple exchange algorithm". 137-140 - Ya Jun Yu:
Design of variable bandedge FIR filters with extremely large bandedge variation range. 141-144 - Wen Bin Ye, Ya Jun Yu:
Switching activity analysis and power estimation for multiple constant multiplier block of FIR filters. 145-148 - Alessandro J. S. Dutra, Lisandro Lovisolo
Successive approximation FIR filter design. 149-152
Digitally Intensive Frequency Synthesis Architectures for the Nano-Scale - Part I
- Ioannis L. Syllaios, Poras T. Balsara:
Multi-clock domain analysis and modeling of all-digital frequency synthesizers. 153-156 - David Ruffieux, Matteo Contaldo, Christian C. Enz:
MEMS-based all-digital frequency synthesis for ultralow-power radio for WBAN and WSN applications. 157-160 - Francesco Brandonisio, Michael Peter Kennedy:
First order noise shaping in all digital PLLs. 161-164 - Eric A. M. Klumperink, Ramen Dutta, Zhiyu Ru, Bram Nauta
Jitter-Power minimization of digital frequency synthesis architectures. 165-168 - Victor R. Gonzalez-Diaz, Aldo Pena-Perez, Franco Maloberti:
Use of time variant digital sigma-delta for fractional frequency synthesizers. 169-172
Wireline Communications I
- Shuai Chen, Liqiong Yang, Hua Jing, Feng Zhang, Zhuo Gao:
A novel SST transmitter with mutually decoupled impedance self-calibration and equalization. 173-176 - Soojin Kim, Kyeongsoon Cho:
Design of high-speed clock recovery circuit for burst-mode applications. 177-180 - Nguyen Thanh Trung, Philipp Häfliger
250Mb/s to 3Gb/s unilateral continuous rate CDR using precise frequency detector and 1/5-rate linear phase detector. 181-184 - Fanta Chen, Min-Sheng Kao, Yu-Hao Hsu, Chih-Hsing Lin, Jen-Ming Wu, Ching-Te Chiu, Shuo-Hung Hsu:
A 10 to 11.5GHz rotational phase and frequency detector for clock recovery circuit. 185-188 - Marcello Ganzerli, Luca Larcher
An inductor-less 13.5-Gbps 8-mW analog equalizer for multi-channel multi-frequency operation. 189-192
Advanced Transmitter Design Techniques
- Anant S. Kamath, Vikas Sinha, Sujoy Chakravarty:
Slew-rate controlled 800Mbps transmitter in 65nm CMOS. 193-196 - Po-Hsing Wu, Yan Li, Weibo Hu, Jerry Lopez, Donald Y. C. Lie, T. J. Liang:
CMOS Envelope Tracking amplifier IC design for high-efficiency RF polar transmitters. 197-200 - Nagarjuna Nallam, Shouri Chatterjee
Design of concurrent multi-band matching networks. 201-204 - Imran Bashir, Robert Bogdan Staszewski
Autonomous predistortion calibration of an RF power amplifier. 205-208 - Sungmin Ock, Jaegan Ko, Ranjit Gharpurey:
A Cartesian Feedback Feedforward Transmitter. 209-212
Oscillators
- Fatemeh Aghlmand, Seyed Mojtaba Atarodi
Low phase noise on-chip oscillator for implantable biomedical applications. 213-216 - Andrea Bevilacqua
On the bias noise to phase noise conversion in harmonic oscillators using Groszkowski theory. 217-220 - Mauricio Pardo
A phase-noise model for nonlinear piezoelectrically-actuated MEMS oscillators. 221-224 - Li Lu, Changzhi Li
A regulated 3.1-10.6 GHz linear dual-tuning differential ring oscillator for UWB applications. 225-228 - Young-Seok Park, Woo-Young Choi:
Supply noise insensitive ring VCO with on-chip adaptive bias-current and voltage-swing control. 229-232
Power Converter I
- Ming Chak Lee, Xiaocheng Jing, Philip K. T. Mok
A 14V-output adaptive-off-time boost converter with quasi-fixed-frequency in full loading range. 233-236 - Chu-Hsiang Chia, Pui-Sun Lei, Robert Chen-Hao Chang
A high-efficiency PWM DC-DC buck converter with a novel DCM control under light-load. 237-240 - Dakshina Murthy-Bellur, Marian K. Kazimierczuk:
Active-clamp ZVS two-switch flyback converter. 241-244 - Yi Zhang, Dongsheng Ma:
Integrated SIMO DC-DC converter with on-line charge meter for adaptive PCCM operation. 245-248 - Moises Tanca V., Ivo Barbi
Nonisolated high step-up stacked dc-dc converter based on boost converter elements for high power application. 249-252
Analog to Digital Converters II
- Ji-Eun Jang:
Comparator-based switched-capacitor pipelined ADC with background offset calibration. 253-256 - Yu Lin, Kostas Doris, Hans Hegt, Arthur H. M. van Roermund:
An 11b pipeline ADC with dual sampling technique for converting multi-carrier signals. 257-260 - Taimur Gibran R. Kuntz
An energy-efficient 1MSps 7µW 11.9fJ/conversion step 7pJ/sample 10-bit SAR ADC in 90nm. 261-264 - Andrew J. Bean, Andrew C. Singer
A deflection criterion for time-interleaved analog-to-digital converters. 265-268 - Jingbo Duan, Degang Chen:
SNR measurement based on linearity test for ADC BIST. 269-272
Low-Noise Amplifiers
- Edwin C. Becerra-Alvarez, José M. de la Rosa, Federico Sandoval-Ibarra:
Design considerations and experimental results of continuously-tuned reconfigurable CMOS LNAs. 273-276 - Mohammad Sadegh Mehrjoo, Mohammad Yavari
A low power UWB very low noise amplifier using an improved noise reduction technique. 277-280 - Md. Mahbub Reja, Igor M. Filanovsky
A compact CMOS UWB LNA using tunable active inductors for WLAN interference rejection. 281-284 - Shreyas Sen, Marian Verhelst
Orthogonally tunable inductorless RF LNA for adaptive wireless systems. 285-288 - Miguel A. Martins, Pui-In Mak
A single-to-differential LNA topology with robust output gain-phase balancing against balun imbalance. 289-292
Emerging Energy & Power Integrated Circuits
- Jing Wang, Wai Tung Ng, Olivier Trescases:
Versatile capabilities of digitally controlled integrated dc-dc converters. 293-296 - Xiaocheng Jing, Philip K. T. Mok
Ultra-fast hysteretic single-inductor-dual-output boost regulator with predictable noise spectrum and minimized cross-regulation. 297-300 - Eduard Alarcón, Daniel Fernández
Continuous-time CMOS adaptive asynchronous ΣΔ modulator approximating low-ƒs low-inband-error on-chip wideband power amplifier. 301-304 - Ka Nang Leung
Development of energy-efficient fast-transient CMOS low-dropout regulators for SoC applications. 305-308 - Rajiv Damodaran Prabha, Gabriel A. Rincón-Mora, Suhwan Kim:
Harvesting circuits for miniaturized photovoltaic cells. 309-312
Memory Circuits II
- Jinyeong Moon
A dual-loop delay locked loop with multi digital delay lines for GHz DRAMs. 313-316 - Jinyeong Moon
Fast parallel CRC & DBI calculation for high-speed memories: GDDR5 and DDR4. 317-320 - Sangho Shin, Kyungmin Kim, Sung-Mo Kang:
Complementary structure of memristive devices based passive memory arrays. 321-324 - Junchao Chen, Kwen-Siong Chong, Bah-Hwee Gwee
A low-power dual-rail inputs write method for bit-interleaved memory cells. 325-328 - Nikolaos Papandreou, Haralampos Pozidis, Aggeliki Pantazi
Programming algorithms for multilevel phase-change memory. 329-332
Experiences with CAS teaching
- Jerzy Rutkowski, Katarzyna Moscinska:
Blended engineering course - Electric Circuit Theory case study. 333-336 - Eugene Otoakhia, Tanaporn Jenmanachaiyakun, Ahmad Afaneh
Embedded web server for remote laboratory access for undergraduate students studying electronic engineering. 337-340 - Jan Kyncl, Martin Novotný
Education of Digital and Analog Circuits supported by computer algebra system. 341-344 - Jordi Albo-Canals, Giovanni Egidio Pazienza:
How to teach memristors in EE undergraduate courses. 345-348 - Joos Vandewalle, Josef A. Nossek
Nullators and norators in circuits education: A benefit or an obstacle? 349-352
Visual Signal Analysis & Understanding
- Jingjing Fan, Yanzhe Xin, Fenglin Dai, Bo Hu, Jianqiu Zhang, Qiyong Lu, Jun He:
Distributed multi-camera object tracking with Bayesian Inference. 357-360 - Hongyu Gao, Weiyao Lin
A new network-based algorithm for multi-camera abnormal activity detection. 361-364 - Zhebin Zhang, Yizhou Wang, Tingting Jiang
Stereoscopic learning for disparity estimation. 365-368
Detection and Estimation
- Luis Weruaga, O. Michael Melko:
On the Cramér-Rao bound of autoregressive estimation in noise. 373-376 - Bin Liao
DOA estimation of coherent signals for uniform linear arrays with mutual coupling. 377-380 - Diego Bellan
An improved model of jitter effects in analog-to-digital conversion. 381-384 - Ahmed Abdelgawad, Magdy A. Bayoumi:
Distributed Kalman Filter using fast polynomial filter. 385-389 - Jian-Feng Gu, Wei-Ping Zhu
Minimum redundancy linear sparse subarrays for direction of arrival estimation without ambiguity. 390-393
Digital Filter Design & Implementation
- Soo-Chang Pei, Jong-Jy Shyu, Cheng-Han Chan, Yun-Da Huang:
An Improved method for the design of variable fractional-delay IIR digital filters. 394-397 - Wu-Sheng Lu, Takao Hinamoto:
Minimax design of stable IIR filters with sparse coefficients. 398-401 - Bashar I. Ahmad, Andrzej Tarczynski
A spectrum sensing method based on stratified sampling. 402-405 - Yu Pan, Pramod Kumar Meher:
Efficient coefficient partitioning for decomposed DA-based inner-product computation. 406-409 - Dieter Brückmann, Tobias Feldengut, Bedrich J. Hosticka, Rainer Kokozinski
Optimization and implementation of continuous time DSP-systems by using granularity reduction. 410-413
Digitally Intensive Frequency Synthesis Architectures for the Nano-Scale - Part II
- Ulrich L. Rohde, Ajay K. Poddar:
Digital frequency synthesizer using adaptive mode-coupled resonator mechanism for low phase noise and low jitter applications. 414-417 - Carlo Samori
Multipath adaptive cancellation of divider non-linearity in fractional-N PLLs. 418-421 - Paul-Peter Sotiriadis
Spurs suppression and deterministic jitter correction in all-digital frequency synthesizers, current state and future directions. 422-425 - Robert Bogdan Staszewski
All-digital RF frequency modulation. 426-429
Wireline Communications II
- Won-Young Lee, Lee-Sup Kim:
A 5.4 Gb/s clock and data recovery circuit using the seamless loop transition scheme without phase noise degradation. 430-433 - Chua-Chin Wang, Chih-Lin Chen, Tai-Hao Yeh, Yi Hu, Gang-Neng Sung:
A high speed transceiver front-end design with fault detection for FlexRay-based automotive communication systems. 434-437 - Jea Hack Lee
High-speed and low complexity carrier recovery for DP-QPSK transmission. 438-441 - Yin-Tsung Hwang, Feng-Ming Chang, Shin-Wen Chen:
Low complexity baseband transceiver design for narrow band power line communication. 442-445 - Arash Zargaran-Yazd, Shahriar Mirabbasi, Res Saleh:
A 10 Gb/s low-power serdes receiver based on a hybrid speculative/SAR digitization technique. 446-449
Advanced Baseband Design Techniques
- Sandeep D'Souza, Mau-Chung Frank Chang, Sudhakar Pamarti
A progammable baseband anti-alias filter for a passive-mixer-based, SAW-less, multi-band, multi-mode WEDGE transmitter. 450-453 - Fernando Cruz-Roldán, Manuel Blanco-Velasco
MDFT filter bank multicarrier systems with multiple transmission zeros. 454-457 - Mohamed Mohi, Ahmed F. Shalash:
All digital time tracking loop for DVB-H and DVB-T. 458-461 - Yizhi Wang, Yun Chen, Yunlong Ge, Huxiong Xu, Xiaoyang Zeng:
A channel estimation scheme for Chinese DTTB system combating long echo and high doppler shift. 462-465 - Johan Löfgren, Ove Edfors
Improved matching pursuit algorithm and architecture for LTE Channel Estimation. 466-469
PLL
- Mauricio Pardo
A band-reject nested-PLL phase-noise reduction scheme for clock-cleaners. 470-473 - Zhuo Zhang, Woogeun Rhee
A wide-tuning quasi-type-I PLL with voltage-mode frequency acquisition aid. 474-477 - Xiaoming Liu, Jing Jin, Xi Li, Jianjun Zhou
Glitch-Free Multi-Modulus Frequency Divider for Quantization Noise suppression in fractional-N PLLs. 478-481 - P. O. Lucas de Peslouan, Cédric Majek, Thierry Taris, Yann Deval
A new frequency synthesizers stabilization method based on a mixed Phase Locked Loop and Delay Locked Loop architecture. 482-485 - Tzu-Chi Huang, Hong-Yi Huang, Jen-Chieh Liu, Kuo-Hsing Cheng, Ching-Hsing Luo:
All digital phase-locked loop using active inductor oscillator and novel locking algorithm. 486-489
Power Converter II
- Masato Asano, Daiki Abe, Hirotaka Koizumi:
A common grounded Z-source buck-boost converter. 490-493 - Younis Allasasmeh, Stefano Gregori
Switch bootstrapping technique for voltage doublers and double charge pumps. 494-497 - Yu-Sheng Chen
Study and implementation of high frequency pulse LED driver with self-oscillating circuit. 498-501 - Franz Lukasch:
Cost efficient mains powered supply concepts for wireless sensor nodes. 502-505 - Hyun-Hee Park, Young-Jin Woo, Gyu-Hyeong Cho:
A fully integrated wide-band PID controller with capacitor-less compensation for step-down DC-DC converter. 506-509
Analog to Digital Converters III
- Liyuan Liu, Dongmei Li, Liangdong Chen, Yafei Ye, Zhihua Wang:
A 1V 15-bit Audio ΔΣ ADC in 0.18µm CMOS. 510-513 - Gholamreza Nikandish
Analysis of random capacitor mismatch errors in pipeline analog-to-digital converters. 514-517 - Toshihiro Konishi, Hyeokjong Lee, Shintaro Izumi, Masahiko Yoshimoto, Hiroshi Kawaguchi
A 40-nm 640-µm2 45-dB opampless all-digital second-order MASH ΔΣ ADC. 518-521 - Hsuan-Tsung Wang, Walter D. Leon-Salas:
An incremental sigma delta converter for compressive sensing applications. 522-525 - Shanthi Pavan:
The inconvenient truth about alias rejection in continuous time ΔΣ converters. 526-529
Wireless Circuits
- Saul Rodriguez, Ana Rusu:
A 65nm CMOS current-mode receiver front-end. 530-533 - Christian Hambeck, Stefan Mahlknecht, Thomas Herndl:
A 2.4µW Wake-up Receiver for wireless sensor nodes with -71dBm sensitivity. 534-537 - Hannes Reinisch, Stefan Gruber, Hartwig Unterassinger, Martin Wiessflecker, Günter Hofer, Wolfgang Pribyl, Gerald Holweg:
A 2-pin input multi frequency power scavenging unit for wireless sensor nodes and RFID tags. 538-541 - Zhijian Lu, Peichen Jiang, Tingting Mo, Jianjun Zhou
Adaptive calibration of IIP2 in direct down-conversion mixers with modified LMS algorithm. 542-545 - André F. Esteves, José M. Dores, Pedro Matos, Miguel A. Martins, Jorge R. Fernandes
An ISM 2.4 GHz low-IF receiver frontend. 546-549
Design Techniques for Storage Elements
- Keisuke Inoue, Mineo Kaneko:
Variable-duty-cycle scheduling in double-edge-triggered flip-flop-based high-level synthesis. 550-553 - Elio Consoli, Gaetano Palumbo, Melita Pennisi:
TG Master-Slave FFs: High-speed optimization. 554-557 - Mohamed O. Shaker, Magdy A. Bayoumi:
A clock gated flip-flop for low power applications in 90 nm CMOS. 558-562 - Massimo Alioto, Elio Consoli, Gaetano Palumbo:
DET FF topologies: A detailed investigation in the energy-delay-area domain. 563-566 - Georgios N. Selimis
Evaluation of 90nm 6T-SRAM as Physical Unclonable Function for secure key generation in wireless sensor nodes. 567-570
VLSI for Video Systems I
- Hyun Kim, Chae-Eun Rhee, Jin-Sung Kim, Sunwoong Kim
Power-aware design with various low-power algorithms for an H.264/AVC encoder. 571-574 - Minsu Choi, Jinsang Kim, Won-Kyung Cho, Jinwook Burm:
Area-efficient fast scheduling schemes for MVC prediction architecture. 575-578 - Cláudio Machado Diniz, Bruno Zatt, Cristiano Thiele, Altamiro Amadeu Susin, Sergio Bampi
A high throughput H.264/AVC intra-frame encoding loop architecture for HD1080p. 579-582 - Mateus Grellert
A multilevel data reuse scheme for Motion Estimation and its VLSI design. 583-586 - Vinicius S. Livramento, Bruno George de Moraes, Brunno Abner Machado, José Luís Güntzel:
An energy-efficient 8×8 2-D DCT VLSI architecture for battery-powered portable devices. 587-590
Pedagogical Innovations in Circuits, Signals & Systems Education
- Joos Vandewalle, Babak Ayazifar:
ISCAS 2011 special sessions on education innovations and experiences. 591-594 - Tokunbo Ogunfunmi
Analysis of assessment using signals, systems concept inventory for systems courses. 595-598 - Babak Ayazifar:
Rethinking Fourier's legacy in signals and systems education. 599-602 - Josef A. Nossek
On the relation of circuit theory and signals, systems and communications. 603-604 - Raija Lehto:
Interactive lecturing techniques. 605-608
Visual Signal Coding & Communications
- You Zhou, Minghu Jiang, Feng Wu:
Fast mode decision by using probabilities from arithmetic coder. 609-612 - Li Zhang, Siwei Ma, Wen Gao, Xin Zhao:
Enhanced line-based intra prediction with fixed interpolation filtering. 613-616 - Guichun Li, Lingzhi Liu, Nam Ling, Jianhua Zheng, Philipp Zhang:
Integration of Plane Mode with Multiple Predictor Sets in Intra Prediction for video coding. 617-620 - Chuohao Yeo, Yih Han Tan, Zhengguo Li, Susanto Rahardja:
Mode-dependent fast separable KLT for block-based intra coding. 621-624 - Qian Liu, Zixuan Zou, Chang Wen Chen:
A deadline-aware virtual contention free EDCA scheme for H.264 video over IEEE 802.11e wireless networks. 625-628
Blind Signal Processing
- Tadeu N. Ferreira
A Unitary ESPRIT algorithm for carrier frequency offset estimation. 629-632 - Paulo Bulkool Batalheiro, Mariane Rembold Petraglia, Diego B. Haddad
Subband blind source separation considering acoustic reverberation characteristics. 633-636 - Xianfeng Xu, Da-Zheng Feng, Wei Xing Zheng:
An improved method for blind separation of complex-valued signals via joint diagonalization. 637-640 - E. S. Rosa, Leonardo Tomazeli Duarte
Signal recovery in PDM optical communication systems employing independent component analysis. 641-644 - Ruey-Wen Liu, Xu Wang, Fan He, Tao Yang, Bo Hu:
A blind technique for total interference rejection. 645-648
IC Implementation of DSP Algorithms
- Louis-Charles Caron, Frédéric Mailhot, Jean Rouat:
FPGA implementation of a spiking neural network for pattern matching. 649-652 - Simon Rajotte, Diana Carolina Gil, J. M. Pierre Langlois:
Combining ISA extensions and subsetting for improved ASIP performance and cost. 653-656 - Mathias Faust
Bit-parallel Multiple Constant Multiplication using Look-Up Tables on FPGA. 657-660 - Syed Asad Alam
Implementation of time-multiplexed sparse periodic FIR filters for FRM on FPGAs. 661-664 - Nilanka T. Rajapaksha, Arjuna Madanayake
Asynchronous-QDI 2D IIR digital filter circuits. 665-668
Spike-Based Systems
- Alexander F. Russell, Ralph Etienne-Cummings:
Maximum likelihood parameter estimation of a spiking silicon neuron. 669-672 - Andrew Cassidy, Andreas G. Andreou
A combinational digital logic approach to STDP. 673-676 - Yingxue Wang
Mismatch reduction through dendritic nonlinearities in a 2D silicon dendritic neuron array. 677-680 - Jonathan Joshi, Alice Cline Parker, Ko-Chung Tseng:
An in-silico glial microdomain to invoke excitability in cortical neural networks. 681-684 - Vaibhav Garg, Ravi Shekhar, John G. Harris:
The time machine: A novel spike-based computation architecture. 685-688
MIMO Communications Systems
- Liang Liu, Peter Nilsson:
Detecting multi-mode MIMO signals: Algorithm and architecture design. 689-692 - Israa Slim, Amine Mezghani, Josef A. Nossek
Scalar quantizer based feedback of the Channel Direction Information in MU-MISO systems. 693-696 - Ameer Youssef, Mahdi Shabany, P. Glenn Gulak:
Performance analysis of lattice-reduction algorithms for a novel LR-compatible K-Best MIMO detector. 701-704 - Jeoong Sung Park, Tokunbo Ogunfunmi
FPGA implementation of channel estimation for MIMO-OFDM. 705-708
Cryptography & Security for Communications Systems
- Jithra Adikari, Vassil S. Dimitrov, Renato J. Cintra
A new algorithm for double scalar multiplication over Koblitz curves. 709-712 - Yao-Lin Chen, Jen-Wei Lee, Po-Chun Liu, Hsie-Chia Chang, Chen-Yi Lee:
A dual-field elliptic curve cryptographic processor with a radix-4 unified division unit. 713-716 - Alan J. Michaels:
A maximal entropy digital chaotic circuit. 717-720 - Amir Khatib Zadeh, Catherine H. Gebotys, Shahab Ardalan:
Counteracting power analysis attack using Static Single-ended Logic. 721-724 - Takehiko Amaki, Masanori Hashimoto
An oscillator-based true random number generator with jitter amplifier. 725-728
Synchronization
- Jin Fan:
Synchronization of the Kuramoto model with multi-scale-free property. 729-732 - Mario di Bernardo
Synchronization of bounded piecewise smooth systems. 733-736 - Marco Righero, Fernando Corinto
Master Stability Function for networks of Chua's circuits with static and dynamic couplings. 737-740 - Massimiliano de Magistris, Mario di Bernardo
Synchronization of networks of non-identical Chua circuits: Analysis and experiments. 741-744 - Yoko Uwate, Yoshifumi Nishio
Synchronizing coupled oscillators in polygonal networks with frustration. 745-748
Power Converter III
- Tomoharu Nagashima, Xiuqin Wei, Hiroo Sekiya
Power conversion efficiency of class-E power amplifier outside nominal operation. 749-752 - Yu-Huei Lee, Wang-Wei Lai, Wan-Yu Pai, Ke-Horng Chen
Reduction of equivalent series inductor effect in constant on- time control DC-DC converter without ESR compensation. 753-756 - Yao-Yi Yang, Chun-Yu Hsieh, Tzu-Chi Huang, Yu-Huei Lee, Shih-Wei Wang, Ming-Yan Fan, Ming-Jhe Du, Shih-Hsien Cheng, Ke-Horng Chen
A 80V output voltage boost converter with low voltage ripple for Avalanche Photodiode(APD). 757-760 - Yu-Ping Huang, Yi-Ping Su, Yu-Huei Lee, Kuan-Yu Chu, Chun-Jen Shih, Ke-Horng Chen
Single controller current balance (SCCB) technique for voltage-mode multi-phase buck converter. 761-764 - Ursula Ribes-Mallada, Ramon Leyva
Assessment of direct VRM topologies. 765-768
Tools & Methods for Analog Circuit Design
- János Ladvánszky, Gábor Kovács:
Software based separation of amplitude and phase noises in time domain. 769-772 - Gianluca Giustolisi, Rosario Mita, Gaetano Palumbo:
Verilog-A modeling of SPAD statistical phenomena. 773-776 - Ghulam Abbas
Design and analysis of fuzzy logic based robust PID controller for PWM-based switching converter. 777-780 - Bo Liu, Murat Pak, Xuezhi Zheng, Georges G. E. Gielen:
A novel operating-point driven method for the sizing of analog IC. 781-784 - Nicole McFarlane, Pamela Abshire:
Comparative analysis of information rates of simple amplifier topologies. 785-788
Circuits for Biomedical Systems & Bio-Inspired Systems
- Mohammed Al-Rawhani, David R. S. Cumming
Photocurrent dependent response of a SPAD biased by a charge pump. 789-792 - Fanyang Li, Haigang Yang, Yu Wang, Qisong Wu:
Current Mode Feed-Forward Gain Control for 0.8V CMOS hearing aid. 793-796 - Fayçal Saffih
Bio-inspired nano-photodiode for Low Light, High Resolution and crosstalk-free CMOS image sensing. 797-800 - Chiu-Kuo Chen, Yi-Yuan Wang, Zong-Han Hsieh, Ericson Chua, Wai-Chi Fang, Tzyy-Ping Jung:
A low power independent component analysis processor in 90nm CMOS technology for portable EEG signal processing systems. 801-804 - Anna M. R. Dixon, Emily G. Allstot, Andrew Y. Chen, Daibashish Gangopadhyay, David J. Allstot:
Compressed sensing reconstruction: Comparative study with applications to ECG bio-signals. 805-808 - David Welch, Jennifer Blain Christen:
A multiparametric biosensor array for on-chip cell culture with feedback controlled microfluidics. 809-812
Power Eletronic Circuits I
- Shang-Hsien Yang, Jen-Wei Liu, Yihong Wu, Deng-Sian Wang, Chua-Chin Wang:
A high voltage battery charger with smooth charge mode transition in BCD process. 813-816 - Gerard Villar, Julia Delos, Eduard Alarcón:
Bonding-wire triangular spiral inductor for on-chip switching power converters. 817-820 - Fabrizio Lo Conte, Jean-Michel Sallese, Maher Kayal:
Meshing strategy of equivalent substrate schematic in SMART power IC. 821-824 - Loai G. Salem, Rinkle Jain:
A novel control technique to eliminate output-voltage-ripple in switched-capacitor DC-DC converters. 825-828 - Edgardo Mendez-Delgado, Guillermo J. Serrano
A 300mV Low-voltage start-up circuit for energy harvesting systems. 829-832
Low-Power Circuits II
- Louis H. Jung, Torsten Lehmann, Gregg J. Suaning
A semi-static threshold-triggered delay element for low power applications. 833-836 - S. M. Yasser Sherazi, Peter Nilsson, Omer Can Akgun
Design exploration of a 65 nm Sub-VT CMOS digital decimation filter chain. 837-840 - Recep Ozgun, Joseph H. Lin, Francisco Tejada, Philippe O. Pouliquen, Andreas G. Andreou
A low-power 8-bit SAR ADC for a QCIF image sensor. 841-844 - Jun Xu, Xiangku Li:
Improve accuracy of delay element by filtering false path for low power desychronized circuits. 845-848
Image Processing & Analysis
- Diana Carolina Gil, Rana Farah, J. M. Pierre Langlois, Guillaume-Alexandre Bilodeau
Comparative analysis of contrast enhancement algorithms in surveillance imaging. 849-852 - Matthias Rümmele-Werner, Thomas Perschke, Lars Braun, Michael Hübner, Jürgen Becker:
A FPGA based fast runtime reconfigurable real-time Multi-Object-Tracker. 853-856 - Zhiqiang Tian, Jianru Xue, Ce Li, Xuguang Lan, Nanning Zheng:
Auto-generated strokes for motion segmentation. 857-860 - Sunil Prasad Jaiswal, Vinit Jakhetiya, Anil Kumar Tiwari:
An efficient image interpolation algorithm based upon the switching and self learned characteristics for natural images. 861-864
Neuromorphic Circuits & Systems
- Tara Julia Hamilton
A neuromorphic cross-correlation chip. 865-868 - Runchun Wang, Craig T. Jin
A programmable axonal propagation delay circuit for time-delay spiking neural networks. 869-872 - Sadique Sheik, Fabio Stefanini, Emre Neftci
Systematic configuration and automatic tuning of neuromorphic systems. 873-876 - Jayawan H. B. Wijekoon
Analogue CMOS circuit implementation of a dopamine modulated synapse. 877-880 - Evren Cesur, Nerhun Yildiz
An improved FPGA implementation of CNN Gabor-type filters. 881-884
Low Voltage, Low Power Circuits
- Jesus E. Molinar-Solis, Rodolfo Garcia-Lozano, Alejandra Morales-Ramirez
Simple improvement stage for low voltage WTA and Rank Order circuits. 885-888 - Yi Yang, David M. Binkley, Lu Li, Changzhan Gu, Changzhi Li
All-CMOS subbandgap reference circuit operating at low supply voltage. 893-896 - Hugo B. Goncalves, Miguel A. Martins, Jorge R. Fernandes
Energy harvesting circuit using integrated transformer. 897-900 - Shadi M. Harb, William R. Eisenstadt
A sub-1V CMOS voltage reference generator. 901-904 - Thomas Jackum, Gerhard Maderbacher, Wolfgang Pribyl, Roman Riederer:
Fast transient response capacitor-free linear voltage regulator in 65nm CMOS. 905-908
Wireless, Wearable & Implantable/Injectable Technology II
- Ibrahim K. Mohammed, Bayan S. Sharif
Novel MIMO 4-DOF position control for Capsule Endoscope. 909-912 - Awais M. Kamboh
Channel characterization for implant to body surface communication. 913-916 - Seyed Abdollah Mirbozorgi, Ghazal Nabovati, Mohammad Maymandi-Nejad
Duty Cycle Shift Keying data transfer technique for bio-implantable devices. 917-920 - Chun-Ming Tang, Rizwan Bashirullah:
Channel characterization for galvanic coupled in vivo biomedical devices. 921-924
Power Eletronic Circuits II
- Fabricio Hoff Dupont
Comparison of digital LQR techniques for DC-DC boost converters with large load range. 925-928 - Kamala Hariharan, Susan Luschas, Shoba Krishnan:
Delta-sigma buck converter - A design exploration for GSM Wireless systems. 929-932 - Yi-Ping Su, Yi-Chun Chen, Han-Hsiang Huang, Yu-Huei Lee, Yao-Yi Yang, Ke-Horng Chen
Current-mode synthetic control (CSC) technique for high efficiency DC-DC boost converters over a wide load range. 933-936 - Yong-Seo Koo, Kwang-Yeob Lee, Joong-Ho Choi, Chan-Ho Lee, Yoon-Sik Lee, Yil-Suk Yang:
Electrical characteristics of novel ESD protection devices for I/O and power clamp. 937-940
VLSI for Video Systems II
- Milad Ghantous, Magdy A. Bayoumi:
P2E-DWT: A parallel and pipelined efficient VLSI architecture of 2-D Discrete Wavelet Transform. 941-944 - Juan Du, Lu Yu
A parallel and area-efficient architecture for deblocking filter and Adaptive Loop Filter. 945-948 - Choong Geun Lee, Vasily G. Moshnyaga:
TV energy management by camera-based viewer monitoring. 949-952 - Hee Kwan Eun, Sung Jo Hwang, Myung Hoon Sunwoo, Young Hwan Kim, Hi-Seok Kim:
Integer-pel Motion Estimation specific instructions and their hardware architecture for ASIP. 953-956 - Un Seob Kim, Shin Wang Ho, Myung Hoon Sunwoo:
Novel fractional motion estimation algorithm and architecture using Sub-block Combination. 957-960
DSP for Communications
- Arjuna Madanayake
Antenna-array 2D-IIR digital filters for carrier-modulated frequency-agile and cognitive wireless systems. 961-964 - Arnaud Werquin, Antoine Frappé
Spurious emissions reduction using multirate RF transmitter. 965-968 - Gabriel N. Maggio, Mario R. Hueda:
Design and parallel implementation of an adaptive baseline wander compensator for high-speed optical coherent receivers. 969-972 - Neil Jacklin, Zhi Ding
A convex optimization approach to reducing peak-to-average-power ratio in OFDM. 973-976
ADC and PLL
- Mathieu Pladys, Elena Blokhina
MEMS with Σ - Δ type of feedback loop control as an iterative map. 977-980 - Chang-Ming Lai, Meng-Hung Shen, Yi-Da Wu, Kai-Hsiang Huang, Po-Chiun Huang:
A 0.24 to 2.4 GHz phase-locked loop with low supply sensitivity in 0.18-µm CMOS. 981-984 - Xiaoming Liu, Jing Jin, Cui Mao, Jianjun Zhou
Linear range extensible Phase Frequency Detector and Charge Pump for fast frequency acquisition. 985-988 - Yang Yang, Ali Motafakker-Fard, Bahram Jalali:
Linearization of ADCs via digital post processing. 989-992
Broadband Analog Signal Processing Circuits
- Zhenqi Chen, Fa Foster Dai:
A 3mW 8-Bit radiation-hardened-by-design DAC for ultra-wide temperature range from -180°C to 120°C. 997-1000 - Ming Zhang, Nicolas Llaser, Hervé Mathias:
Design and analysis of a switched-capacitor-based peak detector. 1001-1004 - Bo Xiang, Alyssa B. Apsel:
A distributed amplifier based dispersive delay line. 1005-1008 - Xiaolang Zhang, Shahriar Mirabbasi, Lutz H.-J. Lampe:
A Temperature-stable 60-dB programmable-gain amplifier in 0.13-µm CMOS. 1009-1012
Life Science Applications
- Hui-Min Wang, Yaw-Chern Lee, Brad S. Yen, Chun-Yen Wang, Sheng-Chieh Huang, Kea-Tiong Tang:
A physiological valence/arousal model from musical rhythm to heart rhythm. 1013-1016 - Brian Goldstein, Dongsoo Kim, Angelo Rottigni, Jian Xu, T. Kyle Vanderlick, Eugenio Culurciello:
CMOS low current measurement system for biomedical applications. 1017-1020 - Saumya Kareem, Richard C. S. Morling, Izzet Kale:
A novel method to count the red blood cells in thin blood films. 1021-1024 - Salim Lahmiri, Mounir Boukadoum:
Classification of brain MRI using the LH and HL wavelet transform sub-bands. 1025-1028 - Chun-Yen Wang, Kea-Tiong Tang:
Active noise cancellation of motion artifacts in pulse oximetry using isobestic wavelength light source. 1029-1032
Power System
- Fernando Chierchie
Quasi-analytical spectrum of PWM signals with dead-time for multiple sinusoidal input. 1033-1036 - Hiroyuki Mori, Takayuki Muroi:
Application of probabilistic Tabu Search to distribution system service restoration. 1037-1040 - Javier Alexis Andrade-Romero, Jesus Franklin Andrade, Marat Rafikov
Nonlinear control evaluation of two-stage matrix converter using ideal and non-ideal IGBT Models. 1041-1044 - Caio C. O. Ramos, João Paulo Papa, André N. de Souza, Giovani Chiachia, Alexandre X. Falcão
What is the importance of selecting features for non-technical losses identification? 1045-1048
Testing & Arithmetic Circuits
- Agathoklis Papadopoulos, Theocharis Theocharides
Towards optimal CMOS lifetime via unified reliability modeling and multi-objective optimization. 1049-1052 - Liu Han, Dongdong Chen, Khan A. Wahid, Seok-Bum Ko
Nonspeculative decimal signed digit adder. 1053-1056 - Md. Sajjad Rahaman, Qing Duan, Masud H. Chowdhury:
Spatial- and temporal-reliability aware design for nano-scale VLSI circuits. 1057-1060 - Dursun Baran
Multiplier structures for low power applications in deep-CMOS. 1061-1064 - Sagi Fisher, Raz Dagan, Sagi Blonder, Alexander Fish
An improved model for delay/energy estimation in near-threshold flip-flops. 1065-1068
Digital Signal Processing Applications
- Gustavo J. González, Fernando H. Gregorio
Low complexity block-based unbiased frequency estimation. 1069-1072 - Rajeev C. Nongpiur, Dale J. Shpak:
Bi-criterion optimization of non-uniform filter banks for acoustic echo cancellation. 1073-1076 - Zohaib Hameed, Chunyan Wang:
Edge detection using histogram equalization and multi-filtering process. 1077-1080 - Chun-Shu Wei
Implementation of a motion sickness evaluation system based on EEG spectrum analysis. 1081-1084 - Thiago Ciodaro:
Optimal signal discrimination in a Low signal-to-noise ratio environment. 1085-1088
Neural Networks II
- Qingshan Liu, Jun Wang
A one-layer recurrent neural network for constrained single-ratio linear fractional programming. 1089-1092 - Ruxandra-Liana Costea, Corneliu A. Marinov:
Recurrent neural network as a KWTA selector: A synthesis procedure. 1093-1096 - Vincenzo Manzoni, Andrea Corti, Alessandro Rossi, Stefano Tissino, Sergio M. Savaresi:
GPS offset estimation and correction using satellite constellation information. 1097-1100 - Ari Paasio
Prototype rotation based assisted image analysis for 3D vision system. 1101-1104 - Kleymilson N. Souza, Thiago N. de Castro, Thiago M. Pereira, Ricardo Silva The Pontes, Arthur P. S. Braga
Prediction of core losses on a three-phase transformer using neural networks. 1105-1108
Sigma Delta ADC
- Hussein Fakhoury, Chadi Jabbour, Hasham Khushk, Van-Tam Nguyen, Patrick Loumeau:
A low-power ΣΔ ADC optimized for GSM/EDGE standard in 65-nm CMOS. 1109-1112 - Ahmed Ashry, Hassan Aboushady
Sine-shaping mixer for continuous-time ΣΔ ADCs. 1113-1116 - Chang-Seob Shin, Min-Ho Yoon, Kang-Il Cho, Young-Ju Kim, Kwang-Soo Kim, Seung-Hoon Lee, Gil-Cho Ahn:
A 6.25 MHz BW 8-OSR fifth-order single-stage sigma-delta ADC. 1117-1120 - Julian Garcia, Ana Rusu
High-order continuous-time incremental ΣΔ ADC for multi-channel applications. 1121-1124 - Chadi Jabbour, Hasham Khushk, Hussein Fakhoury, Van Tam Nguyen, Patrick Loumeau:
A LP/HP UMTS/GSM ΣΔ ADC suited for a Zero-IF/Low-IF receiver. 1125-1128
Oscillators & Frequency Synthesizers
- Maarten Lont, Dusan M. Milosevic, Arthur H. M. van Roermund, Guido Dolmans:
Requirement driven low-power LC and ring oscillator design. 1129-1132 - João Casaleiro
A 1 mW low phase-noise relaxation oscillator. 1133-1136 - Carlos Sánchez-Azqueta
A 3.125 GHz four stage voltage controlled ring oscillator in 0.18 CMOS. 1137-1140 - Reza Molavi, Shahriar Mirabbasi, Hormoz Djahanshahi:
A 27-GHz low-power push-push LC VCO with wide tuning range in 65nm CMOS. 1141-1144 - Jin Zhou, Wei Li, Deping Huang, Chen Lian, Ning Li, Junyan Ren:
A dual-mode VCO based low-power synthesizer with optimized automatic frequency calibration for software-defined radio. 1145-1148
Confession Session: Learning from Others Mistakes
- Pamela Abshire, Amine Bermak
Confession session: Learning from others mistakes. 1149-1162
Arithmetic Circuits I
- Ramya Muralidharan, Chip-Hong Chang
A simple radix-4 Booth encoded modulo 2n+1 multiplier. 1163-1166 - Dimitrios M. Schinianakis, Thanos Stouraitis
A RNS Montgomery multiplication architecture. 1167-1170 - Gyeonghoon Kim, Seungjin Lee, Junyoung Park, Hoi-Jun Yoo:
A low-energy hybrid radix-4/-8 multiplier for portable multimedia applications. 1171-1174 - Sunjoo Hong, Taehwan Roh, Hoi-Jun Yoo:
A 145µW 8×8 parallel multiplier based on optimized bypassing architecture. 1175-1178 - James E. Stine
A recursive-divide architecture for multiplication and division. 1179-1182
Design, Project & Learning Technology Innovations in Circuits, Signals & Systems Education
- Eduard Alarcón, Ramon Bragós
Learning to Conceive, Design, Implement and Operate Circuits and Systems. 1183-1186 - Ljiljana Trajkovic
Teaching circuits to new generations of engineers. 1187-1190 - Yong Lian
An online adaptive tutoring system for design-centric courses. 1191-1194 - Wim Dehaene, Georges G. E. Gielen, Geert Deconinck
Circuits and systems engineering education through interdisciplinary team-based design projects. 1195-1198 - Jeff C. Jensen, Edward A. Lee
An introductory capstone design course on embedded systems. 1199-1202
Physical Design & Clock Synthesis
- Wei Zhong, Song Chen
Floorplanning driven Network-on-Chip synthesis for 3-D SoCs. 1203-1206 - Jason Cong, John Lee, Guojie Luo:
A unified optimization framework for simultaneous gate sizing and placement under density constraints. 1207-1210 - Sachhidh Kannan, Garrett S. Rose
A hierarchical 3-D floorplanning algorithm for many-core CMP networks. 1211-1214 - Matthew R. Guthaus
Distributed LC resonant clock tree synthesis. 1215-1218 - Jianchao Lu, Yusuf Aksehir, Baris Taskin:
Register On MEsh (ROME): A novel approach for clock mesh network synthesis. 1219-1222
Multimedia Compression & Quality
- Tsung-Yuan Huang, He-Yuan Lin, Chun-Fu Chen, Gwo Giun Lee:
Reconfigurable inverse transform architecture for multiple purpose video coding. 1223-1226 - Hongkai Xiong
A learning-based video compression on low-quality data by unscented kalman filters with Gaussian process regression. 1227-1230 - Zhenzhong Chen, Yap-Peng Tan:
Frame-level quantization control for perceptual quality constrained H.264/AVC video coding. 1231-1234 - Gao Yang, Yap-Peng Tan:
Blind PSNR estimation using shifted blocks for JPEG images. 1235-1238 - Gao Yang, Ci Wang, Yap-Peng Tan:
Estimating relative objective quality among images compressed from the same original. 1239-1242
DSP Implementation
- Li Xu, Shi Yan, Shin-ya Matsushita, Zhiping Lin:
Roesser model realization of MIMO n-D systems by elementary operations. 1243-1246 - Arjuna Madanayake
Algebraic integer based 8×8 2-D DCT architecture for digital video processing. 1247-1250 - Zaid J. Towfic, Ali H. Sayed:
Clock jitter estimation in noise. 1251-1254 - Hanan M. Hassan, Ahmed F. Shalash, Karim Mohamed:
FPGA Implementation of an ASIP for high throughput DFT/DCT 1D/2D engine. 1255-1258 - Taesang Cho
A high-speed low-complexity modified radix-25 FFT processor for gigabit WPAN applications. 1259-1262
Recent Advances in Linear & Non-Linear Adaptive Filters
- Tokunbo Ogunfunmi
On the complex Kernel-based adaptive filter. 1263-1266 - Bijit Kumar Das, Mrityunjoy Chakraborty, Soumitro Banerjee:
Adaptive identification of sparse systems with variable sparsity. 1267-1270 - Chandrasekhar Radhakrishnan, William Kenneth Jenkins:
Fault Tolerant Adaptive Filters based on modified discrete fourier transform architectures. 1271-1274 - Jarlath Ifiok Umoh, Tokunbo Ogunfunmi
Digital post-linearization of a Wideband Low Noise Amplifier for ultra-wideband wireless receivers. 1275-1278 - Carlos Aurélio Faria da Rocha, Maurice G. Bellanger:
Sub-channel equalizer design based on geometric interpolation for FBMC/OQAM systems. 1279-1282
UWB Circuits & Systems I
- Ahmed M. El-Gabaly, Carlos E. Saavedra
A 24 GHz quadrature pulsed oscillator for short-range UWB vehicular radar applications. 1283-1286 - Ahmed A. Helmy, Kamran Entesari:
Reduced-size ultra-wideband true-time-delay beam-forming receivers. 1287-1290 - Wei-Hsiang Hung, Kuan-Ting Lin, Jian-Yu Hsieh, Shey-Shi Lu
A 2-6GHz broadband CMOS low-noise amplifier with current reuse topology utilizing a noise-shaping technique. 1291-1294 - Wei Tang
A non-coherent FSK-OOK UWB impulse radio transmitter for clock-less synchronization. 1295-1298 - Kin Keung Lee, Malihe Zarre Dooghabadi, Håkon A. Hjortland
A 5.2 pJ/pulse impulse radio pulse generator in 90 nm CMOS. 1299-1302
Low-Density Parity-Check Decoder Design
- Xinmiao Zhang, Fang Cai:
Low-complexity architectures for reliability-based message-passing non-binary LDPC decoding. 1303-1306 - Jienan Chen, Jianhao Hu:
Sliding Window Method for stochastic LDPC decoder. 1307-1310 - Kyung-Il Baek, Hanho Lee, Chang-Seok Choi, Sangmin Kim
A high-throughput LDPC decoder architecture for high-rate WPAN systems. 1311-1314 - Ming Gu, Shantanu Chakrabartty:
An adaptive analog low-density parity-check decoder based on margin propagation. 1315-1318 - Bongjin Kim, In-Cheol Park
QC-LDPC Decoding Architecture based on Stride Scheduling. 1319-1322
Bifurcation and Chaos
- Hironori Kumeno, Yoshifumi Nishio
Bifurcation and basin in two coupled parametrically forced logistic maps. 1323-1326 - Kuntal Mandal
Symmetry-breaking bifurcation in load resonant dc-dc converters. 1327-1330 - Sergio Callegari
Resonate and fire dynamics in Complex Oscillation Based Test of analog filters. 1331-1334 - Simin Yu, Jinhu Lu
Design of grid multi-wing butterfly chaotic attractors from piecewise Lü system based on switching control and heteroclinic orbit. 1335-1338 - Zbigniew Galias
On rigorous integration of piece-wise linear continuous systems. 1339-1342
Integrated Power Converters & Energy Harvesting
- Helder R. Florentino, Raimundo C. S. Freire
Electrostatic vibration energy harvester with piezoelectric start-up generator. 1343-1346 - Thomas Santa, Mario Auer, Christoph Sandner, Christian Lindholm:
Switched capacitor DC-DC converter in 65nm CMOS technology with a peak efficiency of 97%. 1351-1354 - Qingquan Tang, Bo Li, Dariusz Czarkowski, Adrian Ioinovici:
Switched-capacitor based step-up converter for alternative energy applications. 1355-1358 - Juergen Wittmann, Bernhard Wicht
EMC influence of the charge pump in linear regulators - Design, simulation and measurements. 1359-1362
Delta-Sigma Modulator
- Brian Fitzgibbon, Michael Peter Kennedy, Franco Maloberti:
A novel implementation of dithered digital delta-sigma modulators via bus-splitting. 1363-1366 - Blazej Nowacki, Nuno Paulino
A second-order switched-capacitor ΔΣ modulator using very incomplete settling. 1367-1370 - Aldo Pena-Perez, Edoardo Bonizzoni, Franco Maloberti:
A low-power third-order ΔΣ modulator using a single operational amplifier. 1371-1374 - Akhil Gupta, Shahrokh Ahmadi, Mona E. Zaghloul
A 400 MHz delta-sigma modulator for bandpass IF digitization around 100 MHz with excess loop delay compensation. 1375-1378 - Van Tam Nguyen, Hussein Fakhoury, Patrick Loumeau, Philippe Bénabès:
Generalized multi-stage closed loop sigma delta modulator. 1379-1382
Analog Filtering & Signal Processing
- Pervez M. Aziz, Amaresh V. Malipatil:
Adaptation algorithms for a class of continuous time analog equalizers with application to serial links. 1383-1386 - Yuanqi Hu, Yan Liu, Timothy G. Constandinou
A 5s-time-constant temperature-stable integrator for a tuneable PID controller in LOC applications. 1387-1390 - Nagendra Krishnapura
Electronic time stretching for fast digitization. 1391-1394 - Xiaohua Yu, Nathan M. Neihart:
Integrated multi-tap transformer for reconfigurable multimode matching networks. 1395-1398 - Jae-Seung Lee, Chang-Jin Jeong, Yeong-Shin Jang, In-Young Lee, Sang-Sung Lee, Seok-Kyun Han, Sang-Gug Lee:
A high linear low flicker noise 25% duty cycle LO I/Q mixer for a FM radio receiver. 1399-1402
Noise Immunity & ESD
- Chih-Ting Yeh, Yung-Chih Liang, Ming-Dou Ker:
Design of power-rail ESD clamp circuit with adjustable holding voltage against mis-trigger or transient-induced latch-on events. 1403-1406 - Md. Khaled Hassan, Md. Sajjad Rahaman, Masud H. Chowdhury:
Addressing crosstalk issue in on-chip carbon nanotube interconnects using negative capacitance. 1407-1410 - Emre Salman:
Noise coupling due to through silicon vias (TSVs) in 3-D integrated circuits. 1411-1414 - Robert Szczygiel
A low noise, Fast Pixel Readout IC working in single photon counting mode with energy window selection in 90 nm CMOS. 1415-1418 - Sally Safwat, Ezz El-Din O. Hussein, Maged Ghoneima, Yehea I. Ismail:
A 12Gbps all digital low power SerDes transceiver for on-chip networking. 1419-1422
Arithmetic Circuits II
- Yu-Shun Wang, Min-Han Hsieh, Chia-Ming Liu, Yi-Chi Wu, Bing-Feng Lin, Hsien-Chen Chiu, Charlie Chung-Ping Chen:
A 1.2V 6.4GHz 181ps 64-bit CD domino adder with DLL measurement technique. 1423-1426 - Jun Xu, Hong Wang:
Desynchronize a legacy floating-point adder with operand-dependant delay elements. 1427-1430 - Jeremy Yung Shern Low, Chip-Hong Chang
A new RNS scaler for {2n - 1, 2n, 2n + 1}. 1431-1434 - Stanislaw J. Piestrak:
Design of multi-residue generators using shared logic. 1435-1438 - Kenny Johansson, Oscar Gustafsson
Minimum adder depth multiple constant multiplication algorithm for low power FIR filters. 1439-1442
Circuits for Biomedical Systems I
- Costas Laoudias
0.5V wavelet filters using current mirrors. 1443-1446 - Carolina Mora Lopez
A 16-channel low-noise programmable system for the recording of neural signals. 1451-1454 - Chin-Lin Lee, Chih-Cheng Hsieh:
A 0.6V CMOS Image Sensor with in-pixel biphasic current driver for biomedical application. 1455-1458 - Amandeep Singh, Refet Firat Yazicioglu, Chris Van Hoof
Design of widely tunable Mexican hat wavelet filter for cardiac signal analysis. 1459-1462
Circuit Simulation & Testing
- Bijan Alizadeh, Masahiro Fujita:
Early case splitting and false path detection to improve high level ATPG techniques. 1463-1466 - Shih-Hung Weng, Peng Du, Chung-Kuan Cheng:
A fast and stable explicit integration method by matrix exponential operator for large scale circuit simulation. 1467-1470 - Mazen Abi-Hussein, Corinne Berland, Olivier Venard:
Novel simulation approach for 3G W-CDMA receivers. 1471-1474 - Koji Yamazaki, Yusuke Sekihara, Takashi Aoki, Eiichi Hosoya, Akira Onozawa:
A heuristic algorithm for reducing system-level test vectors with high branch coverage. 1475-1478 - Miroslav N. Velev
CNF encodings of cardinality in formal methods for robustness checking of gate-level circuits. 1479-1482
Design & Implementation of Multimedia Systems
- Francesco Menichelli, Mauro Olivieri
Performance evaluation of Jpeg2000 implementation on VLIW cores, SIMD cores and multi-cores. 1483-1486 - Yuliang Tao, Guanghui He, Weifeng He, Qin Wang, Jun Ma, Zhigang Mao:
Effective multi-standard macroblock prediction VLSI design for reconfigurable multimedia systems. 1487-1490 - Alexandre Solon Nery, Nadia Nedjah
A parallel architecture for ray-tracing with an embedded intersection algorithm. 1491-1494 - Xing Wen, Oscar C. Au, Jiang Xu
Sub-pixel downsampling of video with matching highly data re-use hardware architecture. 1495-1499 - Gabriel Marchesan Almeida, Rémi Busseuil, Everton Alceu Carara, Nicolas Hebert, Sameer Varyani, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Fernando Gehm Moraes
Predictive Dynamic Frequency Scaling for Multi-Processor Systems-on-Chip. 1500-1503
Discrete Transforms
- Magdy T. Hanna
Orthonormal eigenvectors of the DFT-IV matrix by the eigenanalysis of a nearly tridiagonal matrix. 1504-1507 - Chandrasekhar Radhakrishnan, William Kenneth Jenkins:
The 2-D Modulated Discrete Fourier Transform for 2-D fast convolution and digital filtering. 1508-1511 - Liang Tao, Hon Keung Kwan
Filterbank-based fast parallel algorithms for 2-D DHT-based real-valued discrete Gabor transform. 1512-1515 - Saad Bouguezel
An efficient algorithm for the conjugate symmetric sequency-ordered complex Hadamard transform. 1516-1519 - Jian-Jiun Ding, Soo-Chang Pei, Po-Hung Wu:
Jacket Haar transform. 1520-1523
Applications and Methodologies for Many-core Platforms
- Victor W. Lee, Yen-Kuang Chen
Emerging applications for multi/many-core processors. 1524-1527 - Barry M. Trager, Chai Wah Wu
GPU-enabled parallel processing for image halftoning applications. 1528-1531 - Ericson Chua, Wai-Chi Fang, Chiu-Kuo Chen, Chih-Chung Fu, Shao-Yen Tseng, Shih Kang, Zong-Han Hsieh:
A highly-integrated biomedical multiprocessor system for portable brain-heart monitoring. 1532-1535 - Tamás Roska, Ákos Zarándy, Giovanni Egidio Pazienza:
Applications of the virtual cellular machine to many-core processors. 1536-1539
UWB Circuits & Systems II
- Farid Bautista, Dominique Morche, Francois Dehmas
UWB beamforming architecture for RTLS applications using digital phase-shifters. 1540-1543 - Haipeng Fu, Deyun Cai, Junyan Ren, Wei Li:
A harmonic-suppressed regenerative divide-by-5 frequency divider for UWB applications. 1544-1547 - Yuan Gao
An integrated beamformer for IR-UWB receiver in 0.18-µm CMOS. 1548-1551 - David Sarmiento M., Zhuo Zou, Qin Zhou, Jia Mao, Peng Wang, Fredrik Jonsson, Li-Rong Zheng:
Analog front-end RX design for UWB impulse radio in 90nm CMOS. 1552-1555 - Ali Meaamar, Chirn Chye Boon
A 3.1-8 GHz CMOS UWB front-end receiver. 1556-1559
Imagers I
- Dipayan Das, Hereward J. Mills, Steve Collins:
A wide dynamic range CMOS image sensor with the optimum photoresponse per pixel. 1560-1563 - Stephen J. Carey, Alexey Lopich, Piotr Dudek:
A processor element for a mixed signal cellular processor array vision chip. 1564-1567 - Joseph H. Lin, Recep Ozgun, Philippe O. Pouliquen, Andreas G. Andreou
A 3-pin 1V 115µW 176×144 autonomous active pixel image sensor in 0.18µm CMOS. 1568-1571 - Christoph Posch
Sensitivity and uniformity of a 0.18µm CMOS temporal contrast pixel array. 1572-1575 - Timothy York, Viktor Gruev:
Optical characterization of a polarization imager. 1576-1579
Complex Networks & Communications
- Georges Kaddoum, Mai Vu, François Gagnon
Performance analysis of differential chaotic shift keying communications in MIMO systems. 1580-1583 - Di He:
Improving the computer network intrusion detection performance using the relevance vector machine with Chebyshev chaotic map. 1584-1587 - Yongxiang Xia, Jin Fan:
Efficient attack strategy to communication networks with partial degree information. 1588-1591 - Xun Li, Xiang Li
Roles of betweenness in controlling catastrophic cascading failures on scale-free networks. 1592-1595 - Jiahu Qin, Wei Xing Zheng, Huijun Gao:
A study of synchronization of complex networks via pinning control. 1596-1599
Modeling & Control of Power Converter
- Veda Prakash Galigekere, Marian K. Kazimierczuk:
Small-signal modeling of PWM Z-source converter by circuit-averaging technique. 1600-1603 - Matteo Agostinelli, Robert Priewasser, Stefano Marsili, Mario Huemer:
Fixed-frequency Pseudo Sliding Mode control for a Buck-Boost DC-DC converter in mobile applications: A comparison with a linear PID controller. 1604-1607 - S. P. Ribas, Vinicius Foletto Montagner
Discrete-time H∞ control of PWM inverters: Experimental results complying with IEC 62040-3. 1608-1611 - Cheng Huang
Cross-Regulation-Suppression control scheme for CCM Single-Inductor-Dual-Output buck converter with ordered-power-distributive control. 1612-1615 - Song Xiong, Siew-Chong Tan
Analysis of a high-voltage-gain hybrid switched-capacitor buck converter. 1616-1619
Data Converters
- Benjamin P. Hershberg, Skyler Weaver, Seiji Takeuchi, Koichi Hamashita, Un-Ku Moon:
Binary Access Memory: An optimized lookup table for successive approximation applications. 1620-1623 - Hassan Sepehrian, Mehdi Saberi
A signal-specific successive-approximation analog-to-digital converter. 1624-1627 - Jaswinder Lota, Mohammed Al-Janabi:
Accurate stability prediction of single-bit higher-order delta-sigma (Δ-Σ) modulators for speech codecs. 1628-1631 - Sudharsan Kanagaraj, Bahar Jalali Farahani:
An online fully-digital calibration of leakage noise in MASH continuous time ΔΣ modulators. 1632-1635 - Ramy Saad, Sebastian Hoyos:
Sensitivity analysis of pulse-width jitter induced noise in continuous-time delta-sigma modulators to out-of-band blockers in wireless receivers. 1636-1639
Analog Filtering Circuits and Techniques
- Le Ye, Congyin Shi
A 0.47mW 6th-order 20MHz active filter using highly power-efficient Opamp. 1640-1643 - Marcello De Matteis
4th-Order 84dB-DR CMOS-90nm low-pass filter for WLAN receivers. 1644-1647 - Mladen Vucic, Goran Molnar, Sasa Djukic:
Synthesis of linear-phase selective filters based on maximum of time-domain response. 1648-1651 - Arjuna Madanayake
Analog 2D fan filters from discrete domain transfer functions. 1652-1655 - Mansour Rachid, Sudhakar Pamarti
A novel reconfigurable alias interference cancellation technique for A-to-D conversion. 1656-1659
Thermal Issues: Modeling & Design
- Simone Corbetta, William Fornaciari
Estimation of thermal status in multi-core systems. 1660-1663 - Seungwook Paek, Jiehwan Oh, Sang-Hye Chung, Lee-Sup Kim:
Area-efficient dynamic thermal management unit using MDLL with shared DLL scheme for many-core processors. 1664-1667 - Pritesh Vora, Masud H. Chowdhury:
A circuit implementation for dynamic thermal management techniques. 1668-1671 - Woojin Yun, Kyungsu Kang, Chong-Min Kyung:
Thermal-aware energy minimization of 3D-stacked L3 cache with error rate limitation. 1672-1675 - Marcelo Mandelli, Luciano Ost
Energy-aware dynamic task mapping for NoC-based MPSoCs. 1676-1679
VLSI for Communication Systems
- Amr G. Wassal, Ahmed R. Elsherif:
Efficient implementation of secondary synchronization symbol detection in 3GPP LTE. 1680-1683 - Eun Ji Kim, Myung Hoon Sunwoo:
High speed eight-parallel mixed-radix FFT Processor for OFDM systems. 1684-1687 - Paul N. Whatmough, Marcus R. Perrett, Safa Isam, Izzat Darwazeh:
VLSI architecture for a reconfigurable Spectrally Efficient FDM baseband transmitter. 1688-1691 - Yu-Shun Wang, Min-Han Hsieh, Yi-Chi Wu, Chia-Ming Liu, Hsien-Chen Chiu, Bing-Feng Lin, Charlie Chung-Ping Chen:
A 12 Gb/s chip-to-chip AC coupled transceiver. 1692-1695 - Chenxin Zhang, Isael Diaz, Per Andersson, Joachim Neves Rodrigues, Viktor Öwall:
Reconfigurable cell array for concurrent support of multiple radio standards by flexible mapping. 1696-1699
Circuits for Biomedical Systems II
- Pablo Castro-Lisboa, Fernando Silveira:
High CMRR power efficient neural recording amplifier architecture. 1700-1703 - Alberto Rodríguez-Pérez
A power efficient neural spike recording channel with data bandwidth reduction. 1704-1707 - Jianan Song, David Welch, Jennifer Blain Christen:
A fully-adjustable dynamic range capacitance sensing circuit in a 0.15µm 3D SOI process. 1708-1711 - Karim Abdelhalim, Roman Genov:
CMOS DAC-sharing stimulator for neural recording and stimulation arrays. 1712-1715 - Hyungwoo Lee, Kiseok Song, Long Yan, Hoi-Jun Yoo:
A 2.4µW 400nC/s constant charge injector for wirelessly-powered electro-acupuncture. 1716-1719
Circuit Design & Analysis
- Awais Sani, Philippe Coussy, Cyrille Chavet, Eric Martin:
An approach based on edge coloring of tripartite graph for designing parallel LDPC interleaver architecture. 1720-1723 - Josef Dobes, Jan Míchal:
An implementation of the circuit multiobjective optimization with the weighted sum strategy and goal attainment method. 1728-1731 - Omid Sarbishei, Katarzyna Radecka:
Analysis of Mean-Square-Error (MSE) for fixed-point FFT units. 1732-1735 - Yu Pang, Katarzyna Radecka:
An efficient algorithm of performing range analysis for fixed-point arithmetic circuits based on SAT checking. 1736-1739
Compressive Sensing & Its Applications
- Jeevan K. Pant, Wu-Sheng Lu, Andreas Antoniou:
Unconstrained regularized ℓp-norm based algorithm for the reconstruction of sparse signals. 1740-1743 - Hossein Mamaghanian, Nadia Khaled, David Atienza, Pierre Vandergheynst:
Real-time compressed sensing-based electrocardiogram compression on energy-constrained wireless body sensors. 1744-1747 - Moshe Mishali, Rolf B. Hilgendorf, Eli Shoshan, Ina Rivkin, Yonina C. Eldar:
Generic sensing hardware and real-time reconstruction for structured analog signals. 1748-1751 - Jian-Feng Gu, Wei-Ping Zhu
Compressed sensing for DOA estimation with fewer receivers than sensors. 1752-1755
Multirate & Filter Banks
- Ahmet H. Kayran
Generalized 2D lattice structure for causal and noncausal modeling of random fields. 1756-1759 - David B. H. Tay:
Direct design of phase factor in the common-factor technique for Hilbert-Pairs. 1760-1763 - Fernando Cruz-Roldán, Manuel Blanco-Velasco
Assessment of NPR MDFT filter banks for subband coding and data transmission. 1764-1767 - Leonardo Gomes Baltar, Amine Mezghani, Josef A. Nossek
A method to convert near-perfect into perfect reconstruction FIR prototype filters for modulated filter banks. 1768-1771
VLSI Architectures for LDPC Coding/Decoding
- Christoph Roth, Alessandro Cevrero, Christoph Studer, Yusuf Leblebici, Andreas Burg:
Area, throughput, and energy-efficiency trade-offs in the VLSI implementation of LDPC decoders. 1772-1775 - Yang Sun, Guohui Wang, Joseph R. Cavallaro
Multi-layer parallel decoding algorithm and vlsi architecture for quasi-cyclic LDPC codes. 1776-1779 - Tinoosh Mohsenin, Houshmand Shirani-mehr, Bevan M. Baas:
Low power LDPC decoder with efficient stopping scheme for undecodable blocks. 1780-1783 - Matthew Weiner, Borivoje Nikolic
LDPC decoder architecture for high-data rate personal-area networks. 1784-1787 - Christian Schlegel, Vincent C. Gaudet
Hardware implementation challenges of modern error control decoders. 1788-1791
High Performance Receiver Design Techniques
- Jangjoon Lee, Byunghoo Jung:
Wide dynamic range, 0.8 to 6 GHz LNA in 45 nm digital SOI CMOS. 1792-1795 - Jianlei Shi, Jagdish Nayayan Pandey, Brian P. Otis:
A 1.5 GHz high-Q receiver based on current reuse. 1800-1803 - Carsten Barth, Ivan R. Linscott, Umran S. Inan
A Double notch RF filter architecture for SAW-less GPS receivers. 1804-1807 - Jesse Richmond, Jan M. Rabaey:
Digital energy detection for OOK demodulation in ultra-low power radios. 1808-1811
Imagers II
- Josep Maria Margarit
A self-biased PLL-tuned AER pixel for high-speed infrared imagers. 1812-1815 - Michael J. Hall
Noise analysis of a current-mode read circuit for sensing magnetic tunnel junction resistance. 1816-1819 - Qing Gao, Orly Yadid-Pecht:
Dual VDD block based CMOS image sensor - preliminary evaluation. 1820-1823 - Joseph H. Lin, Andreas G. Andreou
A 32×32 single photon avalanche diode imager with delay-insensitive address-event readout. 1824-1827 - Rob Perkins, Viktor Gruev:
Noise modeling of Stokes parameters in division of focal plane polarization imagers. 1828-1831
Analysis, Modeling, and Simulations
- Hisham Abdalla, Matthew D. Pickett:
SPICE modeling of memristors. 1832-1835 - Erwin J. G. Janssen, Dusan M. Milosevic, Peter G. M. Baltus, Hooman Habibi:
Modeling and analysis of nonlinearities and bandwidth limitations in RF receivers. 1836-1839 - Zeynep Dilli, Akin Akturk, Neil Goldsman, Michael A. Holloway, John C. Rodgers:
Nonlinear behavior of electrostatic discharge protection structures under high-power microwave excitation: Modeling and simulation. 1840-1843 - Farah A. Mohammadi, Farnoos Farrokhi Farkhani, Shazzat Hossain:
A new approach for electrothermal analysis of electronic circuits. 1844-1847 - Christoph Zorn, Sebastian Stegemann, Timon Brückner, Maurits Ortmanns, Wolfgang Mathis
A novel optimization method for CT sigma-delta-modulators using a switched system model. 1848-1851
Power System & Motor Driver
- Hiroyuki Mori, Akira Takahashi:
Hybrid intelligent system for daily maximum temperature forecasting in smart grids. 1852-1855 - Edson A. R. Theodoro
A fast method for islanding analysis in power system grids. 1856-1859 - Laurent Fabre, Ira Nagel, Cedric Meinen, Rachid Cherkaoui, Maher Kayal:
A mixed-signal platform dedicated to power system dynamic computation. 1860-1863 - Juan C. Jiménez, Chika O. Nwankpa:
Circuit model of a phase-shifting transformer for analog power flow emulation. 1864-1867 - Christian Lindholm:
High frequency and low power semi-synchronous PFM state machine. 1868-1871
Narrowband Signal Processing Circuits & Systems
- Congyin Shi
-99dBc/Hz@10kHz 1MHz-step dual-loop integer-N PLL with anti-mislocking frequency calibration for global navigation satellite system receiver. 1876-1879 - Hitesh Shrimali, Shouri Chatterjee
Third order harmonic cancellation technique for a parametric amplifier. 1880-1883 - Mahdi Barati, Mohammad Yavari
A highly linear mixer with inherent balun using a new technique to remove common mode currents. 1884-1887 - Amany El-Gouhary
Analysis of transformer-based resonator quality factor and bandwidth and the implications to VCOs. 1888-1891
Optimization of Communication Systems
- Huan Wang, Yun Pan, Xiaolang Yan, Ruohong Huan:
Behavioral modeling of direct sampling mixer. 1892-1895 - Amine Mezghani, Josef A. Nossek
Power efficiency in communication systems from a circuit perspective. 1896-1899 - Alp Oguz, Dominique Morche, Catherine Dehollain:
Adaptive power reconfigurability for decreasing power dissipation of wireless personal area network receivers. 1900-1903 - Ben-Yue Chang, Milos Ivkovic, Lara Dolecek:
Computationally-efficient iterative decoding for storage system design: Min-Sum refined. 1904-1907
Power Converter & Modeling
- Xiaocheng Jing, Philip K. T. Mok
Current-slope-controlled adaptive-on-time DC-DC converter with fixed frequency and fast transient response. 1908-1911 - Matthias Radecker, Fabio Bisogno
An energy-based heuristic operator method for resonant power circuit estimation predicting parameter sensitivity. 1912-1915 - Anders Hultgren, Jan Melin, Per Ranstad:
Limit cycle control of an industrially applied resonant converter modelled as a hybrid system. 1916-1919 - Martin F. Ceci, María Belén D'Amico:
An alternative strategy for reducing mode transitions in a four-switch buck-boost converter. 1920-1923 - Carlos Carvalho
A step-up μ-power converter for solar energy harvesting applications, using Hill Climbing maximum power point tracking. 1924-1927
Digital Circuit Designs II
- Cheng-Hao Chan, Kun-Lin Tsai
A priority based output arbiter for NoC router. 1928-1931 - James Docherty, Albert Koelmans:
A flexible hardware implementation of SHA-1 and SHA-2 Hash Functions. 1932-1935 - Weng-Geng Ho, Kwen-Siong Chong, Bah-Hwee Gwee
Improved asynchronous-logic dual-rail Sense Amplifier-based Pass Transistor Logic with high speed and low power operation. 1936-1939 - Jianchao Lu, Baris Taskin:
Reconfigurable clock polarity assignment for peak current reduction of clock-gated circuits. 1940-1943 - Yinan Sun, Yongpan Liu, Xiaohan Wang, Hongliang Xu, Huazhong Yang:
Design methodology of multistage time-domain logic speculation circuits. 1944-1947 - Tapio Rapinoja, Liangge Xu, Kari Stadius, Jussi Ryynänen
Implementation of all-digital wideband RF frequency synthesizers in 65-nm CMOS technology. 1948-1951
Multimedia Systems & Applications
- Li Xie, Weifeng He, Naifeng Jing, Zhigang Mao:
A thermal-aware task mapping flow for coarse-grain dynamic reconfigurable processor. 1952-1955 - Ying-Xun Lai
Parallel Dynamic Voltage and Frequency Scaling for stream decoding using a multicore embedded system. 1956-1959 - Ming-Yu Kuo, Yao Li, Chen-Yi Lee:
An area-efficient high-accuracy prediction-based CABAC decoder architecture for H.264/AVC. 1960-1963 - Boon-Seng Chew, Lap-Pui Chau
Image based approach with k-mean clustering for the compression of human motion sequences. 1964-1967
Nonlinear Signal Processing & Circuits
- Georges Kaddoum, Ghyslain Gagnon
Robust synchronization technique for chaotic symbolic dynamics modulation. 1968-1971 - Di He:
Optimization of quartic double-well bistable stochastic resonance system. 1972-1975 - Chi-Tsun Cheng
A chaotic motion controller for camera networks. 1976-1979 - Tommaso Addabbo
Pseudo-chaotic lossy compression of TRBGs. 1980-1983
Live Demos II
- Chris Perkins, Lydia Lei, Michael Kuhlman, Tsung-Hsueh Lee, George Gateau, Sarah Bergbreiter, Pamela Abshire:
Distance sensing for mini-robots: RSSI vs. TDOA. 1984-1987 - Stefan Schiefer, Stephan Hartmann, Stefan Scholze, Johannes Partzsch
Live demonstration: Packet-based AER with 3Gevent/s cumulative throughput. 1988 - Alexey Lopich, David Robert Wallace Barr, Bin Wang, Piotr Dudek:
Live demonstration: Real-time image processing on ASPA2 vision system. 1989 - Timothy York, Rob Perkins, Viktor Gruev:
Live demonstration: Material detection via an integrated polarization imager. 1990
Live Demos I
- Antônio Carlos M. de Queiroz:
Live demonstration: Electronic doubler of electricity. 1991 - Tsan-Jieh Chen, Chih-Hui Weng, Herming Chiueh, Chih-Cheng Hsieh, Shang-Fu Yeh, Wen-Hsu Chang, Ying-Zong Juang, Hann-Huei Tsai, Chin-Fong Chiu:
Live demonstration: The prototype of real-time image pre-processing system for satellites' remote sensing. 1992-1996 - Zheng Da Clinton Goh, Pantelis Georgiou
Live demonstration: A CMOS-based lab-on-chip array for combined magnetic manipulation and opto-chemical sensing. 1997-2001 - Rolf B. Hilgendorf, Moshe Mishali, Yonina C. Eldar, Eli Shoshan, Ina Rivkin:
Live demonstration: MWC for real-time application. 2002
Digital to Analog Converters
- Elbert Bechthum, Georgi I. Radulov, Arthur H. M. van Roermund:
A novel temperature and disturbance insensitive DAC calibration method. 2003-2006 - Chih-Wen Lu, Hung-Cheng Chen, Yen-Chung Huang:
An area-efficient TFT-LCD column driver with DAC sharing technique. 2007-2010 - Zhenglin Yang, Libin Yao, Yong Lian
A 0.7-V 100-µW audio delta-sigma modulator with 92-dB DR in 0.13-µm CMOS. 2011-2014 - Elbert Bechthum, Yongjian Tang, Hans Hegt, Arthur H. M. van Roermund:
Timing error measurement for highly linear wideband Digital to Analog Converters. 2019-2022
Interface Circuits
- Chun-Kai Wang, Che-Sheng Chen, Kuei-Ann Wen:
A monolithic CMOS MEMS accelerometer with chopper correlated double sampling readout circuit. 2023-2026 - Jagdish Chand, Ravi Mehta, Sumantra Seth, Sujoy Chakravarty:
High voltage protection for USB transceivers in 45nm CMOS. 2027-2030 - Alexander Singh-Alvarado, Manu Rastogi, John G. Harris, José C. Príncipe:
The integrate-and-fire sampler: A special type of asynchronous Σ - Δ modulator. 2031-2034 - Rajath Vasudevamurthy
A mostly-digital analog scan-out chain for low bandwidth voltage measurement for analog IP test. 2035-2038 - Yasutaka Haga, Izzet Kale:
Bulk-driven DC level shifter. 2039-2042
Variability-Aware Modeling & Designs
- Milena Djukanovic, Luca Giancane
Leakage Power Analysis attacks: Effectiveness on DPA resistant logic styles under process variations. 2043-2046 - Mina Raymond, Maged Ghoneima, Yehea I. Ismail:
A dynamic calibration scheme for on-chip process and temperature variations. 2047-2050 - Lawrence T. Clark, David E. Pettit, Keith E. Holbert
Validation of and delay variation in total ionizing dose hardened standard cell libraries. 2051-2054 - Mohd Azman Abdul Latif, Noohul Basheer Zain Ali, Fawnizu Azmadi Hussin
IDVP (Intra-Die Variation Probe) for System-On-Chip (SoC) Infant Mortality screen. 2055-2058 - Wenjuan Zhang, Yajun Ha:
A Hilbert curve-based delay fault characterization method for FPGAs. 2059-2062
Low-Power Circuits I
- Louis P. Alarcón, Tsung-Te Liu, Jan M. Rabaey:
A low-leakage parallel CRC generator for ultra-low power applications. 2063-2066 - Takao Kawano, Naoya Onizawa, Atsushi Matsumoto, Takahiro Hanyu:
Adjacent-State monitoring based fine-grained power-gating scheme for a low-power asynchronous pipelined system. 2067-2070 - Mehrdad Majzoobi, Golsa Ghiaasi
Ultra-low power current-based PUF. 2071-2074 - Fabio Frustaci
Tapered-VTH CMOS buffer design for improved energy efficiency in deep nanometer technology. 2075-2078 - Davide Baccarin, David Esseni
A novel back-biasing low-leakage technique for FinFET forced stacks. 2079-2082
Biometrics, Biomedical Signal Processing & Bioimaging Technology
- Fan-Chiang Yi, Ching-Wen Huang, Tai-Shih Chi, Shyh-Jye Jou:
Low power InfomaxICA with compensation strategy for binaural hearing-aid. 2083-2086 - Matteo Bassi
Integrated transceivers for UWB breast cancer imaging: Architecture and circuit constraints. 2087-2090 - Gunes D. Altinok, Mohammed Al-Janabi, Izzet Kale:
Improved ultrasound digital beamforming using single-bit sigma-delta modulators with band-pass decimation filters. 2091-2094 - Aabeeya Salman, Emily G. Allstot, Andrew Y. Chen, Anna M. R. Dixon, Daibashish Gangopadhyay, David J. Allstot:
Compressive sampling of EMG bio-signals. 2095-2098 - Sarah Gibson, Victoria Wang, Dejan Markovic:
Effects of quantization on neural spike sorting. 2099-2102
Recent Advances in Complex Networks & Multi-Agent Systems
- Jinhu Lu
Modelling, analysis and control of multi-agent systems: A brief overview. 2103-2106 - Bingo Wing-Kuen Ling, Paul Stewart, Kok Lay Teo, Chi Kong Tse:
Study of near consensus complex social networks using eigen theory. 2107-2110 - Chai Wah Wu
Can stubbornness or gullibility lead to faster consensus? A study of various strategies for reaching consensus in a model of the naming game. 2111-2114 - Wen-Qiang Tian, Xiang Li
A gravity-based A/R model of swarming a multi-agent network with density information. 2115-2118 - Bing Li, Weifeng Pan
Multi-granularity dynamic analysis of complex software networks. 2119-2124
Compressed Sensing & Nonlinear Signal Processing
- Flávio C. A. Teixeira, Stuart W. A. Bergen, Andreas Antoniou:
Signal recovery method for compressive sensing using relaxation and second-order cone programming. 2125-2128 - Mauro Mangia
Analog-to-information conversion of sparse and non-white signals: Statistical design of sensing waveforms. 2129-2132 - Tareq Y. Al-Naffouri, Furaih F. Al-Shalan, Ahmed Abdul Quadeer
Impulsive noise estimation and cancellation in DSL using compressive sampling. 2133-2136 - Ligang Wu
On design of reduced-order ℋ2 filters for discrete repetitive processes. 2137-2140 - Volnei A. Pedroni, Ricardo P. Jasinski, Ricardo U. Pedroni:
A very efficient single-iteration oldest-out data sorter. 2141-2144
Image & Video Compression
- Saad Bouguezel
A low-complexity parametric transform for image compression. 2145-2148 - Chao Pang, Oscar C. Au, Jingjing Dai, Feng Zou:
Frame-level dependent bit allocation via geometric programming. 2149-2152 - Yu Gao, Xiaoyu Xiu, Jie Liang
Perceptual multiview video coding using synthesized Just Noticeable Distortion maps. 2153-2156 - Khan A. Wahid, Md. Ashraful Islam, Seok-Bum Ko
Lossless implementation of Daubechies 8-tap wavelet transform. 2157-2160
Cellular Neural/Nanoscale Networks & Systems
- Mauro Di Marco
Further results on convergence of cooperative standard cellular neural networks. 2161-2164 - Volkan Kilic
An active wave computing based path finding approach for 3-D environment. 2165-2168 - Chai Wah Wu
Locally connected processor arrays for matrix multiplication and linear transforms. 2169-2172 - Tamás Zsedrovits
Collision avoidance for UAV using visual detection. 2173-2176 - Linda Ponta, Valentina Lanza, Michele Bonnin
Influence of external input on Oscillatory Cellular Nonlinear Networks dynamics. 2177-2180
Cognitive Radio & SDR I
- Kari Stadius, Mikko Kaltiokallio, Jussi Ollikainen, Tuomas Parnanen, Ville Saari, Jussi Ryynänen
A 0.7 - 2.6 GHz high-linearity rf front-end for cognitive radio spectrum sensing. 2181-2184 - Saqib Subhan
Towards suppression of all harmonics in a polyphase multipath transmitter. 2185-2188 - Thomas Schlechter
Advanced filter bank based approach for blocker detection in LTE systems. 2189-2192 - Ulrich Ramacher, Wolfgang Raab, J. A. Ulrich Hachmann, Dominik Langen, Jörg Berthold, R. Kramer, A. Schackow, Cyprian Grassmann, Mirko Sauermann, P. Szreder, F. Capar, G. Obradovic, W. Xu, Nico Brüls, Kang Lee, Eugene Weber, Ray Kuhn, John Harrington:
Architecture and implementation of a Software-Defined Radio baseband processor. 2193-2196 - Wei-Gi Ho, Ranjit Gharpurey:
A cross-correlation based signal detector with two-step down-converter robust to finite image rejection. 2197-2200
Circuit Techniques for Sensors
- Dipayan Das, Steve Collins:
A circuit that creates a logarithmic response from an integrating CMOS pixel. 2201-2204 - Suat U. Ay:
Boosted readout for CMOS APS pixels. 2205-2208 - Fabrizio Conso, Marco Grassi
A very high dynamic range interface circuit for resistive gas sensor matrix read-out. 2209-2212 - Xiaoyi Mu, Daniel Rairigh, Andrew J. Mason:
125ppm resolution and 120dB dynamic range nanoparticle chemiresistor array readout circuit. 2213-2216 - Changhyuk Lee, Alyosha C. Molnar:
Self-quenching, Forward-bias-reset for Single Photon Avalanche Detectors in 1.8V, 0.18µm process. 2217-2220
3-D Integrated Systems: Design Methodologies, Architectures, and Manufacturing
- Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli:
Skew variability in 3-D ICs with multiple clock domains. 2221-2224 - Ioannis Savidis, Vasilis F. Pavlidis, Eby G. Friedman:
Clock distribution models of 3-D integrated systems. 2225-2228 - Kostas Siozios
CAD tools for designing 3D integrated systems. 2229-2232 - Perrine Batude, Maud Vinet, Arnaud Pouydebasque, Cyrille Le Royer, Bernard Previtali, Claude Tabone, Jean-Michel Hartmann, Loic Sanchez, Laurence Baud, Veronique Carron, Alain Toffoli, Fabienne Allain, Vincent Mazzocchi, Dominique Lafond, Simon Deleonibus, Olivier Faynot:
3D monolithic integration. 2233-2236 - Mohamed M. Sabry, David Atienza, Ayse K. Coskun:
Thermal analysis and active cooling management for 3D MPSoCs. 2237-2240
Emerging Nanoelectronic Devices
- Jeyavijayan Rajendran, Ramesh Karri
Parallel memristors: Improving variation tolerance in memristive digital circuits. 2241-2244 - Eero Lehtonen, Jussi H. Poikonen, Mika Laiho
Time-dependency of the threshold voltage in memristive devices. 2245-2248 - Felice Crupi, Massimo Alioto, Jacopo Franco
Experimental analysis of buried SiGe pMOSFETs from the perspective of aggressive voltage scaling. 2249-2252 - Recep Ozgun, Byung J. Jung
Silicon-on-insulator (SOI) integration for organic field effect transistor (OFET) based circuits. 2253-2256 - Feng Hong, Binjie Cheng, Scott Roy, David R. S. Cumming
An analytical mismatch model of nano-CMOS device under impact of intrinsic device variability. 2257-2260
Analog Circuit Modelling and Optimization Techniques
- Douglas David Baptista de Souza, Sidnei Noceti Filho:
An optimum linear phase approximation with small delay obtained by the manipulation of all-pass Padé approximants. 2265-2268 - Philippe Bénabès, Catalin-Adrian Tugui:
Effective modeling of CT functions for fast simulations using MATLAB-Simulink and VHDLAMS applied to Sigma-Delta architectures. 2269-2272 - Milad Razzaghpour, Ana Rusu
Analog circuit optimization via a modified Imperialist Competitive Algorithm. 2273-2276 - Song Liu, Seda Ogrenci Memik, Yehea I. Ismail:
A Comprehensive Tapered buffer optimization algorithm for unified design metrics. 2277-2280
Bandgap Circuits
- Wen-rui Zhu, Haigang Yang, Tongqiang Gao:
A novel low voltage Subtracting BandGap Reference with temperature coefficient of 2.2 ppm/°. 2281-2284 - Pengpeng Yuan, Zhihua Wang, Dongmei Li, Xin Wang, Liyuan Liu:
A nanopower CMOS bandgap reference with 30ppm/degree C from -30 degree C to 150 degree C. 2285-2288 - Joao Navarro Soares
A simple CMOS bandgap reference circuit with sub-1-V operation. 2289-2292 - Hamed Aminzadeh
Low-dropout regulators: Hybrid-cascode compensation to improve stability in nano-scale CMOS technologies. 2293-2296 - Robert Chebli, Mohamad Sawan:
Adjustable input Self-Strobed Delay Line ADC intended to implantable devices. 2297-2300
DSP Circuit Designs
- Yu-Chi Tsao, Ken Choi:
Hardware-efficient parallel FIR digital filter structures for symmetric convolutions. 2301-2304 - Zhiyi Yu, Zewen Shi, Xiaoyang Zeng:
Fault tolerant computing for stream DSP applications using GALS multi-core processors. 2305-2308 - Ji Kong, Peilin Liu, Zhenqi Wei, Kun Yang, Ying Ye, Rendong Ying:
StreamPoP: Stream programming oriented power-efficient audio DSP. 2309-2312 - Hans Kristian Otnes Berge, Snorre Aunet:
Multi-objective optimization of minority-3 functions for ultra-low voltage supplies. 2313-2316 - Gabriel L. Nazar, Luigi Carro
Energy efficient pseudo-cache architecture through fine-grained reconfigurability. 2317-2320
Circuit Testing & Modeling
- Khaled Salah, Alaa B. El-Rouby, Hani F. Ragai
Compact lumped element model for TSV in 3D-ICs. 2321-2324 - Kota Furuhashi, Mitsuru Shiozaki, Akitaka Fukushima, Takahiko Murayama, Takeshi Fujino:
The arbiter-PUF with high uniqueness utilizing novel arbiter circuit with Delay-Time Measurement. 2325-2328 - Nicolas Hebert, Gabriel Marchesan Almeida, Pascal Benoit, Gilles Sassatelli, Lionel Torres:
Evaluation of a distributed fault handler method for MPSoC. 2329-2332 - Aijiao Cui, Chip-Hong Chang
A hybrid watermarking scheme for sequential functions. 2333-2336 - Yiorgos I. Bontzios, Michael G. Dimopoulos, Alkis A. Hatzopoulos
Efficient inductance calculation for long and medium length rectangular interconnects in VLSI circuits. 2337-2340
Integrated Biomedical Systems, BioMEMS, Bio-Sensors/Actuators & Lab-On- Chip
- Andreas G. Andreou
Contactless fluorescence imaging with a CMOS image sensor. 2341-2344 - Yushan Zheng, Sara Bekhiche, Mohamad Sawan:
Planar microcoils array applied to magnetic beads based lab-on-chip for high throughput applications. 2345-2348 - Mohamed Amine Miled, Mohamad Sawan:
A new fully integrated CMOS interface for a dielectrophoretic lab-on-a-chip device. 2349-2352 - Carlos I. Dorta-Quinones, Rajeev K. Dokania, Alyssa B. Apsel:
Extending the dynamic range of implantable real-time neurochemical monitoring systems. 2353-2356 - Jun Hu, Xiang Xie, Guolin Li, Yingke Gu, Yemao Zeng, Zhihua Wang:
Attitude sensing system design for wireless Micro-Ball endoscopy. 2357-2360
Quantum-Dot Cellular Automata (QCA) Circuit Design
- Weiqiang Liu, Liang Lu, Máire O'Neill, Earl E. Swartzlander Jr.:
Design rules for Quantum-dot Cellular Automata. 2361-2364 - Ismo Hänninen, Jarmo Takala
Irreversible bit erasures in binary multipliers. 2369-2372 - Sanjukta Bhanja, Javier F. Pulecio:
A review of magnetic cellular automata systems. 2373-2376 - Saket Srivastava
QCAPro - An error-power estimation tool for QCA circuit design. 2377-2380
Signal Processing in Orthogonal Frequency Division Multiplexing (OFDM)
- Li-Wei Chai, Po-Lin Chiu, Yuan-Hao Huang:
Reduced-complexity interpolation-based QR decomposition using partial layer mapping. 2381-2384 - Mahmoud Abdelall, Ahmed F. Shalash, Hossam A. H. Fahmy:
A reconfigurable baseband processor for wireless OFDM synchronization sub-system. 2385-2388 - Zhi Quan, Yuriy V. Zakharov
DCD-based simplified matrix inversion for MIMO-OFDM. 2389-2392 - Fernando H. Gregorio
Compensation of IQ imbalance and transmitter nonlinearities in broadband MIMO-OFDM. 2393-2396 - Amanda de Paula, Cristiano Panazio
An uncoded BER comparison between DFE-SCCP and OFDM using a convex analysis framework. 2397-2400
Speech Processing
- Amin Fazel, Shantanu Chakrabartty:
Sparse kernel cepstral coefficients (SKCC): Inner-product based features for noise-robust speech recognition. 2401-2404 - Vagner Latsch, Sergio L. Netto
Pitch-synchronous time alignment of speech signals for prosody transplantation. 2405-2408 - Md. Khademul Islam Molla, Keikichi Hirose, Sujan Kumar Roy
Adaptive thresholding approach for robust voiced/unvoiced classification. 2409-2412 - Somlal Das, Md. Ekramul Hamid, Keikichi Hirose, Md. Khademul Islam Molla:
Weighted noise subtraction and adaptive soft-thresholding approach to speech enhancement. 2413-2416 - Sujan Kumar Roy
Dominant harmonic modification with data adaptive filter based algorithm for robust pitch estimation. 2417-2420
Neuromorphic Systems
- Manu Rastogi, Alexander Singh-Alvarado, John G. Harris, José C. Príncipe:
Integrate and fire circuit as an ADC replacement. 2421-2424 - Peng Xu, Pamela Abshire, James Sean Humbert:
Motion image sensor with on-chip adaptation and Programmable Filtering. 2425-2428 - Tarek M. Massoud, Timothy K. Horiuchi
Online correction of orientation estimates using spatial memory in a neuromorphic head direction system. 2429-2432 - Carlos Zamarreño-Ramos, Teresa Serrano-Gotarredona
Voltage mode driver for low power transmission of high speed serial AER Links. 2433-2436 - Andrew Cassidy, Thomas S. Murray, Andreas G. Andreou
Evaluating on-chip interconnects for low operating frequency silicon neuron arrays. 2437-2440
Cognitive Radio & SDR II
- Daibashish Gangopadhyay, Andrew Y. Chen, David J. Allstot:
Analog Chirp Fourier Transform for high-resolution real-time wideband RF spectrum Analysis. 2441-2444 - Shang-Kee Ting, Ali H. Sayed:
Reducing spurious PLL tones in spectrum sensing architectures. 2445-2448 - In-Gul Jang, Zhe-Yan Piao, Ze-Hua Dong, Jin-Gyun Chung, Kang-Yoon Lee:
Low-power FFT design for NC-OFDM in cognitive radio systems. 2449-2452 - Zhigang Sun, Baoyong Chi, Chun Zhang, Zhihua Wang:
A 0.13µm CMOS 1.5-to-2.15GHz low power transmitter front-end for SDR applications. 2453-2456 - Amir Hossein Gholamipour, Ali Gorcin
Reconfigurable filter implementation of a matched-filter based spectrum sensor for Cognitive Radio systems. 2457-2460
Audio Sensors and Energy Harvesting
- Holger Finger, Shih-Chii Liu:
Estimating the location of a sound source with a spike-timing localization algorithm. 2461-2464 - Thomas Jacob Koickal, Rhonira Latif, Luiz C. P. Gouveia
Design of a spike event coded RGT microphone for neuromorphic auditory systems. 2465-2468 - Leung Kin Chiu, Brian Gestner, David V. Anderson:
Design of analog audio classifiers with AdaBoost-Based feature selection. 2469-2472 - Chenling Huang, Shantanu Chakrabartty:
A hybrid energy scavenging sensor for long-term mechanical strain monitoring. 2473-2476 - Ping Zhao, Manfred Glesner:
RF energy harvester design with autonomously adaptive impedance matching network based on auxiliary charge-pump rectifier. 2477-2480
From System to Transistors: Electronic Design Automation of Contemporary VLSI Design
- Francesco Zanini, David Atienza, Luca Benini
Thermal-aware system-level modeling and management for Multi-Processor Systems-on-Chip. 2481-2484 - Ricardo Reis
Design automation of transistor networks, a new challenge. 2485-2488 - Farinaz Koushanfar
Hybrid heterogeneous energy supply networks. 2489-2492 - Frank Liu, Peter Feldmann:
Pure nodal analysis for efficient on-chip interconnect model order reduction. 2493-2496
Nanorobotics & Nano-Giga Circuits
- Kyosun Kim, Sangho Shin, Sung-Mo Kang:
Stateful logic pipeline architecture. 2497-2500 - Timir Datta
Towards a legged chip. 2501-2504 - Angelo Kuti Lusala, Jean-Didier Legat:
Combining sdm-based circuit switching with packet switching in a NoC for real-time applications. 2505-2508 - Mustafa Emre Karagozler, Anil Thaker, Seth Copen Goldstein, David S. Ricketts:
Electrostatic actuation and control of micro robots using a post-processed high-voltage SOI CMOS chip. 2509-2512 - Yanan Sun, Volkan Kursun
Leakage current and bottom gate voltage considerations in developing maximum performance 16nm N-channel carbon nanotube transistors. 2513-2516
Mixed Signal Circuits & Testing
- Sandhya Purighalla, Brent Maundy:
Improved dynamic range, digitally-controlled linear-in-dB CMOS variable gain amplifier. 2517-2520 - Pablo A. Petrashin, Carlos Dualibe:
OBT implementation on Gm-C filters without self-tuning capability. 2521-2524 - Alfredo Olmos, Stefano Pietri
An ultra low-power low-voltage programmable temperature detection circuit. 2525-2528 - Takahiro J. Yamaguchi, Mohamed Abbas, Mani Soma, Takafumi Aoki, Yasuo Furukawa, Katsuhiko Degawa, Satoshi Komatsu, Kunihiro Asada:
An equivalent-time and clocked approach for continuous-time quantization. 2529-2532 - Mohammad Sadegh Jalali, Alireza Sharif Bakhtiar, Shahriar Mirabbasi:
A hybrid phase-locked loop for CDR Applications. 2533-2536
Voltage Regulators & References
- Jader A. De Lima, Wallace A. Pimenta:
An accurate sense-fet current limiter with embedded softstart for linear dc/dc converters. 2537-2540 - Joseph Sankman, Hai Chen, Dongsheng Ma:
Supercapacitor-based reconfigurable energy management unit for autonomous wireless sensor nodes. 2541-2544 - André Mansano, Andre Vilas Boas, Alfredo Olmos, Stefano Pietri
Power management controller for automotive MCU applications in 90nm CMOS technology. 2545-2548 - Y. Joly, L. Truphemus, Laurent Lopez, Jean-Michel Portal, Hassen Aziza, Franck Julien, Pascal Fornara:
Temperature and hump effect impact on output voltage spread of low power bandgap designed in the sub-threshold area. 2549-2552 - Chen Zhao, Jun He, Sheng-Huang Lee, Karl Peterson, Randall L. Geiger, Degang Chen:
Linear vt-based temperature sensors with low process sensitivity and improved power supply headroom. 2553-2556
Digital Circuit Designs I
- Christian Stoif, Martin Schoeberl
Hardware synchronization for embedded multi-core processors. 2557-2560 - Loai G. Salem, Yehea I. Ismail:
Fast hysteretic control of on-chip multi-phase switched-capacitor dc-dc converters. 2561-2564 - Monica Figueiredo
Dynamic jitter accumulation in clock repeaters considering power and ground noise correlations. 2565-2568 - Ru Wang, Huandong Wang, Bao-Xia Fan, Liang Yang:
RIRI scheme: A robust instant-responding ratiochronous interface with zero-latency penalty. 2569-2572 - Anh-Tuan Do, Shoushun Chen, Zhi-Hui Kong, Kiat Seng Yeo
A low-power CAM with efficient power and delay trade-off. 2573-2576
Circuit Designs for Reliability
- Mohammad Javidan, Eldar Zianbetov, François Anceau, Dimitri Galayko
A novel technique to reduce the metastability of Bang-Bang Phase Frequency Detectors. 2577-2580 - Dennis Andrade, Antonio Rubio, Antonio Calomarde
Analysis of delay mismatching of digital circuits caused by common environmental fluctuations. 2585-2588 - Mohammad Javidan, Eldar Zianbetov, François Anceau, Dimitri Galayko
All-digital PLL array provides reliable distributed clock for SOCs. 2589-2592 - Salomon Beer, Ran Ginosar, Michael Priel, Rostislav (Reuven) Dobkin, Avinoam Kolodny:
An on-chip metastability measurement circuit to characterize synchronization behavior in 65nm. 2593-2596
Wireless, Wearable & Implantable/Injectable Technology I
- Song Luan, Amir Eftekhar, Olive H. Murphy, Timothy G. Constandinou
Towards an inductively coupled power/data link for bondpad-less silicon chips. 2597-2600 - Christoph Maier
Energy-efficient resonant BFSK MICS transmitter with fast-settling dual-loop adaptive frequency locking. 2601-2604 - Michael Sole, Ayodele Sanni, Antonio Vilches, Christofer Toumazou, Timothy G. Constandinou
A bio-implantable platform for inductive data and power transfer with integrated battery charging. 2605-2608 - Xiaomeng Li, Tianjia Sun, Guolin Li, Xiang Xie, Yingke Gu, Zhihua Wang:
A new omnidirectional wireless power transmission solution for the wireless Endoscopic Micro-Ball. 2609-2612 - Benoit Gosselin
A high-performance analog front-end for an intraoral tongue-operated assistive technology. 2613-2616
Encoder Optimization
- Jie Dong, King Ngi Ngan
Adaptive pre-interpolation filter for motion-compensated prediction. 2617-2620 - Tianmi Chen, Xiaoyan Sun, Feng Wu, Guangming Shi:
Adaptive patch matching for motion compensated prediction. 2621-2624 - Shangwen Li, Lu Yu
Motion estimation with Second Order Prediction. 2625-2628 - Yang Wang, Peng Zhang, Zhen Liu, Houqiang Li:
A novel tracking-by-encoding scheme based on linear programming matching. 2629-2632
Wireless Multimedia & Security
- Min-Jen Tsai, Jung Liu
Source color laser printer identification using discrete wavelet transform and feature selection algorithms. 2633-2636 - Hyungkyu Kim, Jungsoo Kim, Chong-Min Kyung:
Image quality and lifetime co-optimization in wireless multi-camera systems. 2641-2644 - Maodong Li, Zhenzhong Chen, Yap-Peng Tan:
A MAXMIN resource allocation approach for scalable video delivery over multiuser MIMO-OFDM systems. 2645-2648
Digital Forensics
- Seongho Cho, Byung-Ho Cha, Jingwei Wang, C.-C. Jay Kuo
Performance study on block-based image steganalysis. 2649-2652 - Matthew Oakes, Deepayan Bhowmik
Visual attention-based watermarking. 2653-2656 - Dieter Bardyn, Johann A. Briffa, Ann Dooms
Forensic data hiding optimized for JPEG 2000. 2657-2660 - Ghulam Qadir, Xi Zhao, Anthony T. S. Ho
Image forensic of glare feature for improving image retrieval using Benford's Law. 2661-2664 - Lina Chen, Gaobo Yang, Anthony Tung Shuen Ho
A Cauchy distribution based video watermark detection for H.264/AVC in DCT domain. 2665-2668
Neural Networks I
- Zhishan Guo
Information retrieval from large data sets via multiple-winners-take-all. 2669-2672 - Bo Zhao, Shoushun Chen:
Realtime feature extraction using MAX-like convolutional network for human posture recognition. 2673-2676 - Wei Su, Jinhu Lu
Stability analysis of SSN biochemical networks. 2677-2680 - Yun Chen, Wei Xing Zheng:
An LMI based state estimator for delayed Hopfield neural networks. 2681-2684 - Golnar Khodabandehloo, Mitra Mirhassani, Majid Ahmadi:
A study on resistive-type truncated CVNS Distributed Neural Networks. 2685-2688
Circuits for Error Correcting Codes & FFT Processor Design
- Xinmiao Zhang, Yingquan Wu, Jiangli Zhu:
A novel polynomial selection scheme for low-complexity chase algebraic soft-decision reed-solomon decoding. 2689-2692 - Jeong-In Park, Hanho Lee, Seongsoo Lee:
An area-efficient truncated inversionless Berlekamp-Massey architecture for Reed-Solomon decoders. 2693-2696 - Jiangpeng Li, Guanghui He, Hexi Hou, Zhejun Zhang, Jun Ma:
Memory efficient layered decoder design with early termination for LDPC codes. 2697-2700 - Eid M. Abdel-Hamid, Hossam A. H. Fahmy, Mohamed M. Khairy, Ahmed F. Shalash:
Memory conflict analysis for a multi-standard, reconfigurable turbo decoder. 2701-2704 - Shingo Yoshizawa, Atsushi Orikasa, Yoshikazu Miyanaga
An area and power efficient pipeline FFT processor for 8×8 MIMO-OFDM systems. 2705-2708
Nonsmooth Dynamics of Electrical Systems
- Soumitro Banerjee
Nonsmooth dynamics of electrical systems. 2709-2712 - Mario di Bernardo
Two-fold singularity in nonsmooth electrical systems. 2713-2716 - Zhen Li
Bifurcation study of wind energy generation systems. 2717-2720 - Ian A. Hiskens:
Trajectory deadlock in power system models. 2721-2724 - Vanessa Moreno-Font
Non-smooth bifurcations in a 1-D piecewise linear model of a Single Inductor Two-Output DC-DC switching converter. 2725-2728
Circuit Design & Optimization
- Xiaopeng Li, Hui Xu, Guoyong Shi, Andy Tai:
Hierarchical symbolic sensitivity computation with applications to large amplifier circuit design. 2733-2736 - Levent Aksoy
Optimization of area in digit-serial Multiple Constant Multiplications at gate-level. 2737-2740 - Mario Lang, Jan Haase
Parallel multi-level simulation of wireless sensor networks. 2741-2744 - Seyyed Ali Hashemi
A novel finite-wordlength particle swarm optimization technique for FRM IIR digital filters. 2745-2748
Wireless Circuits & Systems
- Ro-Min Weng, Ming-Jhe Zeng, Chun-Yu Liu:
A high gain flatness high linearity down conversion mixer for Ku band application. 2749-2752 - Jisu Kim, Joongho Choi, Jae-Hyun Kim:
MPEG-4 codec based uplink resource allocation scheme for the video telephony service in WiBro/WiMAX systems. 2753-2756 - Martin Schmidt, Sebastian Haug, Markus Grozing
A pipelined 3-level bandpass delta-sigma modulator for class-S power amplifiers. 2757-2760 - Jordi Bonet-Dalmau
Analysis of the envelope and the instantaneous phase and frequency of superregenerative oscillators. 2761-2764 - Kaushik Ghosal, S. A. Kannan, Bharadwaj Amrutur:
A power scalable receiver front-end at 2.4 GHz. 2765-2768
Power Converter IV
- Albert Garcia-Tormo, Alberto Poveda, Eduard Alarcón, Francesc Guinjoan:
A grounded-output 5-switch bipolar buck-boost converter topology for switching power amplifiers. 2769-2772 - Gabriel Tibola
A single-stage three-phase high power factor rectifier with high-frequency isolation and regulated DC-bus based on the DCM SEPIC converter. 2773-2776 - Altamir Ronsani Borges, Ivo Barbi
A single stage buck-boost three-phase rectifier with high power factor operating in continuous conduction mode (CCM). 2777-2780 - Simone Orcioni
Dynamic oversampling ratio sigma-delta modulation for the control of switching power converter. 2781-2784 - Marian K. Kazimierczuk, Rafal P. Wojda
Maximum drain efficiency class F3 RF power amplifier. 2785-2788
Visual Signal Analysis, Processing & Rendering
- Jun Xie, Weiyao Lin
A new Temporal-Constraint-Based algorithm by handling temporal qualities for video enhancement. 2789-2792 - Glauco Vitor Pedrosa
An image retrieval system using shape salience points. 2797-2800 - Chong Wang, Zhenyu Zhu, Shing-Chow Chan, Heung-Yeung Shum:
Realistic and interactive image-based rendering of ancient chinese artifacts using a multiple camera array. 2801-2804 - Zhongmei Qiao, Xiaoming Li, Debin Zhao, Yanwei Liu, Wen Gao:
Fast disparity estimation utilizing depth information for multiview video coding. 2805-2808
Sensory Systems
- Juan Castellanos
Embedded system for monitoring the comfort in public transportation. 2809-2812 - Chiara Bartolozzi, Neeraj K. Mandloi, Giacomo Indiveri
Attentive motion sensor for mobile robotic applications. 2813-2816 - Sherine Abdelhak, Chandra Sekhar Gurram, Jared Tessier, Soumik Ghosh, Magdy A. Bayoumi:
ETSSI: Energy-based Task Scheduling Simulator for wireless sensor networks. 2821-2824 - Denis Guangyin Chen, Amine Bermak
A low-complexity image compression algorithm for Address-Event Representation (AER) PWM image sensors. 2825-2828 - Leonardo L. de Oliveira, Gustavo Fernando Dessbesell, João B. Martins, José Monteiro
Hardware implementation of a centroid-based localization algorithm for mobile sensor networks. 2829-2832
Oscillators & Mixers
- Tsung-Te Liu, Jan M. Rabaey:
Linearity analysis of CMOS passive mixer. 2833-2836 - Hang Lv, Bo Zhou, Woogeun Rhee
A relaxation oscillator with multi-phase triangular waveform generation. 2837-2840 - Vasanth Kakani, Fa Foster Dai:
A 4.2-4.7GHz, 3.7mW digitally controlled oscillator RFIC. 2841-2844 - Eldar Zianbetov, François Anceau, Mohammad Javidan, Dimitri Galayko
A Digitally Controlled Oscillator in a 65-nm CMOS process for SoC clock generation. 2845-2848 - Kenji Matsuzaka, Kazuki Nakada, Takashi Morie:
Analog CMOS circuit implementation of a system of pulse-coupled oscillators for spike-based computation. 2849-2852
CAD Algorithms
- Yuanzhe Xu, Quan Chen, Lijun Jiang, Ngai Wong:
Process-variation-aware electromagnetic-semiconductor coupled simulation. 2853-2856 - Yu Pang, Jinzhao Lin, Sayeeda Sultana, Katarzyna Radecka:
A novel method of synthesizing reversible logic. 2857-2860 - Franco Fummi, Davide Quaglia
Communication-aware design flow for dependable networked embedded systems. 2861-2864 - Mohamed Badreddine, Yves Blaquière, Mounir Boukadoum:
Machine-learning framework for automatic netlist creation. 2865-2868 - Kunihiro Fujiyoshi, Keisuke Ishihara, Tan Wei Liang:
A novel representation for repeated placement. 2869-2872
Millimeter-wave Circuits, Optical Circuits & Synthesizer for Communications Systems
- Hongrui Wang, Chao Jiao, Li Zhang, Dajie Zeng, Dongxu Yang, Yan Wang, Zhiping Yu:
A low-power ESD-protected 24GHz receiver front-end with π-type input matching network. 2877-2880 - Reza Meraji, John B. Anderson, Henrik Sjöland
An analog (7, 5) convolutional decoder in 65 nm CMOS for low power wireless applications. 2881-2884 - Hongrui Wang, Dajie Zeng, Dongxu Yang, Li Zhang, Lei Zhang, Yan Wang, He Qian, Zhiping Yu:
Understanding dynamic behavior of mm-wave CML divider with injection-locking concept. 2885-2888 - Shahab Shahdoost, Ali Medi
A 1.93 pA/√Hz transimpedance amplifier for 2.5 Gb/s optical communications. 2889-2892
Integrated Power Converter
- Sandip Uprety, Hai Chen, Dongsheng Ma:
Quasi-hysteretic floating buck LED driver with adaptive off-time for accurate average current control in high brightness lighting. 2893-2896 - Zhangcai Huang, Yasuaki Inoue:
A sub-100nA power management system for wireless structure health monitoring applications. 2897-2900 - Mirko Bodetto, Angel Cid-Pastor
Design of an LFR based on a SEPIC converter under sliding mode control for HBLEDs applications. 2901-2904
Advanced Video Coding
- Quanfu Zhang, Qiwei Liu, Houqiang Li:
Distributed residual coding for multi-view video with joint motion vector projection and 3-D warping. 2905-2908 - Tiago A. da Fonseca
Complexity-constrained rate-distortion optimization for h.264/avc video coding. 2909-2912 - Meng Liu, Houqiang Li, Weiping Li:
Smoothing rate control for multiple video streams using game theory. 2913-2917 - Xianming Liu, Deming Zhai, Debin Zhao, Ruiqin Xiong, Siwei Ma
Side information extrapolation with temporal and spatial consistency. 2918-2921 - Wei Xiao, You Zhou, Jizheng Xu, Guangming Shi:
A scheme of parallel arithmetic coding. 2922-2925
Nanoscale & Gigaspeed Devices: Circuits & Systems
- Pietro Maris Ferreira
A new synthesis methodology for reliable RF front-end Design. 2926-2929 - Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Fabien Clermidy, Ian O'Connor
Evaluation of a crossbar multiplexer in a lithography-based nanowire technology. 2930-2933 - Zewen Shi, Yueming Yang, Xiaoyang Zeng, Zhiyi Yu:
A reconfigurable and deadlock-free routing algorithm for 2D Mesh Network-on-Chip. 2934-2937 - Harika Manem, Garrett S. Rose
A read-monitored write circuit for 1T1M multi-level memristor memories. 2938-2941 - Garrett S. Rose
Exploiting memristance for low-energy neuromorphic computing hardware. 2942-2945
Memristor & Chaotic Circuits
- Herbert Ho-Ching Iu, Dongsheng Yu, Andrew Lewis Fitch, Victor Sreeram:
Chaos control in a memristor based circuit. 2946-2949 - Carlos Sánchez-López, Jesús M. Muñoz-Pacheco
On the trade-off between the number of scrolls and the operating frequency of the chaotic attractors. 2950-2953 - Muhammad Shakeel Qureshi, Matthew D. Pickett, Feng Miao, John Paul Strachan:
CMOS interface circuits for reading and writing memristor crossbar array. 2954-2957
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